Cc: Alan Previn
Cc: Lionel Landwerlin
Cc: Jason Ekstrand
Cc: Daniel Vetter
Updated the Mesa series for GL/Vulkan.
UAPI looks good :
Acked-by: Lionel Landwerlin
Cheers,
-Lionel
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula wrote:
On Tue, 27 Apr 2021, Umesh Nerlige Ramappa
wrote:
Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestam
On 28/04/2021 22:54, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 2:50 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula wrote:
On Tue, 27 Apr 2021, Umesh Nerlige Ramappa
wrote:
Perf measurements rely on CPU and engine
On 28/04/2021 23:14, Lionel Landwerlin wrote:
On 28/04/2021 22:54, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 2:50 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula
wrote:
On Tue, 27 Apr 2021, Umesh Nerlige Ramappa
On 28/04/2021 23:45, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:14 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:54, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 2:50 PM Lionel Landwerlin
wrote:
On 28/04/2021 22:24, Jason Ekstrand wrote:
On Wed, Apr 28, 2021 at 3:43 AM Jani Nikula
return it to user.
v11: (Jani)
- IS_GEN deprecated. User GRAPHICS_VER instead.
v12: (Jason)
- Split cpu timestamp array into timestamp and delta for cleaner API
Signed-off-by: Umesh Nerlige Ramappa
Reviewed-by: Lionel Landwerlin
Thanks for the update :
Reviewed-by: Lionel Landwerlin
Just a silly mistake
Signed-off-by: Lionel Landwerlin
Suggested-by: Ben Widawsky
---
include/uapi/drm/drm_mode.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index b49fbf2bdc408..93b494f704b91 100644
--- a/include
Thanks Simon. Do you have the rights to push this patch?
-Lionel
On 02/03/2021 20:46, Simon Ser wrote:
Good catch!
Reviewed-by: Simon Ser
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dr
On 02/03/2021 20:48, Simon Ser wrote:
On Tuesday, March 2nd, 2021 at 7:47 PM, Lionel Landwerlin
wrote:
Thanks Simon. Do you have the rights to push this patch?
Ah, since you're asking about this, it probably means you don't have the
rights. I'll push the patch now to drm-misc
Landwerlin
Signed-off-by: Matt Roper
Thanks,
Acked-by: Lionel Landwerlin
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 7 +++
drivers/gpu/drm/i915/gt/intel_engine_types.h | 3 +++
drivers/gpu/drm/i915/i915_gpu_error.c| 10 --
drivers/gpu/drm/i915/i915_reg.h
Hey Matthew, all,
This sounds like a good thing to have.
There are a number of DG2 machines where we have a small BAR and this is
causing more apps to fail.
Anv currently reports 3 memory heaps to the app :
- local device only (not host visible) -> mapped to lmem
- device/cpu -> mappe
On 07/12/2021 03:32, Bas Nieuwenhuizen wrote:
See the comments in the code. Basically if the seqno is already
signalled then we get a NULL fence. If we then put the NULL fence
in a binary syncobj it counts as unsignalled, making that syncobj
pretty much useless for all expected uses.
Not 100% su
On 07/12/2021 13:00, Christian König wrote:
Am 07.12.21 um 11:40 schrieb Bas Nieuwenhuizen:
On Tue, Dec 7, 2021 at 8:21 AM Christian König
wrote:
Am 07.12.21 um 08:10 schrieb Lionel Landwerlin:
On 07/12/2021 03:32, Bas Nieuwenhuizen wrote:
See the comments in the code. Basically if the
the fix to drm_syncobj_find_fence from the transfer
functions.
Fixes: ea569910cbab ("drm/syncobj: add transition iotcls between
binary and timeline v2")
Cc: sta...@vger.kernel.org
Signed-off-by: Bas Nieuwenhuizen
Reviewed-by: Christian König
Thanks!
Acked-by: Lionel Landwerlin
-
On 09/12/2021 17:45, Ramalingam C wrote:
From: Mika Kahola
DG2 clear color render compression uses Tile4 layout. Therefore, we need
to define a new format modifier for uAPI to support clear color rendering.
Signed-off-by: Mika Kahola
cc: Anshuman Gupta
Signed-off-by: Juha-Pekka Heikkilä
Sig
Sorry for the delay, I'll try to review this tomorrow.
-Lionel
On 13/05/2019 11:15, zhoucm1 wrote:
ping... for patch set.
On 2019年05月13日 17:52, Chunming Zhou wrote:
[CAUTION: External Email]
Signed-off-by: Chunming Zhou
---
include/drm/amdgpu_drm.h | 9 +
1 file changed, 9 inser
On 13/05/2019 10:53, Chunming Zhou wrote:
v2: drop export/import
Signed-off-by: Chunming Zhou
---
xf86drm.c | 44
xf86drm.h | 6 ++
2 files changed, 50 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 2c19376b..17e3d880 100644
--- a/x
On 13/05/2019 10:53, Chunming Zhou wrote:
v2: use one transfer ioctl
Signed-off-by: Chunming Zhou
---
xf86drm.c | 33 +
xf86drm.h | 6 ++
2 files changed, 39 insertions(+)
diff --git a/xf86drm.c b/xf86drm.c
index 17e3d880..acd16fab 100644
--- a/xf86drm.
With the small nits, patches 2 & 4 are : Reviewed-by: Lionel Landwerlin
The other patches are a bit amdgpu specific so maybe you might want
someone more familiar with amdgpu to review them.
Still I didn't see anything wrong with them so remaining patches are :
Acked-by: Lionel L
Hi all,
While picking up the IGT tests for timeline syncobj,
I noticed that although we deal with multi wait across both timeline
(with point value > 0) and binary (point value = 0) syncobjs,
we don't seem to have a similar behavior with signaling.
Do you have any thought on this?
I'm consider
Ping?
On 16/05/2019 15:49, Lionel Landwerlin wrote:
Hi all,
While picking up the IGT tests for timeline syncobj,
I noticed that although we deal with multi wait across both timeline
(with point value > 0) and binary (point value = 0) syncobjs,
we don't seem to have a similar behav
e response.
Although we don't expect that, drm_syncobj_timeline_signal_ioctl
already handle this case I think. Which can handle both (point value >
0) and (point value = 0).
-David
On 2019年05月21日 16:44, Lionel Landwerlin wrote:
[CAUTION: External Email]
Ping?
On 16/05/2019 15:49,
We would like to get both the fence & the syncobj in i915 rather than
doing 2 calls to drm_syncobj_find() & drm_syncobj_find_fence().
Signed-off-by: Lionel Landwerlin
Cc: Christian Koenig
Cc: David(ChunMing) Zhou
Cc: Eric Anholt
CC: DRI-Devel
---
drivers/gpu/drm/amd/amdgpu/amdgpu_c
Sure
-Lionel
On 23/05/2019 13:11, Zhou, David(ChunMing) wrote:
can you make the parameter optional? Otherwise looks good to me.
-David
Original Message
Subject: [PATCH 1/2] drm/syncobj: add an output syncobj parameter to
find_fence
From: Lionel Landwerlin
To: intel
I should mentioned that this is going to make the find_fence() function
a fair bit more complex :)
On 23/05/2019 14:35, Lionel Landwerlin wrote:
Sure
-Lionel
On 23/05/2019 13:11, Zhou, David(ChunMing) wrote:
can you make the parameter optional? Otherwise looks good to me.
-David
On 15/04/2019 13:56, Christian König wrote:
Instead of checking the upper values of the sequence number use an explicit
field in the dma_fence_ops structure to note if a sequence should be 32bit
or 64bit.
Signed-off-by: Christian König
That works for me :)
Reviewed-by: Lionel Landwerlin
Unfortunately userspace users of this API cannot be publicly disclosed
yet so disable this stuff by default until all is revealed.
Signed-off-by: Lionel Landwerlin
---
drivers/gpu/drm/Kconfig | 10 ++
drivers/gpu/drm/drm_syncobj.c | 12
2 files changed, 22 insertions
On 15/04/2019 20:52, Dave Airlie wrote:
On Tue, 16 Apr 2019 at 05:48, Lionel Landwerlin
wrote:
Unfortunately userspace users of this API cannot be publicly disclosed
yet so disable this stuff by default until all is revealed.
This begs the question how userspace is meant to know we support
On 15/04/2019 21:23, Dave Airlie wrote:
On Tue, 16 Apr 2019 at 06:05, Lionel Landwerlin
wrote:
On 15/04/2019 20:52, Dave Airlie wrote:
On Tue, 16 Apr 2019 at 05:48, Lionel Landwerlin
wrote:
Unfortunately userspace users of this API cannot be publicly disclosed
yet so disable this stuff by
Unfortunately userspace users of this API cannot be publicly disclosed
yet.
This commit effectively disables timeline syncobj ioctls for all
drivers. Each driver wishing to support this feature will need to
expose DRIVER_SYNCOBJ_TIMELINE.
Signed-off-by: Lionel Landwerlin
Cc: Dave Airlie
Cc
We've been somewhat inconsistent when adding the new ioctl and
returned ENODEV instead of EOPNOTSUPPORTED upon failing the syncobj
capibility.
Signed-off-by: Lionel Landwerlin
Fixes: ea569910cbab98 ("drm/syncobj: add transition iotcls between binary and
timeline v2")
Fixes: 01d6c
On 16/04/2019 13:40, Christian König wrote:
Am 16.04.19 um 14:30 schrieb Lionel Landwerlin:
We've been somewhat inconsistent when adding the new ioctl and
returned ENODEV instead of EOPNOTSUPPORTED upon failing the syncobj
capibility.
Signed-off-by: Lionel Landwerlin
Fixes: ea569910c
: Lionel Landwerlin
Reviewed-by: Christian König (v1)
Cc: Dave Airlie
Cc: Daniel Vetter
Cc: Christian König
Cc: Chunming Zhou
---
drivers/gpu/drm/drm_ioctl.c | 3 +++
drivers/gpu/drm/drm_syncobj.c | 10 +-
include/drm/drm_drv.h | 7 +++
include/uapi/drm/drm.h
On 16/04/2019 20:53, Dave Airlie wrote:
On Tue, 16 Apr 2019 at 22:58, Lionel Landwerlin
wrote:
Unfortunately userspace users of this API cannot be publicly disclosed
yet.
This commit effectively disables timeline syncobj ioctls for all
drivers. Each driver wishing to support this feature will
Reviewed-by: Lionel Landwerlin
On 02/02/2019 08:07, Rodrigo Vivi wrote:
Align with kernel commits:
5e0f5a58b167 ("drm/i915/cfl: Adding another PCI Device ID.")
03ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
Cc: José Roberto de Souza
Cc: Kenne
ca3cf8e9aa ("drm/i915/icl: Adding few more device IDs for Ice Lake")
c0c46ca461f1 ("drm/i915/aml: Add new Amber Lake PCI ID")
c1c8f6fa731b ("drm/i915: Redefine some Whiskey Lake SKUs")
Cc: José Roberto de Souza
Signed-off-by: Rodrigo Vivi
Acked-by: Lionel Landwe
On 18/02/2019 07:28, Koenig, Christian wrote:
Am 18.02.19 um 04:10 schrieb zhoucm1:
On 2019年02月17日 03:22, Christian König wrote:
Am 15.02.19 um 20:31 schrieb Lionel Landwerlin via amd-gfx:
On 07/12/2018 09:55, Chunming Zhou wrote:
user mode can query timeline payload.
v2: check return value
cases, which easily leads to
deadlock.
-David
On 2019年02月15日 22:28, Lionel Landwerlin wrote:
Hi David,
Thanks a lot for point me to the tests you've added in IGT.
While adding a test with that signals fences imported into a timeline
syncobj out of order, I ran into a deadlock.
Here is the
ncobj-kernel, which is
already rebased to latest drm-misc(kernel 5.0). You can directly use
that branch.
-David
On 2019年02月19日 01:01, Koenig, Christian wrote:
Am 18.02.19 um 13:07 schrieb Lionel Landwerlin:
Thanks guys :)
You mentioned that signaling out of order is illegal.
Is this il
On 15/03/2019 12:09, Chunming Zhou wrote:
points array is one-to-one match with syncobjs array.
v2:
add seperate ioctl for timeline point wait, otherwise break uapi.
v3:
userspace can specify two kinds waits::
a. Wait for time point to be completed.
b. and wait for time point to become available
On 18/03/2019 17:20, Koenig, Christian wrote:
- if (dma_fence_is_signaled(entries[i].fence)) {
+ if (fence)
+ entries[i].fence = fence;
+ else
+ entries[i].fence = dma_fence_get_stub();
+
+ if ((flags & DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE) ||
On 15/03/2019 12:09, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free independently.
v3: all existing points must be already signaled before cpu perform signal
operation,
so add check condition for that.
Signed-off-by: Chunming Zhou
---
drivers/gpu/dr
On 15/03/2019 12:09, Chunming Zhou wrote:
From: Christian König
Lockless container implementation similar to a dma_fence_array, but with
only two elements per node and automatic garbage collection.
v2: properly document dma_fence_chain_for_each, add dma_fence_chain_find_seqno,
drop prev r
On 20/03/2019 03:53, zhoucm1 wrote:
On 2019年03月19日 19:54, Lionel Landwerlin wrote:
On 15/03/2019 12:09, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already signaled before cpu perform
signal operation
On 20/03/2019 03:53, zhoucm1 wrote:
On 2019年03月19日 19:54, Lionel Landwerlin wrote:
On 15/03/2019 12:09, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already signaled before cpu perform
signal operation
out-of-order
v5: unify binary and timeline
Signed-off-by: Chunming Zhou
Cc: Tobias Hector
Cc: Jason Ekstrand
Cc: Dave Airlie
Cc: Chris Wilson
Cc: Lionel Landwerlin
---
drivers/gpu/drm/drm_internal.h | 2 +
drivers/gpu/drm/drm_ioctl.c| 2 +
drivers/gpu/drm/drm_syncobj.c | 73
On 28/03/2019 13:08, Chunming Zhou wrote:
在 2019/3/28 20:53, Lionel Landwerlin 写道:
On 25/03/2019 08:32, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already signaled before cpu perform
signal operation
Signed-off-by: Christian König
Cc: Lionel Landwerlin
---
drivers/gpu/drm/drm_syncobj.c | 39 +++
include/drm/drm_syncobj.h | 5 +
2 files changed, 44 insertions(+)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index
r
Cc: Ville Syrjälä
Cc: Shashank Sharma
Cc: "Kumar, Kiran S"
Cc: Kausal Malladi
Cc: Lionel Landwerlin
Cc: Matt Roper
Cc: Rob Bradford
Cc: Daniel Stone
Cc: Stefan Schake
Cc: Eric Anholt
Cc: Maarten Lankhorst
Cc: Harry Wentland
Cc: Leo Li
Cc: amd-...@lists.freedesktop.org
Cc: Ja
On 28/03/2019 13:33, Lionel Landwerlin wrote:
On 28/03/2019 13:08, Chunming Zhou wrote:
在 2019/3/28 20:53, Lionel Landwerlin 写道:
On 25/03/2019 08:32, Chunming Zhou wrote:
v2: individually allocate chain array, since chain node is free
independently.
v3: all existing points must be already
On 28/03/2019 15:18, Christian König wrote:
Am 28.03.19 um 14:50 schrieb Lionel Landwerlin:
On 25/03/2019 08:32, Chunming Zhou wrote:
From: Christian König
Use the dma_fence_chain object to create a timeline of fence objects
instead of just replacing the existing fence.
v2: rebase and
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou, David(ChunMing)
; dri-devel@lists.freedesktop.org; amd-
g...@lists.freedesktop.org; ja...@jlekstrand.net; Hector, Tobias
On 01/04/2019 11:50, zhoucm1 wrote:
On 2019年04月01日 16:19, Lionel Landwerlin wrote:
On 01/04/2019 06:54, Zhou, David(ChunMing) wrote:
-Original Message-
From: Lionel Landwerlin
Sent: Saturday, March 30, 2019 10:09 PM
To: Koenig, Christian ; Zhou,
David(ChunMing)
; dri-devel
On 18/07/2019 14:13, Chunming Zhou wrote:
if WAIT_FOR_SUBMIT isn't set and in the meanwhile no underlying fence on
syncobj,
then return non-block error code to user sapce.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_syncobj.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
On 18/07/2019 16:02, Chunming Zhou wrote:
在 2019/7/18 19:31, Lionel Landwerlin 写道:
On 18/07/2019 14:13, Chunming Zhou wrote:
if WAIT_FOR_SUBMIT isn't set and in the meanwhile no underlying fence
on syncobj,
then return non-block error code to user sapce.
Signed-off-by: Chunming
On 18/07/2019 17:33, Chunming Zhou wrote:
在 2019/7/18 22:08, Lionel Landwerlin 写道:
On 18/07/2019 16:02, Chunming Zhou wrote:
在 2019/7/18 19:31, Lionel Landwerlin 写道:
On 18/07/2019 14:13, Chunming Zhou wrote:
if WAIT_FOR_SUBMIT isn't set and in the meanwhile no underlying fence
on sy
On 18/07/2019 14:13, Chunming Zhou wrote:
if WAIT_FOR_SUBMIT isn't set and in the meanwhile no underlying fence on
syncobj,
then return non-block error code to user sapce.
Signed-off-by: Chunming Zhou
---
drivers/gpu/drm/drm_syncobj.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-
("drm/syncobj: add timeline payload query ioctl v6")
Reviewed-by: Lionel Landwerlin
---
drivers/gpu/drm/drm_syncobj.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_syncobj.c b/drivers/gpu/drm/drm_syncobj.c
index 75cb4bb7619e..14
On 22/07/2019 16:21, Christian König wrote:
Am 22.07.19 um 15:16 schrieb Lionel Landwerlin:
On 22/07/2019 15:59, Christian König wrote:
We need to check the context number instead if the previous sequence
to detect
an error and if an error is detected we need to drop the reference
to the
On 23/07/2019 08:22, Chunming Zhou wrote:
user space needs a flexiable query ability.
So that umd can get last signaled or submitted point.
Change-Id: I6512b430524ebabe715e602a2bf5abb0a7e780ea
Signed-off-by: Chunming Zhou
Cc: Lionel Landwerlin
Cc: Christian König
---
drivers/gpu/drm
On 23/07/2019 17:21, Chunming Zhou wrote:
user space needs a flexiable query ability.
So that umd can get last signaled or submitted point.
v2:
add sanitizer checking.
Change-Id: I6512b430524ebabe715e602a2bf5abb0a7e780ea
Signed-off-by: Chunming Zhou
Cc: Lionel Landwerlin
Cc: Christian König
On 24/07/2019 11:01, Chunming Zhou wrote:
Signed-off-by: Chunming Zhou
Cc: Lionel Landwerlin
Cc: Christian König
---
amdgpu/amdgpu-symbol-check | 1 +
amdgpu/amdgpu.h| 18 ++
amdgpu/amdgpu_cs.c | 10 ++
include/drm/drm.h | 3
On 25/07/2019 10:52, Chunming Zhou wrote:
v2: nit-picks fix
Signed-off-by: Chunming Zhou
Cc: Lionel Landwerlin
Cc: Christian König
For the xf86drm.[ch] part : Reviewed-by: Lionel Landwerlin
I'll let someone from AMD look at the amdgpu bit.
Thanks!
-Lionel
---
amdgpu/a
On 30/07/2019 12:27, Daniel Vetter wrote:
On Mon, Jul 29, 2019 at 04:20:39PM +0800, Chunming Zhou wrote:
It is normal that binary syncobj replaces the underlying fence.
Signed-off-by: Chunming Zhou
Do we hit this with one of the syncobj igts?
-Daniel
With one of the tests sitting on the ma
On 30/07/2019 12:36, Daniel Vetter wrote:
On Tue, Jul 30, 2019 at 05:31:26PM +0800, zhoucm1 wrote:
On 2019年07月30日 17:27, Daniel Vetter wrote:
On Mon, Jul 29, 2019 at 04:20:39PM +0800, Chunming Zhou wrote:
It is normal that binary syncobj replaces the underlying fence.
Signed-off-by: Chunming
: Chunming Zhou
Cc: Lionel Landwerlin
Cc: Christian König
Reviewed-by: Lionel Landwerlin
Reviewed-by: Christian König
Lionel is the Intel code using this already public? Or David any chance
that we can get a public amdvlk release using this?
Christian.
The Khronos specification for
Just had a few exchanges with Chris about this.
Chris suggests that if we're about to add a point to the timeline in an
unordered fashion, actually better not add it at all.
What's your take on this?
I'm fine with this, but rather than add another variant of add_point()
maybe we change change
Hi Christian, David,
Sorry to report this so late in the process, but I think we found an
issue not directly related to syncobj timelines themselves but with a
side effect of the threaded submissions.
Essentially we're failing a test in crucible :
func.sync.semaphore-fd.opaque-fd
This test c
to
handle that wait. So we don't have your this issue.
By the way, I already pass all your CTS cases for now. I suggest you to switch
to Semaphore Thread instead of Queue Thread as well. It works very well.
-David
-----Original Message-
From: Lionel Landwerlin
Sent: Friday, August
3, Koenig, Christian wrote:
Hi Lionel,
Well could you describe once more what the problem is?
Cause I don't fully understand why a rather normal tandem submission
with two semaphores should fail in any way.
Regards,
Christian.
Am 02.08.2019 06:28 schrieb Lionel Landwerlin
:
There aren
from one VkDevice as opaque FD from sem1 and imported into sem2.
This way there can't be any Synchronisation between the two.
Regards,
Christian.
Am 02.08.2019 06:55 schrieb Lionel Landwerlin
:
Hey Christian,
The problem boils down to the fact that we don't immediately create
dma
On 02/08/2019 08:21, Koenig, Christian wrote:
Am 02.08.2019 07:17 schrieb Lionel Landwerlin
:
On 02/08/2019 08:08, Koenig, Christian wrote:
Hi Lionel,
Well that looks more like your test case is buggy.
According to the code the ctx1 queue always waits for sem1
On 02/08/2019 09:10, Koenig, Christian wrote:
Am 02.08.2019 07:38 schrieb Lionel Landwerlin
:
On 02/08/2019 08:21, Koenig, Christian wrote:
Am 02.08.2019 07:17 schrieb Lionel Landwerlin
<mailto:lionel.g.landwer...@intel.com>:
On 02/08/2019
maphores use syncobj timelines.
There is just another u64 associated with them.
-Lionel
-David
On 2019年08月02日 14:27, Lionel Landwerlin wrote:
On 02/08/2019 09:10, Koenig, Christian wrote:
Am 02.08.2019 07:38 schrieb Lionel Landwerlin
:
On 02/08/2019 08:21, Koenig, Christian wrot
ensure everything is properly ordered.
So I think you're right on this David, waitBeforeSignal on binary
semaphore is out of scope.
Again sorry for the noise.
-Lionel
On 02/08/2019 13:01, zhoucm1 wrote:
On 2019年08月02日 17:41, Lionel Landwerlin wrote:
Hey David,
On 02/08/2019 12:11, zh
Thanks a lot for writing this :)
I now have a canvas to add stuff on!
Just a couple of questions below.
-Lionel
On 02/08/2019 20:40, Jason Ekstrand wrote:
This patch only brings the syncobj documentation up-to-date for the
original form of syncobj. It does not contain any information about th
On 02/06/2022 23:35, Jason Ekstrand wrote:
On Thu, Jun 2, 2022 at 3:11 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 01:28:36PM -0700, Matthew Brost wrote:
>On Wed, Jun 01, 2022 at 05:25:49PM +0300, Lionel Landwerlin wrote:
>> On 17/05/2022 21:32,
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana Vishwanathap
On 08/06/2022 09:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1 Jun 2022 at 11:03, Dave Airlie wrote:
On Tue, 24 May 2022 at 05:20, Niranjana Vishwanathap
On 08/06/2022 11:36, Tvrtko Ursulin wrote:
On 08/06/2022 07:40, Lionel Landwerlin wrote:
On 03/06/2022 09:53, Niranjana Vishwanathapura wrote:
On Wed, Jun 01, 2022 at 10:08:35PM -0700, Niranjana Vishwanathapura
wrote:
On Wed, Jun 01, 2022 at 11:27:17AM +0200, Daniel Vetter wrote:
On Wed, 1
1:18:11AM -0700, Niranjana
Vishwanathapura wrote:
>>>On Tue, Jun 07, 2022 at 12:12:03PM -0500, Jason Ekstrand wrote:
>>>> On Fri, Jun 3, 2022 at 6:52 PM Niranjana Vishwanathapura
>>>> wrote:
>>>>
>>>> On Fri, Jun 03,
On 09/06/2022 22:31, Niranjana Vishwanathapura wrote:
On Thu, Jun 09, 2022 at 05:49:09PM +0300, Lionel Landwerlin wrote:
On 09/06/2022 00:55, Jason Ekstrand wrote:
On Wed, Jun 8, 2022 at 4:44 PM Niranjana Vishwanathapura
wrote:
On Wed, Jun 08, 2022 at 08:33:25AM +0100, Tvrtko
On 10/06/2022 10:54, Niranjana Vishwanathapura wrote:
On Fri, Jun 10, 2022 at 09:53:24AM +0300, Lionel Landwerlin wrote:
On 09/06/2022 22:31, Niranjana Vishwanathapura wrote:
On Thu, Jun 09, 2022 at 05:49:09PM +0300, Lionel Landwerlin wrote:
On 09/06/2022 00:55, Jason Ekstrand wrote
On 10/06/2022 13:37, Tvrtko Ursulin wrote:
On 10/06/2022 08:07, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.h | 490 +++
1 file changed, 490 insertions(+)
c
On 10/06/2022 11:53, Matthew Brost wrote:
On Fri, Jun 10, 2022 at 12:07:11AM -0700, Niranjana Vishwanathapura wrote:
VM_BIND and related uapi definitions
Signed-off-by: Niranjana Vishwanathapura
---
Documentation/gpu/rfc/i915_vm_bind.h | 490 +++
1 file changed, 490
list - DRI
developers de...@lists.freedesktop.org>; Hellstrom, Thomas
;
Wilson, Chris P ; Vetter, Daniel
; Christian König
Subject: Re: [Intel-gfx] [RFC v3 1/3] drm/doc/rfc: VM_BIND feature
design
document
On Fri, Jun 10, 2022 at 11:18:14AM +0300, Lionel Landwerlin wrote:
>On 10/06/2022
line
discussion.
v4:
- Various improvements all over. (Tvrtko)
v5:
- Include newer integrated platforms when applying the non-recoverable
context and error capture restriction. (Thomas)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc:
ture interactions, including no longer needing
NEEDS_CPU_ACCESS for objects marked for capture. (Thomas)
- Add probed_cpu_visible_size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
to select the placement on the GEM object and then query
whether it's mappable by address?
You made a comment stating this is racy, wouldn't querying on the GEM
object prevent this?
Thanks,
-Lionel
On 27/04/2022 09:35, Lionel Landwerlin wrote:
Hi Matt,
The proposal looks good to
On 27/04/2022 18:18, Matthew Auld wrote:
On 27/04/2022 07:48, Lionel Landwerlin wrote:
One question though, how do we detect that this flag
(I915_GEM_CREATE_EXT_FLAG_NEEDS_CPU_ACCESS) is accepted on a given
kernel?
I assume older kernels are going to reject object creation if we use
this flag
ture. (Thomas)
- Add probed_cpu_visible_size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc: mesa-...@lists.freedesktop.org
---
Documentation/gpu
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks. (Akeem & Thomas)
- Rework error capture interactions, including no longer nee
. (Akeem & Thomas)
- Rework error capture interactions, including no longer needing
NEEDS_CPU_ACCESS for objects marked for capture. (Thomas)
- Add probed_cpu_visible_size. (Lionel)
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Jon Bloomfield
Cc: Da
On 03/05/2022 12:07, Matthew Auld wrote:
On 02/05/2022 19:03, Lionel Landwerlin wrote:
On 02/05/2022 20:58, Abodunrin, Akeem G wrote:
-Original Message-
From: Landwerlin, Lionel G
Sent: Monday, May 2, 2022 12:55 AM
To: Auld, Matthew ;
intel-...@lists.freedesktop.org
Cc: dri-devel
On 03/05/2022 13:22, Matthew Auld wrote:
On 02/05/2022 09:53, Lionel Landwerlin wrote:
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi needed for small BAR on DG2+.
v2:
- Some spelling fixes and other small tweaks
On 03/05/2022 17:27, Matthew Auld wrote:
On 03/05/2022 11:39, Lionel Landwerlin wrote:
On 03/05/2022 13:22, Matthew Auld wrote:
On 02/05/2022 09:53, Lionel Landwerlin wrote:
On 02/05/2022 10:54, Lionel Landwerlin wrote:
On 20/04/2022 20:13, Matthew Auld wrote:
Add an entry for the new uapi
-by: Ramalingam C
cc: Matthew Auld
cc: Thomas Hellstrom
cc: Daniel Vetter
cc: Jon Bloomfield
cc: Lionel Landwerlin
cc: Kenneth Graunke
cc: mesa-...@lists.freedesktop.org
cc: Jordan Justen
cc: Tony Ye
Reviewed-by: Matthew Auld
---
include/uapi/drm/i915_drm.h | 16
1 file
On 14/05/2022 00:06, Jordan Justen wrote:
On 2022-05-13 05:31:00, Lionel Landwerlin wrote:
On 02/05/2022 17:15, Ramalingam C wrote:
Capture the impact of memory region preference list of the objects, on
their memory residency and Flat-CCS capability.
v2:
Fix the Flat-CCS capability of an
nels, since this came up in some offline
discussion.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Lionel Landwerlin
Cc: Tvrtko Ursulin
Cc: Jon Bloomfield
Cc: Daniel Vetter
Cc: Jon Bloomfield
Cc: Jordan Justen
Cc: Kenneth Graunke
Cc: Akeem G Abodunrin
Cc:
1 - 100 of 292 matches
Mail list logo
