[PATCH v3 2/2] dt-bindings: mediatek: add force_dsi_end_without_null for dsi

Some bridge chip will shift screen when the dsi data does't ent at the same time in line. Signed-off-by: Jitao Shi --- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/display/med

[PATCH v3 1/2] drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift

The bridge chip ANX7625 requires the packets on lanes aligned at the end, or ANX7625 will shift the screen. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm

[PATCH v4 1/2] drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift

The bridge chip ANX7625 requires the packets on lanes aligned at the end, or ANX7625 will shift the screen. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm

[PATCH v4 2/2] dt-bindings: mediatek: add force_dsi_end_without_null

The force_dsi_end_without_null requires the dsi host ent at the same time in line. Signed-off-by: Jitao Shi --- .../bindings/display/bridge/analogix,anx7625.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/analogix

[PATCH v5 1/2] dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null

The force_dsi_end_without_null requires the dsi host ent at the same time in line. Signed-off-by: Jitao Shi --- .../bindings/display/bridge/analogix,anx7625.yaml | 6 ++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/bridge/analogix

[PATCH v5 0/2] force hsa hbp hfp packets multiple of lanenum to avoid screen shift

Changes since v4: - Move "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" before "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid". - Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". Jitao Shi

[PATCH v5 2/2] drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift

The bridge chip ANX7625 requires the packets on lanes aligned at the end, or ANX7625 will shift the screen. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm

[PATCH] drm/mediatek: force hsa hsa hfp packets multiple of line num to avoid screen shift

The bridge chip ANX7625 require the line packets ending at the sametime or ANX7625 will shift the screen. Change-Id: Ia324ad28fbff54140feedb9a1d6bfb2b246d0447 Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 12 1 file changed, 12 insertions(+) diff --git a

[PATCH 2/4] drm/panel: boe-tv101wum-n16 seperate the panel power control

Seperate the panel power control from prepare/unprepare. Signed-off-by: Jitao Shi --- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 72 +-- 1 file changed, 50 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel

[PATCH 4/4] drm/mediatek: add dsi module reset driver

Reset dsi HW to default when power on. Prevent the setting differet between bootloader and kernel. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 36 +- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek

[PATCH 1/4] drm/panel: seperate panel power control from panel prepare/unprepare

drm_panel_unprepare. Signed-off-by: Jitao Shi --- drivers/gpu/drm/bridge/panel.c | 17 +++ drivers/gpu/drm/drm_panel.c| 38 ++ include/drm/drm_bridge.h | 2 ++ include/drm/drm_panel.h| 17 +++ 4 files changed, 74 insertions(+) diff

[PATCH 3/4] drm/mediatek: fine tune the dsi panel's power sequence

Add the drm_panel_prepare_power and drm_panel_unprepare_power control. Turn on panel power(drm_panel_prepare_power) and control before dsi enable. And then dsi enable, send dcs cmd in drm_panel_prepare, last turn on backlight. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 12

[PATCH v2 0/3] seperate panel power control from panel prepare/unprepare

Changes since v1: - Fix null point when dsi next bridge isn't a panel. - "dsi mmsys reset" is implement by https://patchwork.kernel.org/project/linux-mediatek/list/?series=515355 Jitao Shi (3): drm/panel: seperate panel power control from panel prepare/unprepare drm/pane

[PATCH v2 2/3] drm/panel: boe-tv101wum-n16 seperate the panel power control

Seperate the panel power control from prepare/unprepare. Signed-off-by: Jitao Shi --- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c| 72 +-- 1 file changed, 50 insertions(+), 22 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c b/drivers/gpu/drm/panel

[PATCH v2 1/3] drm/panel: seperate panel power control from panel prepare/unprepare

drm_panel_unprepare. Signed-off-by: Jitao Shi --- drivers/gpu/drm/bridge/panel.c | 17 +++ drivers/gpu/drm/drm_panel.c| 38 ++ include/drm/drm_bridge.h | 2 ++ include/drm/drm_panel.h| 17 +++ 4 files changed, 74 insertions(+) diff

[PATCH v2 3/3] drm/mediatek: fine tune the dsi panel's power sequence

1 --> dsi host's action 3. send the DCS cmd to panel --> panel's action 4. start send video stream --> dsi host's action 5. turn on backlight. --> panel's action panel's actions are divided into three parts. So I add a new api "dr

[PATCH v6 0/1] force hsa hbp hfp packets multiple of lanenum to avoid screen shift

Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". Jitao Shi (1): drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift drivers/gpu/drm/mediatek/mtk_dsi.c | 13 + 1 file changed, 13 insertions(+) -- 2.25.1

[PATCH v6 1/1] drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid screen shift

The bridge chip ANX7625 requires the packets on lanes aligned at the end, or ANX7625 will shift the screen. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 13 + 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm

[PATCH 3/3] drm/mediatek: dpi: add bus format negociation

Add the atomic_get_output_bus_fmts, atomic_get_input_bus_fmts to negociate the possible output and input formats for the current mode and monitor, and use the negotiated formats in a basic atomic_check callback. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 96

[PATCH 2/3] drm/mediatek: config mt8183 driver data to support dual edge sample

Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index ccd681a2a4c2..87bb27649c4c 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm

[PATCH 0/3] mt8183 dpi supports dual edge

DPI can sample on falling, rising or both edge. When DPI sample the data both rising and falling edge. It can reduce half data io pins. Jitao Shi (3): drm/mediatek: dpi dual edge sample mode support drm/mediatek: config mt8183 driver data to support dual edge sample drm/mediatek: dpi: add

[PATCH 1/3] drm/mediatek: dpi dual edge sample mode support

DPI can sample on falling, rising or both edge. When DPI sample the data both rising and falling edge. It can reduce half data io pins. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/mediatek

[PATCH v2 0/2] Fix EoTp flag

Changes since v1: - Seperate the line time as single patch. Jitao Shi (2): drm/mediatek: dsi: Fix EoTp flag drm/mediatek: dsi: fine tune the line time cause by EOTp drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) -- 2.12.5

[PATCH v2 2/2] drm/mediatek: dsi: fine tune the line time cause by EOTp

Enabling EoTp will make the line time larger, so the hfp and hbp should be reduced to keep line time. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c

[PATCH v2 1/2] drm/mediatek: dsi: Fix EoTp flag

SoC will transmit the EoTp (End of Transmission packet) when MIPI_DSI_MODE_EOT_PACKET flag is set. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 7 +-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm

[PATCH] drm/mediatek: fine tune the data lane trail by project dts

Some panels or bridges require customized hs_da_trail time. So add a property in devicetree for this panels and bridges. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek

[PATCH 0/3] Add check for max clock rate in mode_valid

Jitao Shi (3): drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid drm/mediatek: mtk_dpi: Add dpi config for mt8192 dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi .../display/mediatek/mediatek,dpi.yaml| 1 + drivers/gpu/drm/mediatek/mtk_dpi.c| 27

[PATCH 3/3] dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi

Add compatible "mediatek,mt8192-dpi" for the mt8192 dpi. Signed-off-by: Jitao Shi --- .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Doc

[PATCH 2/3] drm/mediatek: mtk_dpi: Add dpi config for mt8192

Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index ffa4a0f1989f..b7905f3f4d1b 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers

[PATCH 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 52f11a63a330

[PATCH v2 0/3] Add check for max clock rate in mode_valid

Changes since v1: - fix build err. Jitao Shi (3): drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid drm/mediatek: mtk_dpi: Add dpi config for mt8192 dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi .../display/mediatek/mediatek,dpi.yaml| 1 + drivers/gpu/drm

[PATCH v2 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 52f11a63a330

[PATCH v2 3/3] dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi

Add compatible "mediatek,mt8192-dpi" for the mt8192 dpi. Signed-off-by: Jitao Shi --- .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Doc

[PATCH v2 2/3] drm/mediatek: mtk_dpi: Add dpi config for mt8192

Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index ffa4a0f1989f..f6f71eb67ff1 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu

[PATCH v3 0/3] Add check for max clock rate in mode_valid

Changes since v2: - add const struct drm_display_info *info in mtk_dpi_bridge_mode_valid Jitao Shi (3): drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid drm/mediatek: mtk_dpi: Add dpi config for mt8192 dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi .../display

[PATCH v3 1/3] drm/mediatek: mtk_dpi: Add check for max clock rate in mode_valid

Add per-platform max clock rate check in mtk_dpi_bridge_mode_valid. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 52f11a63a330

[PATCH v3 3/3] dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi

Add compatible "mediatek,mt8192-dpi" for the mt8192 dpi. Signed-off-by: Jitao Shi --- .../devicetree/bindings/display/mediatek/mediatek,dpi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Doc

[PATCH v3 2/3] drm/mediatek: mtk_dpi: Add dpi config for mt8192

Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index ffa4a0f1989f..f6f71eb67ff1 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu

Re: [PATCH 3/4] drm/mediatek: fine tune the dsi panel's power sequence

On Sat, 2021-04-24 at 00:36 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi 於 2021年4月20日 週二 下午9:26寫道： > > > > Add the drm_panel_prepare_power and drm_panel_unprepare_power control. > > Turn on panel power(drm_panel_prepare_power) and control before dsi >

Re: [PATCH 4/4] drm/mediatek: add dsi module reset driver

On Sat, 2021-04-24 at 07:50 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi 於 2021年4月20日 週二 下午9:26寫道： > > > > Reset dsi HW to default when power on. Prevent the setting differet > > between bootloader and kernel. > > > > Signed-off-by: Jitao Shi

[PATCH v7 0/3] force hsa hbp hfp packets multiple of lanenum to avoid screen shift

Changes since v4: - Move "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null" before "drm/mediatek: force hsa hbp hfp packets multiple of lanenum to avoid". - Retitle "dt-bindings: drm/bridge: anx7625: add force_dsi_end_without_null". Jitao Shi

[PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned

Some DSI devices reqire the hs packet starting and ending at same time on all dsi lanes. So use a flag to those devices. Signed-off-by: Jitao Shi --- include/drm/drm_mipi_dsi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h index

[PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift

This device requires the packets on lanes aligned at the end to fix screen shift or scroll. Signed-off-by: Jitao Shi --- drivers/gpu/drm/bridge/analogix/anx7625.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix

[PATCH v7 2/3] drm/mediatek: implment the dsi hs packets aligned

Some dsi devices require the packets on lanes aligned at the end, or the screen will shift or scroll. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek

Re: [PATCH v7 3/3] drm/bridge: anx7625: config hs packets end aligned to avoid screen shift

Hi Xin, Please help to review the changes in anx7625.c On Thu, 2021-09-16 at 06:31 +0800, Jitao Shi wrote: > This device requires the packets on lanes aligned at the end to fix > screen shift or scroll. > > Signed-off-by: Jitao Shi > --- > drivers/gpu/drm/bridge/analogix/an

Re: [PATCH v7 1/3] drm/dsi: transer dsi hs packet aligned

Hi sirs Pls help to review this change. Best Regards Jitao. On Tue, 2021-10-05 at 07:53 +0800, Chun-Kuang Hu wrote: > Hi, Jitao: > > Jitao Shi 於 2021年9月16日 週四 上午6:31寫道： > > > > Some DSI devices reqire the hs packet starting and ending > > at same time on all dsi la

[PATCH v3 0/2] seperate panel power control from panel prepare/unprepare

ent by https://patchwork.kernel.org/project/linux-mediatek/list/?series=515355 Jitao Shi (2): drm/panel: panel-boe-tv101wum-nl6: tune the power sequence to avoid leakage drm/mediatek: control panel's power before MIPI LP11 drivers/gpu/drm/mediatek/mtk_dsi.c | 28 ++-- drivers/gpu

[PATCH v3 2/2] drm/mediatek: control panel's power before MIPI LP11

"auo,kd101n80-45na" requires the panel's IOVDD take precedence over MIPI DATA. Otherwise there is a risk of leakage. Signed-off-by: Jitao Shi Change-Id: I2da6179dea7e15bc5a53fe36db200b6c04f4d551 --- drivers/gpu/drm/mediatek/mtk_dsi.c | 28 ++-- 1 f

[PATCH v3 1/2] drm/panel: panel-boe-tv101wum-nl6: tune the power sequence to avoid leakage

ended that the time for MIPI to enter LP11 be postponed after IOVCC (delay20ms). Signed-off-by: Jitao Shi Change-Id: Ic5212e2145a7dbf2efef9e5585904a93e1bc5a28 --- drivers/gpu/drm/panel/panel-boe-tv101wum-nl6.c | 88 +++--- include/drm/panel_boe_tv101wum_nl6.h | 28 +

[PATCH] drm/mediatek: dsi: Use IRQF_TRIGGER_NONE for dsi irq trigger type

The interrupt trigger is already set by OF. When do devm_request_irq() in driver, please use IRQF_TRIGGER_NONE and don't specify trigger type again. Change-Id: Ie59d7bd9a44a130420890b169cc2e6fee3ad7633 Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 3 +-- 1 file chang

[PATCH] drm/mediatek: dsi: Fix EoTp flag

SoC will transmit the EoTp (End of Transmission packet) when MIPI_DSI_MODE_EOT_PACKET flag is set. Enabling EoTp will make the line time larger, so the hfp and hbp should be reduced to keep line time. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 8 ++-- 1 file changed

[PATCH] drm/mediatek: DP HPD Detect with debounce

implemented only after HPD low has been detected for 100ms. Timing requirements in this Standard related to the detection of HPD high are to be interpreted as applying from the completion of an implementation-dependent de-bounce period. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek

[PATCH v14 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

On Thu, 2016-04-14 at 16:28 +0200, Thierry Reding wrote: > On Sun, Apr 03, 2016 at 12:20:45PM +0800, Jitao Shi wrote: > [...] > > diff --git a/drivers/gpu/drm/bridge/parade-ps8640.c > > b/drivers/gpu/drm/bridge/parade-ps8640.c > > new file mode 100644 > > index

[PATCH v15 1/2] Documentation: bridge: Add documentation for ps8640 DT properties

Add documentation for DT properties supported by ps8640 DSI-eDP converter. Signed-off-by: Jitao Shi Acked-by: Rob Herring Reviewed-by: Philipp Zabel --- Changes since v14: - change mode-sel-gpios as optional. --- .../devicetree/bindings/display/bridge/ps8640.txt | 44

[PATCH v15 2/2] drm/bridge: Add I2C based driver for ps8640 bridge

This patch adds drm_bridge driver for parade DSI to eDP bridge chip. Signed-off-by: Jitao Shi Reviewed-by: Daniel Kurtz --- Changes since v14: - update copyright info. - change bridge_to_ps8640 and connector_to_ps8640 to inline function. - fix some coding style. - use sizeof as array

[PATCH 1/2] arm64: dts: mt8183: add dsi node

Add dsi and mipitx nodes to the mt8183 Signed-off-by: Jitao Shi --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 24 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index b36e37fcdfe3

[PATCH v2 0/2] add dsi pwm0 node for mt8183

001/ https://patchwork.kernel.org/cover/10846677/ https://patchwork.kernel.org/patch/10893519/ Jitao Shi (2): arm64: dts: mt8183: add dsi node arm64: dts: mt8183: add pwm0 node arch/arm64/boot/dts/mediatek/mt8183.dtsi | 35 1 file changed, 35 insertions(+)

[PATCH 2/2] arm64: dts: mt8183: add pwm0 node

Add pwm0 node to the mt8183 Signed-off-by: Jitao Shi --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 84f465fa4fac..b0dda57a7e23 100644 --- a

Re: [v2 3/3] drm/mediatek: add mipi_tx driver for mt8183

On Mon, 2019-05-06 at 17:17 +0800, CK Hu wrote: > Hi, Jitao: > > On Tue, 2019-04-16 at 13:42 +0800, Jitao Shi wrote: > > This patch add mt8183 mipi_tx driver. > > And also support other chips that use the same binding and driver. > > > > Signed-off-by: Jitao

[v3 3/3] drm/mediatek: add mipi_tx driver for mt8183

This patch add mt8183 mipi_tx driver. And also support other chips that use the same binding and driver. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_mipi_tx.c| 2 + drivers/gpu/drm/mediatek/mtk_mipi_tx.h| 1

[v3 1/3] dt-bindings: display: mediatek: update dsi supported chips

Update device tree binding documentation for the dsi for Mediatek MT8183 SoCs. Signed-off-by: Jitao Shi Acked-by: Rob Herring --- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree

[v3 2/3] drm/mediatek: separate mipi_tx to different file

Different IC has different mipi_tx setting of dsi. This patch separates the mipi_tx hardware relate part for mt8173. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_mipi_tx.c| 342 ++ drivers/gpu/drm

[v3 0/3] Support mipitx on mt8183

Changes since v2: - update Acked-by: Rob Herring - update mt8183 max bit rate support Changes since v1: - update dt-bindings document for mt8183 mipitx. - remove mtk_mipitx_clk_get_ops and assign clk_ops in probe. - fix the lincence - remove txdiv1 from mtk_mipi_tx_pll_prepare Jitao Shi

[v4 4/5] drm/mediatek: control dpi pins dpi or gpio mode in on or off

Pull dpi pins low when dpi has nothing to display. Aovid leakage current from some dpi pins (Hsync Vsync DE ... ). Some chips have dpi pins, but there are some chip don't have pins. So this function is controlled by chips driver data. Signed-off-by: Jitao Shi --- drivers/gpu/drm/med

[v4 3/5] drm/mediatek: add mt8183 dpi dual edge support

Add mt8183 dual edge support. DPI sample the data both rising and falling edge. It can reduce half data io pins. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers

[v4 1/5] dt-bindings: display: mediatek: update dpi supported chips

Add decriptions about supported chips, including MT2701 & MT8173 & mt8183 Signed-off-by: Jitao Shi Reviewed-by: Rob Herring --- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt| 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings

[v4 0/5] Support dpi for mt8183

Changes since v3: - add dpi pin mode control when dpi on or off. - update dpi dual edge comment. Changes since v2: - update dt-bindings document for mt8183 dpi. - separate dual edge modfication as independent patch. Jitao Shi (5): dt-bindings: display: mediatek: update dpi supported chips

[v4 2/5] drm/mediatek: dpi dual edge support

DPI sample the data both rising and falling edge. It can reduce half data io pins. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek

[v4 5/5] drm/mediatek: add mt8183 support dpi pins control

Some DPI pins(Hsync Vsync DE ... ) keep high voltage and will cause leakage current. So set dpi pin as gpio and pull low when dpi off. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b

[v3 7/7] drm: mediatek: adjust dsi and mipi_tx probe sequence

mtk_mipi_tx is the phy of mtk_dsi. mtk_dsi get the phy(mtk_mipi_tx) in probe(). So, mtk_mipi_tx init should be ahead of mtk_dsi. Or mtk_dsi will defer to wait mtk_mipi_tx probe done. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +- 1 file changed, 1 insertion(+), 1

[v3 3/7] drm/mediatek: add dsi reg commit disable control

d-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index a48db056df6c..fd367985c7fd 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gp

[v3 5/7] drm/mediatek: add mt8183 dsi driver support

Add mt8183 dsi driver data. Enable size control and reg commit control. Signed-off-by: Jitao Shi Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dsi.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index

[v3 4/7] drm/mediatek: add frame size control

Our new DSI chip has frame size control. So add the driver data to control for different chips. Signed-off-by: Jitao Shi Reviewed-by: CK Hu --- drivers/gpu/drm/mediatek/mtk_dsi.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm

[v3 1/7] drm/mediatek: move mipi_dsi_host_register to probe

DSI panel driver need attach function which is inculde in mipi_dsi_host_ops. If mipi_dsi_host_register is not in probe, dsi panel will probe fail or more delay. So move the mipi_dsi_host_register to probe from bind. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 50

[v3 0/7] Support dsi for mt8183

73 is different with mt2701" Jitao Shi (7): drm/mediatek: move mipi_dsi_host_register to probe drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701 drm/mediatek: add dsi reg commit disable control drm/mediatek: add frame size control drm/mediatek: add mt8183

[v3 2/7] drm/mediatek: fixes CMDQ reg address of mt8173 is different with mt2701

Config the different CMDQ reg address in driver data. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 29 - 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index

[v3 6/7] drm/mediatek: change the dsi phytiming calculate method

- data_phy_cycles * lanes - 12; Note: //(2: 1 for sync, 1 for phy idle) data_phy_cycles = T_hs_exit + T_lpx + T_hs_prepare + T_hs_zero + 2; bpp: bit per pixel Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 119 + 1 file changed, 86 insertions

Re: [v2 2/5] drm/mediatek: CMDQ reg address of mt8173 is different with mt2701

On Wed, 2019-05-08 at 10:39 +0800, CK Hu wrote: > On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > > Config the different CMDQ reg address in driver data. > > > For MT8173, you change reg_cmd_off from 0x180 to 0x200, so this patch is > a bug fix. You should add a '

Re: [v2 1/5] drm/mediatek: move mipi_dsi_host_register to probe

On Tue, 2019-05-07 at 17:52 +0800, CK Hu wrote: > Hi, Jitao: > > On Tue, 2019-04-16 at 14:04 +0800, Jitao Shi wrote: > > DSI panel driver need attach function which is inculde in > > mipi_dsi_host_ops. > > > > If mipi_dsi_host_register is not in probe, dsi panel

Re: [v3 3/3] drm/mediatek: add mt8183 dpi support

On Tue, 2019-05-07 at 15:41 +0800, CK Hu wrote: > Hi, Jitao: > > On Tue, 2019-04-16 at 13:52 +0800, Jitao Shi wrote: > > I need the commit message. Even though the code is easy to understand, > words for this patch is still necessary. > > Regards, > CK > I'l

[PATCH 2/2] pwm/mtk_disp: fix update reg issue when chip doesn't have commit

The setting of disable double buffer will lose when suspend and resume. So config them again in pwm config. Signed-off-by: Jitao Shi --- drivers/pwm/pwm-mtk-disp.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/pwm/pwm-mtk-disp.c b/drivers/pwm/pwm-mtk-disp.c index

[PATCH 1/2] pwm: fine tune pwm-mtk-disp clock control flow

Match pwm clock when suspend and resume. Prepare and enable disp_pwm clock when disp_pwm enable. Disable and unprepare disp_pwm clock when disp_pwm disable. Signed-off-by: Jitao Shi --- drivers/pwm/pwm-mtk-disp.c | 43 +++--- 1 file changed, 12 insertions(+), 31

[PATCH 0/2] fix pwm_mtk_disp suspend/resume issues.

Change in patches: - match pwm_mtk_disp clock when suspend/resume - trigger pwm_mtk_disp reg working after config Jitao Shi (2): pwm: fine tune pwm-mtk-disp clock control flow pwm/mtk_disp: fix update reg issue when chip doesn't have commit drivers/pwm/pwm-mtk-disp.c

[PATCH] drm/mediatek: add dsi module reset driver

Reset dsi HW to default when power on. Prevent the setting differet between bootloader and kernel. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 35 ++ 1 file changed, 35 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers

Re: [PATCH v2] gpu/drm: mediatek: call mtk_dsi_stop() after mtk_drm_crtc_atomic_disable()

On Fri, 2019-03-22 at 13:05 +0800, Hsin-Yi Wang wrote: > On Fri, Mar 22, 2019 at 9:21 AM CK Hu wrote: > > > > Hi, Hsin-yi: > > > > On Thu, 2019-03-21 at 22:09 +0800, Hsin-Yi Wang wrote: > > > On Thu, Mar 21, 2019 at 9:46 AM CK Hu wrote: > > > > > > > > Hi, Hsin-yi: > > > > > > > > On Thu, 2019-03

[v2 1/3] dt-bindings: display: mediatek: update dsi supported chips

Update device tree binding documentation for the dsi for Mediatek MT8183 SoCs. Signed-off-by: Jitao Shi --- .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/mediatek

[v2 3/3] drm/mediatek: add mipi_tx driver for mt8183

This patch add mt8183 mipi_tx driver. And also support other chips that use the same binding and driver. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_mipi_tx.c| 2 + drivers/gpu/drm/mediatek/mtk_mipi_tx.h| 1

[v2 0/3] support mipitx on mt8183

Changes since v1: - update dt-bindings document for mt8183 mipitx. - remove mtk_mipitx_clk_get_ops and assign clk_ops in probe. - fix the lincence - remove txdiv1 from mtk_mipi_tx_pll_prepare *** BLURB HERE *** Jitao Shi (3): dt-bindings: display: mediatek: update dsi supported chips drm

[v2 2/3] drm/mediatek: separate mipi_tx to different file

Different IC has different mipi_tx setting of dsi. This patch separates the mipi_tx hardware relate part for mt8173. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/Makefile | 1 + drivers/gpu/drm/mediatek/mtk_mipi_tx.c| 340 ++ drivers/gpu/drm

[v3 3/3] drm/mediatek: add mt8183 dpi support

Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 66405159141a..fbb087218775 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b

[v3 1/3] dt-bindings: display: mediatek: update dpi supported chips

Add decriptions about supported chips, including MT2701 & MT8173 & mt8183 Signed-off-by: Jitao Shi --- .../devicetree/bindings/display/mediatek/mediatek,dpi.txt| 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dp

[v3 2/3] drm/mediatek: dpi dual edge support

Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 10 ++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index 22e68a100e7b..66405159141a 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers

[v3 0/3] support dpi for mt8183

Changes since v2: - update dt-bindings document for mt8183 dpi. - separate dual edge modfication as independent patch. *** BLURB HERE *** Jitao Shi (3): dt-bindings: display: mediatek: update dpi supported chips drm/mediatek: dpi dual edge support drm/mediatek: add mt8183 dpi support

[v2 4/5] drm/mediatek: add frame size control

Our new DSI chip has frame size control. So add the driver data to control for different chips. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index

[v2 1/5] drm/mediatek: move mipi_dsi_host_register to probe

DSI panel driver need attach function which is inculde in mipi_dsi_host_ops. If mipi_dsi_host_register is not in probe, dsi panel will probe fail or more delay. So move the mipi_dsi_host_register to probe from bind. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 50

[v2 0/5] support dsi for mt8183

Changes since v1: - separate frame size and reg commit control independent patches. - fix some return values in probe - remove DSI_CMDW0 in "CMDQ reg address of mt8173 is different with mt2701" Jitao Shi (5): drm/mediatek: move mipi_dsi_host_register to probe drm/mediatek: CMDQ r

[v2 5/5] drm/mediatek: add mt8183 dsi driver support

Add mt8183 dsi driver data. Enable size control and reg commit control. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 458a700ce74c

[v2 3/5] drm/mediatek: add dsi reg commit control

New DSI IP has shadow register and working reg. The register values are writen to shadow register. And then trigger with commit reg, the register values will be moved working register. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 10 ++ 1 file changed, 10 insertions

[v2 2/5] drm/mediatek: CMDQ reg address of mt8173 is different with mt2701

Config the different CMDQ reg address in driver data. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dsi.c | 39 +++--- 1 file changed, 30 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c

[PATCH 2/2] arm64: dts: mt8183: add pwm0 node

Add pwm0 node to the mt8183 Signed-off-by: Jitao Shi --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 80929a0e5a6f..2830008c4921 100644 --- a

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