Hi Heiko,
On Tue, 18 Feb 2025 11:00:57 +0100, Heiko Stübnerwrote:
>So I guess step1, check what error is actually returned.
I have checked that the return value is -517:
rockchip-drm display-subsystem: [drm] *ERROR* failed to get pll_hdmiphy1 with
-517
>Step2 check if clk_get_optional need to
Hi,
On Tue, 18 Feb 2025 01:33:34 +0200, Cristian Ciocaltea wrote:
>@Jianfeng: Did you encounter any particular issue with the current approach?
This patch is adding a dependency of hdptxphy1 to vop for all rk3588
boards, but not all rk3588 boards have dual hdmi, armsom sige7 is an
example. At run
Hi Cristian,
No matter one or two hdmi ports the rk3588 boards have, most of
devicetrees in mainline kernel only have hdmi0 supported. After applying
this patch their hdmi0 support is broken.
So I recommend moving the vop clk part to board level devicetree.
Then support of hdmi0 won't be broken,
Hi Cristian,
On Sat, 15 Feb 2025 02:55:39 +0200, Cristian Ciocaltea wrote:
>The HDMI1 PHY PLL clock source cannot be added directly to vop node in
>rk3588-base.dtsi, along with the HDMI0 related one, because HDMI1 is an
>optional feature and its PHY node belongs to a separate (extra) DT file.
>
>T
