Add CRC support to DPU, which is currently not supported by
this driver. Only supports CRC for CRTC for now, but will extend support
to other blocks later on.
Tested on Qualcomm RB3 (debian, sdm845)
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 169
On 10/11/2021 7:01 PM, Dmitry Baryshkov wrote:
On 12/10/2021 02:41, Jessica Zhang wrote:
Add CRC support to DPU, which is currently not supported by
this driver. Only supports CRC for CRTC for now, but will extend support
to other blocks later on.
Tested on Qualcomm RB3 (debian, sdm845
c
drivers/gpu/drm/msm/dsi/dsi_host.c:2380 msm_dsi_host_power_on() warn:
missing error code 'ret'
Is there a specific .config you're using (that's not the default
mainline defconfig)? If so, can you please share it?
Thanks,
Jessica Zhang
regards,
dan carpenter
On 10/15/2021 1:12 AM, Dan Carpenter wrote:
On Thu, Oct 14, 2021 at 06:43:22PM -0700, Jessica Zhang wrote:
Hey Dan,
On 10/1/2021 5:31 AM, Dan Carpenter wrote:
Hello Sean Paul,
The patch a6bcddbc2ee1: "drm/msm: dsi: Handle dual-channel for 6G as
well" from Jul 25, 2018, le
Hey Dmitry,
On 10/15/2021 11:24 AM, Dmitry Baryshkov wrote:
On Fri, 15 Oct 2021 at 04:43, Jessica Zhang wrote:
Hey Dan,
On 10/1/2021 5:31 AM, Dan Carpenter wrote:
Hello Sean Paul,
The patch a6bcddbc2ee1: "drm/msm: dsi: Handle dual-channel for 6G as
well" from Jul 25, 2018, le
On 10/16/2021 12:35 PM, Dan Carpenter wrote:
On Fri, Oct 15, 2021 at 12:34:20PM -0700, Jessica Zhang wrote:
Hey Dmitry,
On 10/15/2021 11:24 AM, Dmitry Baryshkov wrote:
On Fri, 15 Oct 2021 at 04:43, Jessica Zhang wrote:
Hey Dan,
On 10/1/2021 5:31 AM, Dan Carpenter wrote:
Hello Sean Paul
quot;\t\tp_level = %d\n",
190 debug->link->phy_params.p_level);
191 if (dp_debug_check_buffer_overflow(rc, &max_size, &len))
192 goto error;
193
--> 194 if (copy_to_user(user_buff, buf, len))
This function does not take "
-by: Jessica Zhang
[1] Skipped on RB5 due to issue related to DPMS. Planning to upload a
fix for this in the future.
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 153 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 19 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 56
^
Got it. I'll take care of the null pointer issues, but planning to
address the `(void)pe` issue in this patch:
https://patchwork.freedesktop.org/patch/456592/
Thanks,
Jessica Zhang
You should file a bug report with your compiler devs instead of adding
these sorts of
Move initialization of sblk in _sspp_subblk_offset() after NULL check to
avoid potential NULL pointer dereference.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Reported-by: Dan Carpenter
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 8 +
Change byte_clk_rate, pixel_clk_rate, esc_clk_rate, and src_clk_rate
from u32 to unsigned long, since clk_get_rate() returns an unsigned long.
Fixes: a6bcddbc2ee1 ("drm/msm: dsi: Handle dual-channel for 6G as well")
Reported-by: Dan Carpenter
Signed-off-by: Jessica Zhang
---
drive
Add NULL checks in KMS CRTC funcs to avoid potential NULL
dereference.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Reported-by: Dan Carpenter
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_irq.c | 8
drivers/gpu/drm/msm/disp/dpu1/
On 10/22/2021 10:20 AM, Rob Clark wrote:
From: Rob Clark
Signed-off-by: Rob Clark
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1
expansion
of macro ‘static_assert’
192 | static_assert(ARRAY_SIZE(crcs) ==
ARRAY_SIZE(crtc_state->mixers));
| ^
Can be fixed by moving the static_assert() before `crtc_state = ...`
Thanks,
Jessica Zhang
/* Skip first 2 frames in case of "uncooked"
r DPU")
Signed-off-by: Rob Clark
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 16 +---
1 file changed, 5 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 0a
"
Signed-off-by: Nathan Chancellor
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 2523e829f485..967245b8cc02 100644
--- a/
2da089421..094b39bfed8c 100644
--- a/drivers/gpu/drm/msm/dp/dp_parser.h
+++ b/drivers/gpu/drm/msm/dp/dp_parser.h
@@ -10,7 +10,7 @@
#include
#include
-#include "dpu_io_util.h"
+#include "dp_clk_util.h"
#include "msm_drv.h"
#define DP_LABEL "MDSS
On 1/19/2022 2:16 PM, Dmitry Baryshkov wrote:
Move clock/IO/hrtimer utility functions from msm_drv.c to new
msm_io_utils.c file.
Signed-off-by: Dmitry Baryshkov
Tested on: Qualcomm RB3 (debian, sdm845), Qualcomm RB5 (debian, qrb5165)
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm
implementation is unchanged for now.
Signed-off-by: Dmitry Baryshkov
Tested on: Qualcomm RB3 (debian, sdm845), Qualcomm RB5 (debian, qrb5165)
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 24 ++-
drivers
On 6/2/2022 3:31 PM, Dmitry Baryshkov wrote:
On 27/05/2022 23:11, Jessica Zhang wrote:
On 5/27/2022 12:38 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for setting MISR registers within the interface
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm
On 6/2/2022 3:51 PM, Dmitry Baryshkov wrote:
On 28/05/2022 01:23, Jessica Zhang wrote:
On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup
On 6/3/2022 12:02 AM, Dmitry Baryshkov wrote:
On Fri, 3 Jun 2022 at 04:02, Jessica Zhang wrote:
On 6/2/2022 3:51 PM, Dmitry Baryshkov wrote:
On 28/05/2022 01:23, Jessica Zhang wrote:
On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for
- Updated copyrights
- Changed crcs array to a dynamically allocated array and added it as a
member of crtc_state
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 88 +
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 4 +
drivers/gpu/drm/msm/disp
dpu_crtc_state
- Collect CRCs for all drm_encoders connected to the crtc
Jessica Zhang (3):
drm/msm/dpu: Move LM CRC code into separate method
drm/msm/dpu: Add MISR register support for interface
drm/msm/dpu: Add interface support for CRC debugfs
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 131
Add support for setting MISR registers within the interface
Changes since V1:
- Replaced dpu_hw_intf collect_misr and setup_misr implementations with
calls to dpu_hw_utils helper methods
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 19
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Changes since V1:
- Set values_cnt to only include phys with backing hw_intf
- Loop over all drm_encs connected to crtc
Signed-off-by: Jessica Zhang
---
drivers/gpu
On 6/15/2022 2:35 AM, Dmitry Baryshkov wrote:
On Wed, 15 Jun 2022 at 00:13, Jessica Zhang wrote:
Move layer mixer-specific section of dpu_crtc_get_crc() into a separate
helper method. This way, we can make it easier to get CRCs from other HW
blocks by adding other get_crc helper methods
On 6/15/2022 2:44 AM, Dmitry Baryshkov wrote:
On Wed, 15 Jun 2022 at 00:13, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Changes since V1:
- Set values_cnt to only include phys with
On 6/15/2022 9:17 AM, Dmitry Baryshkov wrote:
On 15/06/2022 19:11, Jessica Zhang wrote:
On 6/15/2022 2:35 AM, Dmitry Baryshkov wrote:
On Wed, 15 Jun 2022 at 00:13, Jessica Zhang
wrote:
Move layer mixer-specific section of dpu_crtc_get_crc() into a separate
helper method. This way, we can
dpu_crtc_state
- Collect CRCs for all drm_encoders connected to the crtc
Changes since V2:
- Separate dpu_hw_util changes into a separate patch
- Revert back to using a static array and define a macro for MAX_CRC_ENTRIES
Jessica Zhang (4):
drm/msm/dpu: Move LM CRC code into separate method
drm/msm/dpu
: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 42 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 49 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 16 +++
3 files changed, 67 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm
- Add DPU_CRTC_MAX_CRC_ENTRIES macro
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 79 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 8 +++
2 files changed, 56 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1
and collect_misr in
dpu_encoder_get_num_hw_intfs
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 50 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 3 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 64 +
drivers/gpu/drm/msm/disp/dpu1/dpu_encod
Add support for setting MISR registers within the interface
Changes since V1:
- Replaced dpu_hw_intf collect_misr and setup_misr implementations with
calls to dpu_hw_utils helper methods
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1
On 6/20/2022 11:42 PM, Dmitry Baryshkov wrote:
On Tue, 21 Jun 2022 at 03:50, Jessica Zhang wrote:
Move layer mixer-specific section of dpu_crtc_get_crc() into a separate
helper method. This way, we can make it easier to get CRCs from other HW
blocks by adding other get_crc helper methods
On 6/20/2022 11:36 PM, Dmitry Baryshkov wrote:
On Tue, 21 Jun 2022 at 03:50, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Changes since V1:
- Set values_cnt to only include phys with
"enc" source string to "encoder"
Jessica Zhang (4):
drm/msm/dpu: Move LM CRC code into separate method
drm/msm/dpu: Move MISR methods to dpu_hw_util
drm/msm/dpu: Add MISR register support for interface
drm/msm/dpu: Add interface support for CRC debugfs
drivers/g
: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 65 +++-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 2 +
2 files changed, 43 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index
: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 42 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.c | 49 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_util.h | 16 +++
3 files changed, 67 insertions(+), 40 deletions
Add support for setting MISR registers within the interface
Changes since V1:
- Replaced dpu_hw_intf collect_misr and setup_misr implementations with
calls to dpu_hw_utils helper methods
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1
and collect_misr in
dpu_encoder_get_num_hw_intfs
Changes since V3:
- Remove extra whitespace
- Change "enc" to "encoder"
- Move crcs array to dpu_crtc_get_encoder_crc
- Rename dpu_encoder_get_num_hw_intfs to dpu_encoder_get_crc_values_cnt
Signed-off-by: Jessica Zhang
---
drivers/
e test that fails to see frame counts
increase on Trogdor boards.
Cc: Mark Yacoub
Cc: Jessica Zhang
Fixes: 885455d6bf82 ("drm/msm: Change dpu_crtc_get_vblank_counter to use vsync
count.")
Signed-off-by: Stephen Boyd
Tested-by: Jessica Zhang # Trogdor (sc7180)
---
drivers/gpu/drm/m
implementation is unchanged for now.
Signed-off-by: Dmitry Baryshkov
Tested-by: Jessica Zhang # RB3 (sdm845) and
RB5 (qrb5165)
Reviewed-by: Jessica Zhang
---
drivers/gpu/drm/msm/Makefile | 2 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 24 ++-
drivers/gpu/drm
On 1/31/2022 1:05 PM, Dmitry Baryshkov wrote:
In order to simplify DP code, drop hand-coded loops over clock arrays,
replacing them with clk_bulk_* functions.
Signed-off-by: Dmitry Baryshkov
Tested-by: Jessica Zhang # RB3 (sdm845) and
RB5 (qrb5165)
Reviewed-by: Jessica Zhang
the debug log in dpu_crtc_get_crc.
Signed-off-by: Jessica Zhang
Tested-by: Jessica Zhang # RB5 (qrb5165)
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm
the debug log in dpu_crtc_get_crc.
Changes since V1:
- Added reported-by and suggested-by tags
Reported-by: Dmitry Baryshkov
Suggested-by: Rob Clark
Signed-off-by: Jessica Zhang
Tested-by: Jessica Zhang # RB5 (qrb5165)
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 3 ++-
drivers/gpu/drm/msm
x27;s have mdp5_pipe_release check if
mdp5_get_global_state returns an error and propogate that error.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c | 14 ++
drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.h | 2 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_pl
x27;s have mdp5_pipe_release check if
mdp5_get_global_state returns an error and propogate that error.
Changes since v1:
- Separated declaration and initialization of *new_state to avoid
compiler warning
- Fixed some spelling mistakes in commit message
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm
On 5/5/2022 1:48 AM, Dmitry Baryshkov wrote:
On Thu, 5 May 2022 at 05:06, Rob Clark wrote:
On Wed, May 4, 2022 at 6:55 PM Jessica Zhang wrote:
mdp5_get_global_state runs the risk of hitting a -EDEADLK when acquiring
the modeset lock, but currently mdp5_pipe_release doesn't check f
is NULL as this is considered normal
behavior
- Added 2nd patch in series to fix a similar NULL dereference issue in
mdp5_mixer_release
Reported-by: Tomeu Vizoso
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_pipe.c | 15 +++
drivers/gpu/drm/msm/disp/mdp5/m
turned and propagate that error.
Reported-by: Tomeu Vizoso
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 10 --
drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.c | 15 +++
drivers/gpu/drm/msm/disp/mdp5/mdp5_mixer.h | 4 ++--
3 files changed, 21 insert
Add writeback support to modetest with the below options:
- Passing in -c will now also show the writeback connector
- Test a built-in mode on writeback connector
- Test a custom mode from user input on writeback connector
Usage: "./modetest -M msm -x :
-a -P @:+0+0@RG24."
Refer
oped-by: Rohith Iyer
Signed-off-by: Jessica Zhang
---
tests/modetest/buffers.c | 19
tests/modetest/buffers.h | 1 +
tests/modetest/modetest.c | 183 ++
3 files changed, 184 insertions(+), 19 deletions(-)
diff --git a/tests/modetest/buffers.c b/test
From: Rohith Iyer
Fix null pointer deference caused by drmModeAtomicReq being
allocated before set_property was called when modetest was run
with the atomic flag.
Reviewed-by: Rob Clark
Signed-off-by: Rohith Iyer
---
tests/modetest/modetest.c | 4 +++-
1 file changed, 3 insertions(+), 1 delet
robably skip checking the results for kms_universal_plane on
Trogdor for now, since this is a test affected by the hack regression.
There is an IGT patch in the works for fixing the
disable-primary-vs-flip-pipe-b failure, so it should be updated pretty
soon too.
Thanks,
Jessica Zhang
+igt@kms_
test starts skipping now whereas
it was previously passing.
Restore DRM_MODE_ROTATE_180 bit to the supported rotations
list.
Fixes: dabfdd89eaa92 ("add inline rotation support for sc7280")
Signed-off-by: Abhinav Kumar
Tested-by: Jessica Zhang # Trogdor (SC8170)
---
drivers/gpu/dr
Limit writeback modes according to max_linewidth to allow
even compositors/clients which use only a single SSPP to
use writeback.
Fixes: 77b001acdcfeb ("drm/msm/dpu: add the writeback connector layer")
Reported-by: Jessica Zhang
Tested-by: Jessica Zhang # Trogdor (SC8170)
Signed-off-by
Refactor existing CRC code for layer mixer and add CRC support for interface
blocks
Jessica Zhang (3):
drm/msm/dpu: Separate LM-specific CRC code from generic CRC code
drm/msm/dpu: Add MISR register support for interface
drm/msm/dpu: Add interface support for CRC debugfs
drivers/gpu/drm
Move layer mixer-specific section of dpu_crtc_get_crc() into a separate
helper method. This way, we can make it easier to get CRCs from other HW
blocks by adding other get_crc helper methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 72
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c| 43 ++-
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h| 3 +
drivers/gpu/drm
Add support for setting MISR registers within the interface
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 55 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 8 ++-
2 files changed, 61 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu
On 5/27/2022 12:38 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for setting MISR registers within the interface
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c | 55 -
drivers/gpu/drm/msm/disp/dpu1
On 5/27/2022 12:46 PM, Dmitry Baryshkov wrote:
On 27/05/2022 21:54, Jessica Zhang wrote:
Add support for writing CRC values for the interface block to
the debugfs by calling the necessary MISR setup/collect methods.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1
me and go with random factors. It's not terribly
surprising that the hang is gone after this patch since the line of
code that was failing is no longer present in the kernel.
Fixes: a670ff578f1f ("drm/msm/dpu: always use mdp device to scale bandwidth")
Fixes: c33b7c0389e1 ("
qs last enabled at (55938): []
__do_softirq+0x1e8/0x480
[ 3092.848256] softirqs last disabled at (55923): []
__irq_exit_rcu+0xdc/0x140
[ 3092.857022] ---[ end trace 0000 ]---
Thanks,
Jessica Zhang
Cc: "Kazlauskas, Nicholas"
Cc: Dmitry Osipenko
Signed-off-by:
Add support for HDR color formats.
XR30 linear/compressed format has been validated with null_platform_test
on SC7180, and P010 linear has been validated with plane_test (also on
SC7180).
Jessica Zhang (2):
drm/msm/dpu: Add support for XR30 format
drm/msm/dpu: Add support for P010 format
Add support for XR30 color format. This supports both linear and
compressed formats.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 7 +++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 2 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 1 +
3 files
Add support for P010 color format. This adds support for both linear and
compressed formats.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c| 17 -
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c
oped-by: Rohith Iyer
Signed-off-by: Jessica Zhang
---
tests/modetest/buffers.c | 19
tests/modetest/buffers.h | 1 +
tests/modetest/modetest.c | 183 ++
3 files changed, 184 insertions(+), 19 deletions(-)
diff --git a/tests/modetest/buffers.c b/test
From: Rohith Iyer
Fix null pointer deference caused by drmModeAtomicReq being
allocated before set_property was called when modetest was run
with the atomic flag.
Reviewed-by: Rob Clark
Signed-off-by: Rohith Iyer
Signed-off-by: Jessica Zhang
---
tests/modetest/modetest.c | 4 +++-
1 file
Resending to correct typo in email list and adding "Signed-off-by" to
Patch [1/2] ("tests/modetest: Allocate drmModeAtomicReq before setting
properties"
---
Add writeback support to modetest with the below options:
- Passing in -c will now also show the writeback connector
- Test a built-in mod
Hi Dmitry,
On 9/12/2022 11:33 AM, Dmitry Baryshkov wrote:
On 01/09/2022 23:34, Jessica Zhang wrote:
Add support for HDR color formats.
XR30 linear/compressed format has been validated with null_platform_test
on SC7180, and P010 linear has been validated with plane_test (also on
SC7180).
Are
Hi Dmitry,
On 9/1/2022 11:40 PM, Dmitry Baryshkov wrote:
On 2 September 2022 02:09:24 GMT+03:00, Jessica Zhang
wrote:
From: Rohith Iyer
Add writeback support to modetest with the below options:
- Passing in -c will now also show the writeback connector
- Test a built-in mode on
wb or intf indices correctly.
Fixes: ae4d721ce100 ("drm/msm/dpu: add an API to reset the encoder related hw
blocks")
Signed-off-by: Abhinav Kumar
Reviewed-by: Jessica Zhang
Tested-by: Jessica Zhang # Trogdor (SC8170)
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 6 +
quire userspace to set properties in a specific order (i.e. to
enable solid_fill, userspace would have to first set FB_ID to NULL then
set SOLID_FILL).
I'm not sure how much of a can of worms that would be for userspace, but
if you're fine with having that as a requirement the I can re-add the code.
Thanks,
Jessica Zhang
Thanks,
pq
top.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L1109
[2]
https://gitlab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L2339
[3] https://patchwork.freedesktop.org/series/112332/
Signed-off-by: Jessica Zhang
---
.../drm/msm/disp/d
On 2/8/2023 2:18 PM, Dmitry Baryshkov wrote:
On 08/02/2023 23:37, Jessica Zhang wrote:
Currently, DPU will enable TE during prepare_commit(). However, this
will cause issues when trying to read/write to register in
get_autorefresh_config(), because the core clock rates aren't set at
Move TE setup to prepare_for_kickoff() and remove empty prepare_commit()
functions in both MDP4 and DPU drivers.
Changes in V2:
- Added changes to remove empty prepare_commit() functions
Jessica Zhang (4):
drm/msm/dpu: Move TE setup to prepare_for_kickoff()
drm/msm: Check for NULL before
top.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L1109
[2]
https://gitlab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L2339
[3] https://patchwork.freedesktop.org/series/112332/
Signed-off-by: Jessica Zhang
---
.../drm/msm/disp/d
Add a NULL check before calling prepare_commit() in
msm_atomic_commit_tail()
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/msm_atomic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index
Now that the TE setup has been moved to prepare_for_kickoff(),
move empty prepare_commit() from DPU driver.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 19 -
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 7 ---
.../drm/msm/disp/dpu1
Remove empty prepare_commit() function from MDP4 driver.
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 9a1a0769575d
On 2/9/2023 10:51 AM, Dmitry Baryshkov wrote:
On 09/02/2023 20:44, Jessica Zhang wrote:
Currently, DPU will enable TE during prepare_commit(). However, this
will cause issues when trying to read/write to register in
get_autorefresh_config(), because the core clock rates aren't set at
On 2/9/2023 10:51 AM, Dmitry Baryshkov wrote:
On 09/02/2023 20:44, Jessica Zhang wrote:
Now that the TE setup has been moved to prepare_for_kickoff(),
move empty prepare_commit() from DPU driver.
s/move/remove/
Also the DPU's prepare_commit() is not empty. Please me
me.
For example, I'm looking downstream and it seems to me that the length
for the INTF_0 on MSM8998 should be 0x280. Similarly for SC7280, I'm
seeing that length for INTF + tearcheck should be 0x2c4.
Thanks,
Jessica Zhang
+ INTF_BLK("intf_1", INTF_1, 0
m-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L2339
[3] https://patchwork.freedesktop.org/series/112332/
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/dri
ty
- Fixed spelling mistakes and wording issues
- Picked up "Reviewed-by" tags for patches [2/4] and [4/4]
Jessica Zhang (4):
drm/msm/dpu: Move TE setup to prepare_for_kickoff()
drm/msm: Check for NULL before calling prepare_commit()
drm/msm/dpu: Remove empty prepare_commit() function
Add a NULL check before calling prepare_commit() in
msm_atomic_commit_tail()
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_atomic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm
Now that the TE setup has been moved to prepare_for_kickoff(), and
dpu_encoder_prepare_commit() is not empty, remove prepare_commit()
from DPU driver.
Changes in V3:
- Reworded commit message to be more clear
- Corrected spelling mistake in commit message
Signed-off-by: Jessica Zhang
Remove empty prepare_commit() function from MDP4 driver.
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4
ty
- Fixed spelling mistakes and wording issues
- Picked up "Reviewed-by" tags for patches [2/4] and [4/4]
Changes in V4:
- Reworded commit messages in [1/4] and [3/4] for clarity
- Removed dpu_encoder_phys_cmd_is_ongoing_pptx() function prototype
Jessica Zhang (4):
drm/msm/d
ab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L1109
[2]
https://gitlab.freedesktop.org/drm/msm/-/blob/msm-next/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c#L2339
[3] https://patchwork.freedesktop.org/series/112332/
Signed-off-by: Jessica Zhang
---
dri
Add a NULL check before calling prepare_commit() in
msm_atomic_commit_tail()
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_atomic.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm
commit message
Changes in V4:
- Reworded commit message for clarity
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 19 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 7 ---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21
Remove empty prepare_commit() function from MDP4 driver.
Signed-off-by: Jessica Zhang
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
b/drivers/gpu/drm/msm/disp/mdp4
On 3/1/2023 2:13 AM, Marijn Suijten wrote:
On 2023-03-01 11:08:16, Marijn Suijten wrote:
On 2023-02-21 10:42:55, Jessica Zhang wrote:
Now that the TE setup has been moved to prepare_for_kickoff(), we have
not prepare_commit() callbacks left. This makes dpu_encoder_prepare_commit()
s/not
Add a !drm_atomic_crtc_needs_modeset() check to
_dpu_crtc_setup_cp_blocks() so that CTM is reapplied after a
suspend/resume.
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/23
Signed-off-by: Jessica Zhang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +-
1 file changed, 1 insertion
Add a !drm_atomic_crtc_needs_modeset() check to
_dpu_crtc_setup_cp_blocks() so that CTM is reapplied if the LM/DSPP
blocks were reallocated during modeset.
Changes in V2:
- Fixed commit message
Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/23
Signed-off-by: Jessica Zhang
---
drivers
On 1/17/2023 6:16 PM, Dmitry Baryshkov wrote:
On Wed, 18 Jan 2023 at 04:14, Jessica Zhang wrote:
Add a !drm_atomic_crtc_needs_modeset() check to
_dpu_crtc_setup_cp_blocks() so that CTM is reapplied after a
suspend/resume.
.. or if the LM/DSPP blocks were reallocated by resource
On 1/18/2023 10:57 AM, Harry Wentland wrote:
On 1/4/23 18:40, Jessica Zhang wrote:
Add support for solid_fill property to drm_plane. In addition, add
support for setting and getting the values for solid_fill.
solid_fill holds data for supporting solid fill planes. The property
accepts an
1 - 100 of 1027 matches
Mail list logo
