CC Hans Verkuil
Dne petek, 16. april 2021 ob 13:38:59 CEST je Neil Armstrong napisal(a):
> On 16/04/2021 11:58, Laurent Pinchart wrote:
> > Hi Neil,
> >
> > On Fri, Apr 16, 2021 at 11:27:35AM +0200, Neil Armstrong wrote:
> >> This adds DW-HDMI driver a glue option to disable loading of the CEC
>
Hi!
Dne četrtek, 05. avgust 2021 ob 20:50:39 CEST je Robert Foss napisal(a):
> The return value of drm_bridge_attach() is ignored during
> the it66121_bridge_attach() call, which is incorrect.
>
> Fixes: 988156dc2fc9 ("drm: bridge: add it66121 driver")
> Signed-off-by: Robert Foss
> ---
> drive
Hi!
Dne sreda, 17. marec 2021 ob 16:43:34 CET je Maxime Ripard napisal(a):
> Hi,
>
> Here's an attempt at support the HDMI YUV output on the BCM2711 SoC found on
> the RaspberryPi4.
>
> I took the same approach than what dw-hdmi did already, turning a bunch of
> functions found in that driver in
Dne sreda, 17. marec 2021 ob 17:08:07 CET je Neil Armstrong napisal(a):
> On 17/03/2021 16:43, Maxime Ripard wrote:
> > The atomic_get_output_bus_fmts bridge callback is there to list the
> > available formats for output by decreasing order of preference.
> >
> > On HDMI controllers, we have a fai
Hi!
Dne petek, 19. marec 2021 ob 13:49:20 CET je Maxime Ripard napisal(a):
> All the drivers that implement HDR output call pretty much the same
> function to initialise the hdr_output_metadata property, and while the
> creation of that property is in a helper, every driver uses the same
> code to
Hi!
Dne petek, 19. marec 2021 ob 13:49:21 CET je Maxime Ripard napisal(a):
> All the drivers that support the HDR metadata property have a similar
> function to compare the metadata from one connector state to the next,
> and force a mode change if they differ.
>
> All these functions run pretty
Dne petek, 05. februar 2021 ob 17:01:30 CET je Maxime Ripard napisal(a):
> On Fri, Feb 05, 2021 at 11:21:22AM +0800, Chen-Yu Tsai wrote:
> > On Fri, Feb 5, 2021 at 2:48 AM Jernej Skrabec
wrote:
> > >
> > > Channel 1 has polarity bits for vsync and hsync signals but driver never
> > > sets them. I
Dne petek, 05. februar 2021 ob 17:28:23 CET je Chen-Yu Tsai napisal(a):
> On Sat, Feb 6, 2021 at 12:21 AM Jernej Škrabec
wrote:
> >
> > Dne petek, 05. februar 2021 ob 17:01:30 CET je Maxime Ripard napisal(a):
> > > On Fri, Feb 05, 2021 at 11:21:22AM +0800, Chen-Yu Tsai wr
Dne petek, 05. februar 2021 ob 04:22:56 CET je Chen-Yu Tsai napisal(a):
> On Fri, Feb 5, 2021 at 2:48 AM Jernej Skrabec
wrote:
> >
> > cpce value for 594 MHz is set differently in BSP driver. Fix that.
> >
> > Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
> > Tested-by: And
Dne četrtek, 11. februar 2021 ob 03:28:00 CET je Stephen Boyd napisal(a):
> Quoting Maxime Ripard (2021-02-10 02:29:04)
>
> > Hi Mike, Stephen,
> >
> > On Tue, Feb 09, 2021 at 06:58:56PM +0100, Jernej Skrabec wrote:
> > > CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
> >
Hi!
Dne petek, 30. april 2021 ob 11:44:51 CEST je Maxime Ripard napisal(a):
> Our driver while supporting HDR didn't send the proper colorimetry info
> in the AVI infoframe.
>
> Let's add the property needed so that the userspace can let us know what
> the colorspace is supposed to be.
>
> Signe
Hi!
Dne petek, 30. april 2021 ob 11:44:50 CEST je Maxime Ripard napisal(a):
> The intel driver uses the same logic to attach the Colorspace property
> in multiple places and we'll need it in vc4 too. Let's move that common
> code in a helper.
>
> Signed-off-by: Maxime Ripard
> ---
>
> Changes f
Hi!
Thanks for the patch.
Dne četrtek, 12. november 2020 ob 14:14:51 CET je Xiongfeng Wang napisal(a):
> Fix to return a negative error code from the error handling case instead
> of 0 in function sun8i_dw_hdmi_bind().
>
> Fixes: b7c7436a5ff0 ("drm/sun4i: Implement A83T HDMI driver")
> Reported-
Dne ponedeljek, 16. november 2020 ob 02:09:29 CET je Xiongfeng Wang
napisal(a):
> Fix to return a negative error code from the error handling case instead
> of 0 in function sun8i_dw_hdmi_bind().
>
> Fixes: b7c7436a5ff0 ("drm/sun4i: Implement A83T HDMI driver")
> Reported-by: Hulk Robot
> Signed
Hi Roman!
Dne petek, 27. avgust 2021 ob 15:16:03 CEST je Roman Stratiienko napisal(a):
> +CC: jernej.skra...@gmail.com
>
> пт, 27 авг. 2021 г. в 16:12, Roman Stratiienko :
> >
> > Hello Jernej,
> >
> > During local testing I faced an issue where YV12 buffers are displayed
> > all in blue.
> >
> >
Hi!
Dne petek, 27. avgust 2021 ob 15:16:03 CEST je Roman Stratiienko napisal(a):
> +CC: jernej.skra...@gmail.com
>
> пт, 27 авг. 2021 г. в 16:12, Roman Stratiienko :
> >
> > Hello Jernej,
> >
> > During local testing I faced an issue where YV12 buffers are displayed
> > all in blue.
> >
> > Issue
Dne torek, 31. avgust 2021 ob 19:18:42 CEST je Roman Stratiienko napisal(a):
> Hi Jernej,
>
> вт, 31 авг. 2021 г. в 19:52, Jernej Škrabec :
> >
> > Hi!
> >
> > Dne petek, 27. avgust 2021 ob 15:16:03 CEST je Roman Stratiienko
napisal(a):
> > > +CC: jerne
Hi!
Dne torek, 31. avgust 2021 ob 15:57:39 CEST je Cai Huoqing napisal(a):
> Use the devm_platform_ioremap_resource() helper instead of
> calling platform_get_resource() and devm_ioremap_resource()
> separately
>
> Signed-off-by: Cai Huoqing
Reviewed-by: Jernej Skrabec
Best regards,
Jernej
Hi!
Dne torek, 14. september 2021 ob 10:59:22 CEST je Ondřej Jirman napisal(a):
> Hello Jernej,
>
> On Mon, Sep 13, 2021 at 07:21:54PM +0200, Jernej Skrabec wrote:
> > Recent rework, which made HDMI PHY driver a platform device, inadvertely
> > reversed clock setup order. HW is very touchy about
Hi Julian,
Dne torek, 09. november 2021 ob 04:23:51 CET je Julian Braha napisal(a):
> When PHY_SUN6I_MIPI_DPHY is selected, and RESET_CONTROLLER
> is not selected, Kbuild gives the following warning:
>
> WARNING: unmet direct dependencies detected for PHY_SUN6I_MIPI_DPHY
> Depends on [n]: (ARCH
Hi Neil,
sorry for late response.
Dne petek, 29. oktober 2021 ob 15:59:47 CET je Neil Armstrong napisal(a):
> The current ELD handling takes the internal connector ELD buffer and
> shares it to the I2S and AHB sub-driver.
>
> But with DRM_BRIDGE_ATTACH_NO_CONNECTOR, the connector is created
> el
Hi Alex,
Dne sobota, 06. november 2021 ob 14:00:44 CET je Alex Bee napisal(a):
> As per CEA-861 quantization range is always limited in case of YUV
> output - indepentently which CEA mode it is or if it is an DMT mode.
>
> This is already correctly setup in HDMI AVI inforame, but we always do
> a
Dne sreda, 10. november 2021 ob 21:20:46 CET je Jernej Škrabec napisal(a):
> Hi Alex,
>
> Dne sobota, 06. november 2021 ob 14:00:44 CET je Alex Bee napisal(a):
> > As per CEA-861 quantization range is always limited in case of YUV
> > output - indepentently which CEA mode it
Hi Bernard!
Dne torek, 16. november 2021 ob 03:14:49 CET je Bernard Zhao napisal(a):
> This change is to cleanup the code a bit.
>
> Signed-off-by: Bernard Zhao
Acked-by: Jernej Skrabec
Best regards,
Jernej
> ---
> drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 2 +-
> 1 file changed, 1 inse
Dne torek, 07. december 2021 ob 21:26:50 CET je Doug Anderson napisal(a):
> Hi,
>
> On Tue, Dec 7, 2021 at 12:03 PM Rob Clark wrote:
> > From: Rob Clark
> >
> > Otherwise we don't get another shot at it if the bridge probes before
> > the dsi host is registered. It seems like this is what *mos
Dne torek, 14. december 2021 ob 13:02:48 CET je Emmanuel Gil Peyrot
napisal(a):
> Hi,
>
> After updating Weston from 9f8561e9 to 07326040 (latest master), it
> fails to run on my PinePhone saying “format 0x34325258 not supported by
> output DSI-1” and then exiting.
>
> This format is XR24, which
Dne sreda, 06. januar 2021 ob 21:46:30 CET je Jernej Skrabec napisal(a):
> From: Roman Stratiienko
>
> To set blending channel order register software needs to know state and
> position of each channel, which impossible at plane commit stage.
>
> Move this procedure to atomic_flush stage, where
Dne sreda, 06. januar 2021 ob 20:27:59 CET je Giulio Benetti napisal(a):
> During commit "88bc4178568b8e0331143cc0616640ab72f0cba1" DRM_BUS_FLAG_*
Please use same commit referencing approach as for "Fixes" tag.
> macros have been changed to avoid ambiguity but just because of this
> ambiguity pre
Hi!
Dne četrtek, 23. december 2021 ob 10:59:23 CET je Emmanuel Gil Peyrot
napisal(a):
> On Tue, Dec 14, 2021 at 06:58:56PM +0100, Jernej Škrabec wrote:
> > Dne torek, 14. december 2021 ob 13:02:48 CET je Emmanuel Gil Peyrot
> > napisal(a):
> > > Hi,
> > >
Hi!
Dne četrtek, 16. maj 2019 ob 13:19:06 CEST je Robin Murphy napisal(a):
> On 16/05/2019 00:22, Rob Herring wrote:
> > On Wed, May 15, 2019 at 5:06 PM Clément Péron
wrote:
> >> Hi Robin,
> >>
> >> On Tue, 14 May 2019 at 23:57, Robin Murphy wrote:
> >>> On 2019-05-14 10:22 pm, Clément Péron w
Hi!
Thanks for working on this!
Dne ponedeljek, 20. maj 2019 ob 15:37:50 CEST je Neil Armstrong napisal(a):
> This patch adds a new format_set() callback to the bridge ops permitting
> the encoder to specify the new input format and encoding.
>
> This allows supporting the very specific HDMI2.0
Hi!
Dne ponedeljek, 20. maj 2019 ob 15:37:51 CEST je Neil Armstrong napisal(a):
> In order to support the HDMI2.0 YUV420, YUV422 and the 10bit, 12bit and
> 16bits outpu use cases, add support for the recently introduced bridge
> callback format_set().
>
> This callback will setup the new input fo
Hi!
Dne nedelja, 26. maj 2019 ob 23:18:46 CEST je Jonas Karlman napisal(a):
> Add support for HDR metadata using the hdr_output_metadata connector
> property, configure Dynamic Range and Mastering InfoFrame accordingly.
>
> A drm_infoframe flag is added to dw_hdmi_plat_data that platform drivers
Hi!
Dne četrtek, 11. april 2019 ob 14:32:23 CEST je Maxime Ripard napisal(a):
> On Thu, Apr 11, 2019 at 12:57:12PM +0200, Clément Péron wrote:
> > Hi,
> >
> > The Allwinner H6 has a Mali-T720 MP2. The drivers are
> > out-of-tree so this series only introduce the dt-bindings.
> >
> > The first pa
Dne četrtek, 11. april 2019 ob 12:57:16 CEST je Clément Péron napisal(a):
> Add the mali gpu node to the H6 device-tree.
>
> Signed-off-by: Clément Péron
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/arch/arm64/boot
Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> Hi,
>
> On Thu, 11 Apr 2019 at 17:05, Jernej Škrabec
wrote:
> > Dne četrtek, 11. april 2019 ob 12:57:16 CEST je Clément Péron napisal(a):
> > > Add the mali gpu node to the H6 device-tree.
&g
Dne četrtek, 11. april 2019 ob 17:27:52 CEST je Maxime Ripard napisal(a):
> On Thu, Apr 11, 2019 at 05:23:25PM +0200, Jernej Škrabec wrote:
> > Dne četrtek, 11. april 2019 ob 17:20:04 CEST je Clément Péron napisal(a):
> > > Hi,
> > >
> > > On Thu,
Dne ponedeljek, 21. januar 2019 ob 14:34:33 CET je Priit Laes napisal(a):
> On Mon, Jan 21, 2019 at 08:37:29AM +, Priit Laes wrote:
> > On Fri, Jan 18, 2019 at 10:51:10PM +0100, Jernej Škrabec wrote:
> > > Dne četrtek, 17. januar 2019 ob 08:24:02 CET je Priit Laes napisal(
Dne ponedeljek, 21. januar 2019 ob 16:07:28 CET je Priit Laes napisal(a):
> On Mon, Jan 21, 2019 at 02:25:17PM +0100, Maxime Ripard wrote:
> > On Fri, Jan 18, 2019 at 02:51:26PM +, Priit Laes wrote:
> > > On Fri, Jan 18, 2019 at 03:04:18PM +0100, Maxime Ripard wrote:
> > > > On Fri, Jan 18, 201
Dne četrtek, 10. januar 2019 ob 10:15:48 CET je Priit Laes napisal(a):
> On Sun, Nov 04, 2018 at 07:26:39PM +0100, Jernej Skrabec wrote:
> > Currently MP clocks don't consider adjusting parent rate even if they
> > are allowed to do so. Such behaviour considerably lowers amount of
> > possible rate
Dne sreda, 16. januar 2019 ob 13:09:58 CET je Priit Laes napisal(a):
> On Thu, Jan 10, 2019 at 06:10:59PM +0100, Jernej Škrabec wrote:
> > Dne četrtek, 10. januar 2019 ob 10:15:48 CET je Priit Laes napisal(a):
> > > On Sun, Nov 04, 2018 at 07:26:39PM +0100, Jernej Skrabec wrote:
Dne četrtek, 17. januar 2019 ob 08:24:02 CET je Priit Laes napisal(a):
> On Wed, Jan 16, 2019 at 06:00:32PM +0100, Jernej Škrabec wrote:
> > Dne sreda, 16. januar 2019 ob 13:09:58 CET je Priit Laes napisal(a):
> > > On Thu, Jan 10, 2019 at 06:10:59PM +0100, Jernej Škrabec
Dne sreda, 12. junij 2019 ob 10:51:47 CEST je Neil Armstrong napisal(a):
> When using an I2S source using a different clock source (usually the I2S
> audio HW uses dedicated PLLs, different from the HDMI PHY PLL), fixed
> CTS values will cause some frequent audio drop-out and glitches as
> reported
Hi Ondrej!
Dne ponedeljek, 27. maj 2019 ob 18:22:36 CEST je megous via linux-sunxi
napisal(a):
> From: Ondrej Jirman
>
> Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO
> for the DDC bus to be usable.
>
> Add support for hdmi-connector node's optional ddc-en-gpios prope
Hi!
Dne torek, 18. junij 2019 ob 01:55:58 CEST je Douglas Anderson napisal(a):
> Let's add some better support for HDMI audio to dw_hdmi.
> Specifically:
>
> 1. For 44.1 kHz audio the old code made the assumption that an N of
> 6272 was right most of the time. That wasn't true and the new table
Dne četrtek, 20. junij 2019 ob 15:47:47 CEST je megous via linux-sunxi
napisal(a):
> From: Ondrej Jirman
>
> Orange Pi 3 board requires enabling a voltage shifting circuit via GPIO
> for the DDC bus to be usable.
>
> Add support for hdmi-connector node's optional ddc-en-gpios property to
> supp
Hi!
Dne četrtek, 20. junij 2019 ob 15:47:42 CEST je megous via linux-sunxi
napisal(a):
> From: Ondrej Jirman
>
> This series implements support for Xunlong Orange Pi 3 board.
>
> - ethernet support (patches 1-3)
Correct me if I'm wrong, but patches 1-2 aren't strictly necessary for
OrangePi
Dne ponedeljek, 24. junij 2019 ob 17:03:31 CEST je Andrzej Hajda napisal(a):
> On 26.05.2019 23:20, Jonas Karlman wrote:
> > This patch enables Dynamic Range and Mastering InfoFrame on H6.
> >
> > Cc: Maxime Ripard
> > Cc: Jernej Skrabec
> > Signed-off-by: Jonas Karlman
> > ---
> >
> > driver
Dne ponedeljek, 24. junij 2019 ob 17:56:30 CEST je Chen-Yu Tsai napisal(a):
> On Mon, Jun 24, 2019 at 11:49 PM Andrzej Hajda wrote:
> > On 24.06.2019 17:05, Jernej Škrabec wrote:
> > > Dne ponedeljek, 24. junij 2019 ob 17:03:31 CEST je Andrzej Hajda
napisal(a):
> > >&
Dne ponedeljek, 24. junij 2019 ob 11:08:51 CEST je Neil Armstrong napisal(a):
> Add myself as co-maintainer of DRM Bridge Drivers then add Jonas Karlman
> and Jernej Škrabec as Reviewers of DRM Bridge Drivers.
>
> Cc: Laurent Pinchart
> Cc: Jonas Karlman
> Cc: Andrzej H
Dne ponedeljek, 25. marec 2019 ob 02:35:31 CET je Laurent Pinchart napisal(a):
> Hi Jernej,
>
> Thank you for the patch.
>
> On Sun, Mar 24, 2019 at 10:21:42PM +0100, Jernej Skrabec wrote:
> > DW HDMI controller on some Allwinner SoCs has support for CEC, but due
> > to additional logic put betwe
Dne sobota, 20. julij 2019 ob 07:42:55 CEST je Maxime Ripard napisal(a):
> On Sat, Jul 13, 2019 at 02:03:43PM +0200, Jernej Skrabec wrote:
> > In order to correctly convert image between YUV and RGB, you have to
> > know color encoding and color range. This patch set adds appropriate
> > properties
Hi!
Dne petek, 26. julij 2019 ob 19:23:14 CEST je Andrzej Pietrasiewicz
napisal(a):
> Use the ddc pointer provided by the generic connector.
>
> Signed-off-by: Andrzej Pietrasiewicz
Acked-by: Jernej Skrabec
Thanks!
Best regards,
Jernej
> ---
> drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 6
Hi!
Dne sreda, 31. julij 2019 ob 16:43:47 CEST je Fabio Estevam napisal(a):
> Hi Guido,
>
> On Wed, Jul 31, 2019 at 11:35 AM Guido Günther wrote:
> > The idea is to have
> >
> > "%sabling platform clocks", enable ? "en" : "dis");
> >
> > depending whether clocks are enabled/disabled.
>
>
Dne nedelja, 05. junij 2022 ob 11:40:18 CEST je Roman Stratiienko napisal(a):
> Otherwise alpha value is discarded, resulting incorrect pixel
> apperance on the display.
>
> This also fixes missing transparency for the most bottom layer.
Can you explain that a bit more? Also, BSP driver never ena
Dne nedelja, 05. junij 2022 ob 17:47:31 CEST je Roman Stratiienko napisal(a):
> Allwinner DE2 and DE3 hardware support 3 pixel blend modes:
> "None", "Pre-multiplied", "Coverage"
>
> Add the blend mode property and route it to the appropriate registers.
>
> Note:
> "force_premulti" parameter was
Dne ponedeljek, 06. junij 2022 ob 10:17:20 CEST je Roman Stratiienko
napisal(a):
> Hello Jernej,
>
> Thank you for having a look.
>
> вс, 5 июн. 2022 г. в 23:37, Jernej Škrabec :
> >
> > Dne nedelja, 05. junij 2022 ob 17:47:31 CEST je Roman Stratiienko
napisal(a):
Dne torek, 14. junij 2022 ob 09:31:00 CEST je Samuel Holland napisal(a):
> commit 6de79dd3a920 ("drm/bridge: display-connector: add ddc-en gpio
> support") added a consumer for this GPIO in the HDMI connector device.
> This new consumer conflicts with the pre-existing GPIO consumer in the
> sun8i H
Dne sreda, 15. junij 2022 ob 07:42:53 CEST je Samuel Holland napisal(a):
> If the component driver fails to bind, or is unbound, the driver data
> for the top-level platform device points to a freed drm_device. If the
> system is then suspended, the driver passes this dangling pointer to
> drm_mode
Dne petek, 17. junij 2022 ob 05:03:11 CEST je Samuel Holland napisal(a):
> Hi Jernej,
>
> On 6/16/22 4:32 PM, Jernej Skrabec wrote:
> > Kernel occasionally complains that there is mismatch in segment size
> > when trying to render HW decoded videos and rendering them directly with
> > sun4i DRM dr
Hi Maxime,
Dne ponedeljek, 07. februar 2022 ob 17:35:10 CET je Maxime Ripard napisal(a):
> The sun4i KMS driver will call drm_plane_create_zpos_property() with an
> init value depending on the plane type.
>
> Since the initial value wasn't carried over in the state, the driver had
> to set it aga
Hi!
Dne sreda, 09. februar 2022 ob 06:53:27 CET je Pin-Yen Lin napisal(a):
> The length of EDID block can be longer than 256 bytes, so we should use
> `int` instead of `u8` for the `edid_pos` variable.
>
> Signed-off-by: Pin-Yen Lin
Please add "Fixes" tag. With that:
Reviewed-by: Jernej Skrabec
Dne nedelja, 24. april 2022 ob 18:26:22 CEST je Samuel Holland napisal(a):
> readsb/writesb are unavailable on some architectures. In preparation for
> removing the Kconfig architecture dependency, switch to the equivalent
> but more portable ioread/write8_rep helpers.
>
> Reported-by: kernel test
Dne nedelja, 24. april 2022 ob 18:26:27 CEST je Samuel Holland napisal(a):
> D1's mixer 1 has no UI layers, only a single VI layer. That means the
> mixer can only be used if the primary plane comes from this VI layer.
> Add the code to handle this case.
>
> Signed-off-by: Samuel Holland
Reviewe
Dne nedelja, 24. april 2022 ob 18:26:28 CEST je Samuel Holland napisal(a):
> D1 changes the MMIO offsets for the CSC blocks in the first mixer. The
> mixers' ccsc property is used as an index into the ccsc_base array. Use
> an enumeration to describe this index, and add the new set of offsets.
>
>
Dne nedelja, 24. april 2022 ob 18:26:30 CEST je Samuel Holland napisal(a):
> D1 has a TCON TOP with TCON TV0 and DSI, but no TCON TV1. This puts the
> DSI clock name at index 1 in clock-output-names. Support this by only
> incrementing the index for clocks that are actually supported.
>
> Signed-o
Dne nedelja, 24. april 2022 ob 18:26:31 CEST je Samuel Holland napisal(a):
> D1 has a TCON TOP, so its quirks are similar to those for the R40 TCONs.
> While there are some register changes, the part of the TCON TV supported
> by the driver matches the R40 quirks, so that quirks structure can be
>
Dne torek, 03. maj 2022 ob 09:15:39 CEST je Javier Martinez Canillas
napisal(a):
> By default the bits per pixel for the emulated framebuffer device is set
> to dev->mode_config.preferred_depth, but some devices need another value.
>
> Since this second parameter is only used by a few drivers, an
Dne petek, 12. avgust 2022 ob 09:42:55 CEST je Samuel Holland napisal(a):
> Replace the ad-hoc calls to of_device_is_compatible() with a structure
> describing the differences between variants. This is in preparation for
> adding more variants to the driver.
>
> Signed-off-by: Samuel Holland
Rev
Dne petek, 12. avgust 2022 ob 09:42:56 CEST je Samuel Holland napisal(a):
> The A100 variant of the MIPI DSI controller now gets its module clock
> from the TCON via the TCON TOP, so the clock rate cannot be set to a
> fixed value. Otherwise, it appears to be the same as the A31 variant.
>
> Signe
Dne petek, 12. avgust 2022 ob 05:16:23 CEST je Samuel Holland napisal(a):
> Currently, the packet overhead is subtracted using unsigned arithmetic.
> With a short sync pulse, this could underflow and wrap around to near
> the maximal u16 value. Fix this by using signed subtraction. The call to
> ma
Hi!
Dne sobota, 21. maj 2022 ob 15:34:43 CEST je Genfu Pan napisal(a):
> Accrording the SDK from Allwinner, the scanline value of yuv and rgb for
> V3s are both 1024.
s/scanline value/scanline length/
Which SDK? All SDKs that I have or found on internet don't mention YUV nor RGB
scanline limit.
Dne torek, 24. maj 2022 ob 17:31:13 CEST je Roman Stratiienko napisal(a):
> NAK for this. Further testing showed such an approach is not reliable
> due to .atomic_update() callback called only in case planes have some
> changes.
Additionally, I think it would be better to fix underlaying zpos issu
Dne torek, 24. maj 2022 ob 19:07:27 CEST je Samuel Holland napisal(a):
> On 5/23/22 8:14 AM, Icenowy Zheng wrote:
> > 在 2022-05-22星期日的 10:36 +0200，Jernej Škrabec写道：
> >> Hi!
> >>
> >> Dne sobota, 21. maj 2022 ob 15:34:43 CEST je Genfu Pan napisal(a):
> >
Dne nedelja, 22. maj 2022 ob 12:48:27 CEST je benly...@gmail.com napisal(a):
> Hi Jernej!
>
> > Which SDK? All SDKs that I have or found on internet don't mention YUV nor
RGB
> > scanline limit. That doesn't mean there is none, I'm just unable to verify
> > your claim. Did you test this by yourse
t/dri-devel/patch/20210106204630.1800284-1-jernej.skra...@siol.net/
Best regards,
Jernej
>
> Thanks.
> Regards
> Roman
>
> вт, 24 мая 2022 г. в 19:21, Jernej Škrabec :
> >
> > Dne torek, 24. maj 2022 ob 17:31:13 CEST je Roman Stratiienko napisal(a):
> > >
s very easy to do with kmsxx using python wrapper.
> >
> > Or explain steps to reproduce here, I will write it by myself.
> >
> > Thanks.
> > Regards
> > Roman
> >
> > вт, 24 мая 2022 г. в 19:21, Jernej Škrabec :
> > >
> > > Dne tore
Dne sreda, 25. maj 2022 ob 16:55:56 CEST je Roman Stratiienko napisal(a):
> вт, 24 мая 2022 г. в 22:14, Jernej Škrabec :
> >
> > Dne torek, 24. maj 2022 ob 19:14:35 CEST je Roman Stratiienko napisal(a):
> > > By the way, not related to this issue:
> > >
Dne sobota, 02. julij 2022 ob 05:29:21 CEST je Samuel Holland napisal(a):
> When adding the bindings for the D1 display engine, I missed the
> condition for the number of pipelines. D1 has two mixers, so it
> will have two pipeline references.
>
> Fixes: ae5a5d26c15c ("dt-bindings: display: Add D1
Dne sobota, 02. julij 2022 ob 21:06:07 CEST je Jernej Škrabec napisal(a):
> Dne sobota, 02. julij 2022 ob 05:29:21 CEST je Samuel Holland napisal(a):
> > When adding the bindings for the D1 display engine, I missed the
> > condition for the number of pipelines. D1 has two mixers,
Dne petek, 08. april 2022 ob 12:32:25 CEST je Sandor Yu napisal(a):
> i.MX8MPlus (v2.13a) has verified need the workaround to clear the
> overflow with one iteration.
> Only i.MX6Q(v1.30a) need the workaround with 4 iterations,
> the others versions later than v1.3a have been identified as needing
Dne ponedeljek, 11. april 2022 ob 06:34:15 CEST je Samuel Holland napisal(a):
> commit b4bdc4fbf8d0 ("soc: sunxi: Deal with the MBUS DMA offsets in a
> central place") added a platform device notifier that sets the DMA
> offset for all of the display engine frontend and backend devices.
>
> The co
Dne ponedeljek, 11. april 2022 ob 06:34:16 CEST je Samuel Holland napisal(a):
> Allwinner D1 is a RISC-V SoC which contains a DE 2.0 engine. Let's
> remove the dependency on a specific CPU architecture, so the driver can
> be built wherever ARCH_SUNXI is selected.
>
> Signed-off-by: Samuel Holland
Dne ponedeljek, 11. april 2022 ob 06:34:17 CEST je Samuel Holland napisal(a):
> D1 changes the MMIO address offset for the CSC blocks in the first
> mixer. The ccsc field value is used as an index into the ccsc_base
> array; allocate the next available value to represent the new variant.
>
> Signe
Dne ponedeljek, 11. april 2022 ob 06:34:18 CEST je Samuel Holland napisal(a):
> D1's mixer 1 has no UI layers, only a single VI layer. That means the
> mixer can only be used if the primary plane comes from this VI layer.
> Add the code to handle this case, setting the mixer's global registers
> in
Dne ponedeljek, 11. april 2022 ob 06:34:19 CEST je Samuel Holland napisal(a):
> D1 has a display engine with the usual pair of mixers, albeit with
> relatively few layers. In fact, D1 appears to be the first SoC to have
> a mixer without any UI layers. Add support for these new variants.
>
> Signe
Dne ponedeljek, 11. april 2022 ob 06:34:22 CEST je Samuel Holland napisal(a):
> Now that the various blocks in the D1 display engine pipeline are
> supported, we can enable the overall engine.
>
> Signed-off-by: Samuel Holland
Acked-by: Jernej Skrabec
Best regards,
Jernej
> ---
>
> drivers/
Dne četrtek, 18. avgust 2022 ob 23:00:07 CEST je Wolfram Sang napisal(a):
> Follow the advice of the below link and prefer 'strscpy' in this
> subsystem. Conversion is 1:1 because the return value is not used.
> Generated by a coccinelle script.
>
> Link:
> https://lore.kernel.org/r/CAHk-=wgfRnXz0
Dne ponedeljek, 05. september 2022 ob 19:15:58 CEST je Clément Péron
napisal(a):
> Add a simple cooling map for the GPU.
>
> This cooling map come from the vendor kernel 4.9 with a
> 2°C hysteresis added.
>
> Signed-off-by: Clément Péron
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 5
Dne torek, 06. september 2022 ob 17:30:32 CEST je Clément Péron napisal(a):
> Add an Operating Performance Points table for the GPU to
> enable Dynamic Voltage & Frequency Scaling on the H6.
>
> The voltage range is set with minimal voltage set to the target
> and the maximal voltage set to 1.2V.
Dne ponedeljek, 29. avgust 2022 ob 15:11:49 CEST je Maxime Ripard napisal(a):
> The sun4i TV driver still uses legacy enable and disable hook
> implementation. Let's convert to the atomic variants.
>
> Signed-off-by: Maxime Ripard
Acked-by: Jernej Skrabec
BTW, I suggest you merge fixes/cleanup
Dne ponedeljek, 29. avgust 2022 ob 15:11:50 CEST je Maxime Ripard napisal(a):
> Our mode_set implementation can be merged into our atomic_enable
> implementation to simplify things, so let's do this.
Are you sure this is a good thing in long term? What if user wants to change
mode? Unlikely, but
Dne ponedeljek, 29. avgust 2022 ob 15:11:51 CEST je Maxime Ripard napisal(a):
> The drm_connector_to_sun4i_tv() function isn't used anywhere in the driver,
> so let's remove it.
>
> Signed-off-by: Maxime Ripard
Acked-by: Jernej Skrabec
Best regards,
Jernej
Dne sreda, 07. september 2022 ob 09:41:34 CEST je Maxime Ripard napisal(a):
> On Tue, Sep 06, 2022 at 10:04:32PM +0200, Jernej Škrabec wrote:
> > Dne ponedeljek, 29. avgust 2022 ob 15:11:50 CEST je Maxime Ripard
napisal(a):
> > > Our mode_set implementation can be merged into
Dne torek, 06. september 2022 ob 17:30:31 CEST je Clément Péron napisal(a):
> Add a simple cooling map for the GPU.
>
> This cooling map come from the vendor kernel 4.9 with a
> 2°C hysteresis added.
>
> Signed-off-by: Clément Péron
Acked-by: Jernej Skrabec
Best regards,
Jernej
Dne torek, 06. september 2022 ob 21:26:34 CEST je Clément Péron napisal(a):
> Hi Jernej,
>
> On Tue, 6 Sept 2022 at 21:10, Jernej Škrabec
wrote:
> > Dne torek, 06. september 2022 ob 17:30:32 CEST je Clément Péron
napisal(a):
> > > Add an Operating Performance Poi
Dne torek, 06. september 2022 ob 17:30:34 CEST je Clément Péron napisal(a):
> Enable GPU OPP table for Beelink GS1.
>
> Signed-off-by: Clément Péron
Acked-by: Jernej Skrabec
Best regards,
Jernej
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6-beelink-gs1.dts | 1 +
> 1 file changed, 1 insert
Dne četrtek, 08. september 2022 ob 18:26:31 CEST je Jernej Škrabec napisal(a):
> Dne torek, 06. september 2022 ob 21:26:34 CEST je Clément Péron napisal(a):
> > Hi Jernej,
> >
> > On Tue, 6 Sept 2022 at 21:10, Jernej Škrabec
>
> wrote:
> > > Dne torek, 06
Dne torek, 06. september 2022 ob 17:30:29 CEST je Clément Péron napisal(a):
> Hi,
>
> This is a refresh of previous patches sent to enable GPU Devfreq on H6
> Beelink GS1 but that wasn't stable at that time[0].
>
> With the recent fix on GPU PLL from Roman Stratiienko I have retested
> and everyt
Dne petek, 29. julij 2022 ob 18:35:09 CEST je Maxime Ripard napisal(a):
> The VC4 VEC driver still uses legacy enable and disable hook
s/VC4 VEC/sun4i tv/
Best regards,
Jernej
> implementation. Let's convert to the atomic variants.
>
> Signed-off-by: Maxime Ripard
>
> diff --git a/drivers/gpu
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