Add a driver for generic MIPI DBI panels initialized with MIPI DCS
commands.
Currently a ST7789V-based panel is added to it. This panel has its
configuration pre-programmed into the controller, so no vendor-specific
configuration is needed.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/tiny
This patchset adds a tinydrm driver called simple-dbi, which is a driver
that utilizes only standardized commands in MIPI DCS to activate a MIPI
DBI panel that requires no extra configuration, usually because the
configuration is pre-programmed into the OTP of the LCD controller.
Icenowy Zheng (4
Shenzhen Zhishengxin Technology Co., Ltd. is a LCD module supplier.
Add vendor prefix for it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml
b
ff-by: Icenowy Zheng
---
.../bindings/display/simple-dbi.yaml | 72 +++
1 file changed, 72 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/simple-dbi.yaml
diff --git a/Documentation/devicetree/bindings/display/simple-dbi.yaml
b/Document
As I pushed the simple-dbi driver, add myself as the maintainer now.
Signed-off-by: Icenowy Zheng
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 3a00771b9fe2..e05c4910c062 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5803,6 +5803,13
在 2021-08-02星期一的 14:35 +0800，Icenowy Zheng写道：
> Add a driver for generic MIPI DBI panels initialized with MIPI DCS
> commands.
>
> Currently a ST7789V-based panel is added to it. This panel has its
> configuration pre-programmed into the controller, so no vendor-
> specific
在 2021-08-02星期一的 17:08 +0200，Thomas Zimmermann写道：
> Hi
>
> Am 02.08.21 um 08:35 schrieb Icenowy Zheng:
> > Add a driver for generic MIPI DBI panels initialized with MIPI DCS
> > commands.
> >
> > Currently a ST7789V-based panel is added to it. This panel has its
Attaching the panel can fail, so cleanup work is necessary, otherwise
a pointer to freed struct drm_panel* will remain in drm_panel code.
Do the cleanup if panel attaching failed.
Fixes: 69dc678abc2b ("drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD
panel")
Signed-off-by: Ice
value
> gets printed.
>
> Signed-off-by: Cai Huoqing
Looks good to me, and thanks for pointing out this helper.
Acked-by: Icenowy Zheng
> ---
> drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff
: 26aec25593c2 ("drm/panel: Add Ilitek ILI9881c panel driver")
Cc: sta...@vger.kernel.org
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c
于 2021年1月6日 GMT+08:00 下午5:47:20, Jagan Teki 写到:
>On Sat, Nov 28, 2020 at 6:23 PM Icenowy Zheng wrote:
>>
>> Attaching the panel can fail, so cleanup work is necessary, otherwise
>> a pointer to freed struct drm_panel* will remain in drm_panel code.
>>
>>
于 2019年2月5日 GMT+08:00 上午12:26:43, Vasily Khoruzhick 写到:
>On Mon, Feb 4, 2019 at 6:20 AM Maxime Ripard
> wrote:
>>
>> Hi,
>>
>> On Sun, Feb 03, 2019 at 10:54:55AM -0800, Vasily Khoruzhick wrote:
>> > Clock rate check that was added in commit bb43d40d7c83 ("drm/sun4i:
>rgb:
>> > Validate the clock
于 2019年7月9日 GMT+08:00 下午4:55:32, Maxime Ripard 写到:
>On Mon, Jul 08, 2019 at 05:49:21PM -0700, Vasily Khoruzhick wrote:
>> > > Maybe instead of edp-connector one would introduce integrator's
>specific
>> > > connector, for example with compatible
>"olimex,teres-edp-connector"
>> > > which should
On PowerBook6,1 (PowerBook G4 867 12") HWSQ entry 0 (which is currently
always used by nouveau) fails, but the BIOS declares 2 HWSQ entries and
entry 1 works.
Add a quirk to use HWSQ entry 1.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/nouveau/nouveau_bios.c | 7 +++
1 file chang
Created at https://gitlab.freedesktop.org/drm/nouveau/-/issues/158 .
>
> On Mon, Feb 14, 2022 at 11:03 AM Icenowy Zheng wrote:
> >
> > On PowerBook6,1 (PowerBook G4 867 12") HWSQ entry 0 (which is
> > currently
> > always used by nouveau) fails, but the BIOS declares 2 HW
在 2022-05-22星期日的 10:36 +0200，Jernej Škrabec写道：
> Hi!
>
> Dne sobota, 21. maj 2022 ob 15:34:43 CEST je Genfu Pan napisal(a):
> > Accrording the SDK from Allwinner, the scanline value of yuv and
> > rgb for
> > V3s are both 1024.
>
> s/scanline value/scanline length/
>
> Which SDK? All SDKs that I
于 2019年12月24日 GMT+08:00 下午7:28:41, Martin Blumenstingl
写到:
>Hi Alyssa,
>
>On Mon, Dec 16, 2019 at 4:48 PM Alyssa Rosenzweig
> wrote:
>>
>> If so much code is being duplicated over, I'm wondering if it makes
>> sense for us to move some of the common devfreq code to core DRM
>> helpers?
>if you
在 2019-10-03四的 09:53 +0530，Jagan Teki写道：
> Hi Wens,
>
> On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng wrote:
> > This reverts commit 62e7511a4f4dcf07f753893d3424decd9466c98b.
> >
> > This commit, although claimed as a refactor, in fact changed the
> > formula.
&
在 2019-10-06日的 22:44 +0800，Icenowy Zheng写道：
> 在 2019-10-03四的 09:53 +0530，Jagan Teki写道：
> > Hi Wens,
> >
> > On Tue, Oct 1, 2019 at 1:34 PM Icenowy Zheng
> > wrote:
> > > This reverts commit 62e7511a4f4dcf07f753893d3424decd9466c98b.
> > >
> >
ldn't be added with 1 for another time.)
Icenowy Zheng (2):
drm/sun4i: dsi: fix the overhead of the horizontal front porch
drm/sun4i: sun6i_mipi_dsi: fix DCS long write packet length
Jagan Teki (1):
drm/sun4i: dsi: Fix video start delay computation
[1]
https://github.com/ayufan-pi
From: Jagan Teki
The LCD timing definitions between Linux DRM vs Allwinner are different,
below diagram shows this clear differences.
Active Front Sync Back
Region Porch Porch
<
The packet length of DCS long write packet should not be added with 1
when constructing long write packet.
Fix this.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i
The formula in the BSP kernel indicates that a 16-byte overhead is used
when sending the HFP. However, this value is currently set to 6 in the
sun6i_mipi_dsi driver, which makes some panels flashing.
Fix this overhead value.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i
于 2019年10月7日 GMT+08:00 下午7:51:48, Maxime Ripard 写到:
>On Mon, Oct 07, 2019 at 12:03:00AM +0800, Icenowy Zheng wrote:
>> From: Jagan Teki
>>
>> The LCD timing definitions between Linux DRM vs Allwinner are
>different,
>> below diagram shows this clear differ
于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe 写到:
>On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>> Current code tries to store the link rate (in bps, which is a big
>> number) in a u8, which surely overflow. Then it's converted back to
>> bandwidth
link rate and then converting back.
Fixes: e1cff82c1097 ("drm/bridge: fix anx6345 compilation for v5.5")
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/an
Maybe it should enter fixes?
>
>Best regards
>Thomas
>
>Am 22.02.20 um 03:43 schrieb Icenowy Zheng:
>>
>>
>> 于 2020年2月22日 GMT+08:00 上午1:13:28, Torsten Duwe 写到:
>>> On Sat, Feb 22, 2020 at 12:51:27AM +0800, Icenowy Zheng wrote:
>>>> Current code
correct?
dotclock is correct and vrefresh is only a placeholder value.
>
>Cc: Icenowy Zheng
>Cc: Sam Ravnborg
>Signed-off-by: Ville Syrjälä
>---
> drivers/gpu/drm/panel/panel-feixin-k101-im2ba02.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/driv
于 2020年3月6日 GMT+08:00 上午2:29:33, Vasily Khoruzhick 写到:
>On Thu, Mar 5, 2020 at 7:28 AM Enric Balletbo i Serra
> wrote:
>>
>> Hi Vasily,
>
>CC: Icenowy and Ondrej
>>
>> Would you mind to check which firmware version is running the anx7688
>in
>> PinePhone, I think should be easy to check with i2c
在 2020-03-06星期五的 09:46 +0100，Enric Balletbo i Serra写道：
> Hi Ondrej,
>
> On 5/3/20 20:35, Ondřej Jirman wrote:
> > Hi,
> >
> > On Thu, Mar 05, 2020 at 10:29:33AM -0800, Vasily Khoruzhick wrote:
> > > On Thu, Mar 5, 2020 at 7:28 AM Enric Balletbo i Serra
> > > wrote:
> > > > Hi Vasily,
> > >
> >
Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels of the PinePhone series
(the developers' kit and the final phone).
Add the vendor prefix of it.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/v
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel.
Add its device tree binding.
Signed-off-by: Icenowy Zheng
---
.../display/panel/xingbangda,xbd599.yaml | 50 +++
1 file changed, 50 insertions(+)
create mode 100644
Documentation/devicetree/bindings/display/
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
Xingbangda, which is used on PinePhone final assembled phones.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile
The max() function call in horizontal timing calculation shouldn't pad a
length already subtracted with overhead to overhead, instead it should
only prevent the set timing to underflow.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +-
1 file chang
This patchset adds support for the LCD panel of PinePhone.
The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.
PATCH 4 is the fix of a bug in sun6i_mipi_dsi which will gets triggered
on XBD599.
Icenowy Zheng (5):
dt-bindings: vendor-prefixes
PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.
Add its device nodes.
Signed-off-by: Icenowy Zheng
---
.../dts/allwinner/sun50i-a64-pinephone.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64
This patchset adds support for the LCD panel of PinePhone.
The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.
PATCH 4 is the fix of a bug in sun6i_mipi_dsi which will gets triggered
on XBD599.
Icenowy Zheng (5):
dt-bindings: vendor-prefixes
于 2020年3月14日 GMT+08:00 下午4:00:00, Sam Ravnborg 写到:
>Hi Icenowy
>
>A few details in the following.
>
> Sam
>
>On Thu, Mar 12, 2020 at 12:33:27AM +0800, Icenowy Zheng wrote:
>> Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
>>
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI LCD panel.
Add its device tree binding.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Example fix.
- Format fix.
.../display/panel/xingbangda,xbd599.yaml | 50 +++
1 file changed, 50 insertions(+)
create mode 1
The max() function call in horizontal timing calculation shouldn't pad a
length already subtracted with overhead to overhead, instead it should
only prevent the set timing to underflow.
Signed-off-by: Icenowy Zheng
---
No changes in v2.
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 10 +---
Shenzhen Xingbangda Display Technology Co., Ltd is a company which
produces LCD modules. It supplies the LCD panels of the PinePhone series
(the developers' kit and the final phone).
Add the vendor prefix of it.
Signed-off-by: Icenowy Zheng
---
No changes in v2.
Documentation/devic
This patchset adds support for the LCD panel of PinePhone.
The first 3 patches are for the panel itself, and the last 2 patches are
for enabling it on PinePhone.
PATCH 4 is the fix of a bug in sun6i_mipi_dsi which will gets triggered
on XBD599.
Icenowy Zheng (5):
dt-bindings: vendor-prefixes
Xingbangda XBD599 is a 5.99" 720x1440 MIPI-DSI IPS LCD panel made by
Xingbangda, which is used on PinePhone final assembled phones.
Add support for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Raised copyright info to 2020.
- Sort panel operation functions.
- Sort inclusion.
dr
PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
display.
Add its device nodes.
Signed-off-by: Icenowy Zheng
---
No changes in v2.
.../dts/allwinner/sun50i-a64-pinephone.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts
在 2020-03-16星期一的 21:35 +0800，Icenowy Zheng写道：
> PinePhone uses PWM backlight and a XBD599 LCD panel over DSI for
> display.
>
> Add its device nodes.
>
> Signed-off-by: Icenowy Zheng
> ---
> No changes in v2.
>
> .../dts/allwinner/sun50i-a64-pinephone.dtsi |
Add the device tree binding for Pine64's PineTab tablet, which uses
Allwinner A64 SoC.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml
b/Document
Shenzhen Feixin Photoelectics Co., Ltd is a company to provide LCD
modules.
Add its vendor prefix.
Signed-off-by: Icenowy Zheng
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/vendor
ing
most of the features mentioned above. HDMI is not supported now because
bad LCD-HDMI coexistence situation of mainline A64 display driver, and
the front camera currently lacks a driver and a facility to share the
bus with the rear one.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/all
Feixin K101 IM2BA02 is a 10.1" 800x1280 4-lane MIPI-DSI panel.
Add device tree binding for it.
Signed-off-by: Icenowy Zheng
---
.../display/panel/feixin,k101-im2ba02.yaml| 54 +++
1 file changed, 54 insertions(+)
create mode 100644
Documentation/devicetree/bin
Feixin K101 IM2BA02 is a 800x1280 4-lane MIPI-DSI LCD panel.
Add a panel driver for it.
Signed-off-by: Icenowy Zheng
---
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu
f the functionalities of the tablet
available in this device tree.
Icenowy Zheng (5):
dt-bindings: vendor-prefix: add Shenzhen Feixin Photoelectics Co., Ltd
dt-bindings: panel: add Feixin K101 IM2BA02 MIPI-DSI panel
drm/panel: Add Feixin K101 IM2BA02 panel
dt-bindings: arm: sunxi: add bindin
Feixin K101 IM2BA02 is a 800x1280 4-lane MIPI-DSI LCD panel.
Add a panel driver for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Use regulator_bulk.
- Small code fixes.
MAINTAINERS | 6 +
drivers/gpu/drm/panel/Kconfig | 9
Shenzhen Feixin Photoelectics Co., Ltd is a company to provide LCD
modules.
Add its vendor prefix.
Signed-off-by: Icenowy Zheng
Acked-by: Sam Ravnborg
Acked-by: Rob Herring
---
Changes in v2:
- Added ACKs from Sam and Rob.
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1
s
new file mode 100644
index ..c76c94855f43
--- /dev/null
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pinetab.dts
@@ -0,0 +1,460 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Icenowy Zheng
+ *
+ */
+
+/dts-v1/;
+
+#include "sun50i-a64.dtsi"
because a DT binding is
lacked (although a proper driver exists).
Icenowy Zheng (5):
dt-bindings: vendor-prefix: add Shenzhen Feixin Photoelectics Co., Ltd
dt-bindings: panel: add Feixin K101 IM2BA02 MIPI-DSI panel
drm/panel: Add Feixin K101 IM2BA02 panel
dt-bindings: arm: sunxi: add binding
Feixin K101 IM2BA02 is a 10.1" 800x1280 4-lane MIPI-DSI panel.
Add device tree binding for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Set backlight property to optional. (Technically this panel requires
backlight, but theortically it can be not adjustable.)
- Tweaked the examp
Add the device tree binding for Pine64's PineTab tablet, which uses
Allwinner A64 SoC.
Signed-off-by: Icenowy Zheng
Reviewed-by: Rob Herring
---
Changes in v2:
- Added Review tag by Rob.
Documentation/devicetree/bindings/arm/sunxi.yaml | 5 +
1 file changed, 5 insertions(+)
diff --
Currently, when allocating the memory for BO by Mesa, the lima kernel
driver set only GFP_DMA32 flag; and this allocation may fail when the
memory is relatively adequate, thus retrying is needed.
Add the GFP flags for retrying memory allocation.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm
uldn't repeat to add the delay in DSI
controller, otherwise the timing won't match.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/dr
to timing error.
Fix the DRQ calculation by change it to use HFP.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
b/drivers/gpu/drm/sun4i/sun6i_mipi_d
ating hsa, and hsa itself is negative when calculating hblk).
This breaks the similar pattern to other formulas, so restoring the
original formula is more proper.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
Don't Be Evil" DevKit, the final PinePhone panel and the
panel on PineTab. Without these patches they need dirty timing hacks to
work.
Icenowy Zheng (3):
Revert "drm/sun4i: dsi: Change the start delay calculation"
drm/sun4i: dsi: fix DRQ calculation
Revert "drm/sun
在 2019-10-02三的 12:36 +0200，Maxime Ripard写道：
> Hi,
>
> On Tue, Oct 01, 2019 at 04:02:50PM +0800, Icenowy Zheng wrote:
> > This patchset fixes some portion of timing calculation in
> > sun6i_mipi_dsi
> > driver according to the BSP driver.
> >
> > Two of t
于 2019年10月3日 GMT+08:00 下午2:45:21, Jagan Teki 写到:
>The LCD timing definitions between Linux DRM vs Allwinner are
>different,
>below diagram shows this clear differences.
>
> Active Front Sync Back
> Region Porch
于 2019年10月3日 GMT+08:00 下午2:45:22, Jagan Teki 写到:
>start value in video start delay was changed in
>commit da676c6aa641 ("drm/sun4i: dsi: Change the start delay
>calculation")
>to match the legacy BSP driver [1].
>
>So, using this existing start delay computation gives the wrong
>start delay val
于 2019年10月3日 GMT+08:00 下午7:47:33, Maxime Ripard 写到:
>On Thu, Oct 03, 2019 at 12:15:24PM +0530, Jagan Teki wrote:
>> Allwinner MIPI DSI controllers are supplied with SoC DSI
>> power rails via VCC-DSI pin.
>>
>> Some board still work without supplying this but give more
>> faith on datasheet and
于 2019年10月3日 GMT+08:00 下午9:19:16, Maxime Ripard 写到:
>On Thu, Oct 03, 2019 at 12:38:43PM +0530, Jagan Teki wrote:
>> On Tue, Oct 1, 2019 at 1:33 PM Icenowy Zheng wrote:
>> >
>> > This reverts commit da676c6aa6413d59ab0a80c97bbc273025e640b2.
>> >
>> &g
although it's still /dev/fb0 and fbcon is bound to it).
Add some code for removing firmware-based FB when initializing KMS of
rockchipdrm.
Tested on Pinebook Pro (RK3399) with U-Boot patchset for initializing
eDP display applied.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/roc
在 2023-06-14星期三的 14:31 -0700，Doug Anderson写道：
> Hi,
>
> On Wed, Jun 14, 2023 at 1:22 AM AngeloGioacchino Del Regno
> wrote:
> >
> > Il 13/06/23 01:32, Douglas Anderson ha scritto:
> > > In order to read the EDID from an eDP panel, you not only need to
> > > power on the bridge chip itself but al
在 2023-08-07星期一的 11:36 +0200，Frank Oltmanns写道：
> From: Icenowy Zheng
>
> In some situaitons, we will want a clock rate be kept while its
> parent
> can change, for example, to make dual-head work on A64, TCON0 clock
> needs to be kept for LCD display and its parent (or grandpa
在 2023-08-07星期一的 11:36 +0200，Frank Oltmanns写道：
> From: Icenowy Zheng
>
> Notify TCON0 clock (and in consequence PLL-MIPI by
> CLK_SET_RATE_PARENT)
> to reset when PLL-Video0 changes (because of HDMI PHY clk which is a
> child of PLL-Video0 and has CLK_SET_RATE_PARENT set). In
在 2023-08-07星期一的 11:48 +0200，Frank Oltmanns写道：
>
> On 2023-08-07 at 17:43:52 +0800, Icenowy Zheng
> wrote:
> > 在 2023-08-07星期一的 11:36 +0200，Frank Oltmanns写道：
> > > From: Icenowy Zheng
> > >
> > > Notify TCON0 clock (and in consequence PLL-MIPI by
>
ces from 11" to 14", a certain panel model number shouldn't
be present, and driving the panel according to its EDID information is
necessary.
Signed-off-by: Icenowy Zheng
---
arch/arm64/boot/dts/mediatek/mt8173-elm.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
在 2023-05-26星期五的 07:24 -0700，Doug Anderson写道：
> Hi,
>
> On Fri, May 26, 2023 at 3:09 AM Icenowy Zheng wrote:
> >
> > Currently a specific panel number is used in the Elm DTSI, which is
> > corresponded to a 12" panel. However, according to the official
> &g
在 2023-05-29星期一的 10:02 +0200，AngeloGioacchino Del Regno写道：
> Il 26/05/23 16:24, Doug Anderson ha scritto:
> > Hi,
> >
> > On Fri, May 26, 2023 at 3:09 AM Icenowy Zheng
> > wrote:
> > >
> > > Currently a specific panel number is used in the Elm DT
在 2023-05-29星期一的 18:28 +0200，Matthias Brugger写道：
>
>
> On 29/05/2023 10:45, Icenowy Zheng wrote:
> > 在 2023-05-29星期一的 10:02 +0200，AngeloGioacchino Del Regno写道：
> > > Il 26/05/23 16:24, Doug Anderson ha scritto:
> > > > Hi,
> > > >
>
30.11.2016, 17:28, "Jean-Francois Moine" :
> On Wed, 30 Nov 2016 10:20:21 +0200
> Laurent Pinchart wrote:
>
>> Â > Well, I don't see what this connector can be.
>> Â > May you give me a DT example?
>>
>> Â Sure.
>>
>> Â arch/arm/boot/dts/r8a7791-koelsch.dts
>>
>> Â Â Â Â Â Â Â Â Â /* HDMI encode
30.11.2016, 18:44, "Jean-Francois Moine" :
> On Wed, 30 Nov 2016 11:52:25 +0200
> Laurent Pinchart wrote:
>
>>  Hi Jean-François,
>>
>> Â On Wednesday 30 Nov 2016 10:27:57 Jean-Francois Moine wrote:
>> Â > On Wed, 30 Nov 2016 10:20:21 +0200 Laurent Pinchart wrote:
>> Â > >> Well, I don't see w
07.10.2016, 00:06, "Chen-Yu Tsai" :
> Sinlinx SinA31s comes with an optional 7" 1024x600 LCD panel with
> capacitive touch panel that bolts on to the board.
>
> Enable the display using a panel with close timings. This patch is more
> of a proof of concept. The LCD panel has no markings whatsoeve
From: Icenowy Zheng
Allwinner V3s SoC features a "Display Engine 2.0" with only one TCON
which have RGB LCD output.
Add device nodes for it as well as the TCON.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Change the size of de2_clocks regs according to the binding example.
From: Icenowy Zheng
Allwinner "Display Engine 2.0" contains some clock controls in it.
In order to add them as clock drivers, we need a device tree binding.
Add the binding here.
Signed-off-by: Icenowy Zheng
---
Changes in v3:
- Fill the address space length of DE2 CCU to 0x10,
missing -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng
---
Refactored patch in v3.
drivers/gpu/drm/sun4i/Kconfig | 10 +
drivers/gpu/drm/sun4i/Makefile | 4 +
drivers/gpu/drm/sun4i/sun8i_layer.c | 156 +++
driver
From: Icenowy Zheng
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu
ber/126264.html
Icenowy Zheng (11):
dt-bindings: add binding for the Allwinner DE2 CCU
clk: sunxi-ng: add support for DE2 CCU
dt-bindings: add bindings for DE2 on V3s SoC
drm/sun4i: abstruct the layer type
drm/sun4i: abstract a mixer type
drm/sun4i: add support for Allwinner DE2 mixers
ilt. As we removed the codes in CRTC code that directly call the
layer code, we can now extract the layer part and combine it with the
backend part into a new module, sun4i-backend.ko.
Signed-off-by: Icenowy Zheng
---
Refactored patch in v3.
drivers/gpu/drm/sun4i/Kconfig | 10 ++
d
As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm
driver, we will finally have two types of layer.
Abstract the layer type to void * and a ops struct, which contains the
only function used by crtc -- get the drm_plane struct of the layer.
Signed-off-by: Icenowy Zheng
Allwinner V3s features the new "Display Engine 2.0", which can now also
be driven with our subdrivers in sun4i-drm.
Add the compatible string for in sun4i_drv.c, in order to make the
display engine and its components probed.
Signed-off-by: Icenowy Zheng
---
Patch splited in v3.
d
From: Icenowy Zheng
Allwinner V3s SoC have a display engine which have a different pipeline
with older SoCs.
Add document for it (new compatibles and the new "mixer" part).
The paragraph of TCON is also refactored, for furtherly add TCONs in
A83T/H3/A64/H5 that have only a channel 1
From: Icenowy Zheng
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed
From: Icenowy Zheng
Allwinner V3s SoC features a set of pins that have functionality of RGB
LCD, the pins are at different pin ban than other SoCs.
Add pinctrl node for them.
Signed-off-by: Icenowy Zheng
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 9 +
1 file changed, 9 insertions
From: Icenowy Zheng
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.
Add a sunxi-ng style driver for it.
Signed-off-by: Icenowy Zheng
---
Changes in v2:
- Rename sunxi-de2-ccu to sun8i-de2-ccu.
drivers/cl
在 2017年04月03日 23:33, Rob Herring 写道:
On Thu, Mar 30, 2017 at 03:46:03AM +0800, Icenowy Zheng wrote:
From: Icenowy Zheng
Allwinner "Display Engine 2.0" contains some clock controls in it.
In order to add them as clock drivers, we need a device tree binding.
Add the binding here.
在 2017年04月05日 03:28, Sean Paul 写道:
On Thu, Mar 30, 2017 at 03:46:06AM +0800, Icenowy Zheng wrote:
As we are going to add support for the Allwinner DE2 Mixer in sun4i-drm
driver, we will finally have two types of layer.
Abstract the layer type to void * and a ops struct, which contains the
2017年4月5日 10:27于 Chen-Yu Tsai 写道：
>
> On Wed, Apr 5, 2017 at 3:53 AM, Icenowy Zheng wrote:
> >
> >
> > 在 2017年04月05日 03:28, Sean Paul 写道:
> >>
> >> On Thu, Mar 30, 2017 at 03:46:06AM +0800, Icenowy Zheng wrote:
> >>>
> >>
Allwinner V3s SoC features a TCON without channel 1.
Add support for it.
Signed-off-by: Icenowy Zheng
---
drivers/gpu/drm/sun4i/sun4i_drv.c | 3 ++-
drivers/gpu/drm/sun4i/sun4i_tcon.c | 5 +
2 files changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c
b
missing -- more investigations
are needed to gain enough information for them.
Signed-off-by: Icenowy Zheng
---
Changes in v4:
- Killed some dead code according to Jernej.
drivers/gpu/drm/sun4i/Kconfig | 10 +
drivers/gpu/drm/sun4i/Makefile | 4 +
drivers/gpu/drm/sun4i/sun8
ber/126264.html
Icenowy Zheng (11):
dt-bindings: add binding for the Allwinner DE2 CCU
clk: sunxi-ng: add support for DE2 CCU
dt-bindings: add bindings for DE2 on V3s SoC
drm/sun4i: return only planes for layers created
drm/sun4i: abstract a engine type
drm/sun4i: add support for Allwinner D
A 480x272 QiaoDian QD43003C0-40-7LED panel is available from Lichee Pi.
This commit connects this panel to Lichee Pi Zero.
Lichee Pi also provides a 800x480 panel without accurate model number,
so do not merge this patch. It will finally come as device tree overlay.
Signed-off-by: Icenowy Zheng
Allwinner V3s SoC have a display engine which have a different pipeline
with older SoCs.
Add document for it (new compatibles and the new "mixer" part).
Signed-off-by: Icenowy Zheng
---
Changes in v4:
- Removed the refactor at TCON chapter.
Changes in v3:
- Remove the description o
The "Display Engine 2.0" in Allwinner newer SoCs contains a clock
management unit for its subunits, like the DE CCU in A80.
Add a sunxi-ng style driver for it.
Signed-off-by: Icenowy Zheng
---
Changes in v4:
- Fixed the inconsistence between mixer_div clocks' number and real cl
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