From: Hermes Wu
When HDCP negotiation with a repeater device.
Checking SHA V' matching must retry 3 times before restarting HDCP.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --gi
From: Hermes Wu
When running the HDCP CTS test with UNIGRAF DPR-100.
KSV list must be read from DP_AUX_HDCP_KSV_FIFO in an AUX request,
and can not separate with multiple read requests.
The AUX operation command "CMD_AUX_GET_KSV_LIST" reads the KSV list
with AUX FIFO and is able to read DP_AUX_H
From: Hermes Wu
When starting HDCP authentication, HDCP encryption should be enabled
when R0'is checked.
Change encryption enables time at R0' ready.
The hardware HDCP engine trigger is changed and the repeater KSV fails
will restart HDCP.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/i
From: Hermes Wu
A HDCP source device shall support max downstream to 127 devices.
Change definition MAX_HDCP_DOWN_STREAM_COUNT to 127
KSVs shall save for DRM blocked devices check.
This results in struct it6505 growth by ~0.5 KiB.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505
From: Hermes Wu
DisplayPort AUX protocol supports I2C transport which is capable of
reading EDID or supports MCCS.
In drm_dp_helper, drm_dp_i2c_xfer() packs I2C requests into a
sequence of AUX requests.
it6505_aux_i2c_operation() is implemented to match drm_dp_i2c_xfer()
operactions.
it6505_aux_
This is a v6 patch-set.
There are lots of failure items while running HDCP CTS using UNIGRAF DPR-100.
In Order to fix those failures, HDCP flow needs to be changed.
The DisplayPort AUX protocol supports I2C transport.
In Order to support MCCS via the aux channel, the aux-i2c operation is added.
From: Hermes Wu
HDCP KSV list readback can choose to use AUX FIFO or
general data register.
For some DisplayPort devices, the KSV list must be read
in 5 byte boundaries.
The original AUX read command does not support these devices.
The AUX command operation control register "REG_AUX_CMD_REQ" use
From: Hermes Wu
When HDCP is activated,
a DisplayPort source receiving CP_IRQ from the sink
shall check Bstatus from DPCD and process the corresponding value
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
dif
From: Hermes Wu
HDCP must disabled encryption and restart authentication after
waiting KSV for 5s.
The original method uses a counter in a waitting loop that may
wait much longer than it is supposed to.
Use time_after() for KSV wait timeout.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/
From: Hermes Wu
The hardware AUX FIFO is 16 bytes
Change definition of AUX_FIFO_MAX_SIZE to 16
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/
From: Hermes Wu
The original AUX operation using data registers is limited to 4 bytes.
The AUX operation command CMD_AUX_I2C_EDID_READ uses AUX FIFO and
is capable of reading 16 bytes.
This improves the speed of EDID read.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 10 +
There are lots of failure items while running HDCP CTS using UNIGRAF DPR-100.
In Order to fix those failures, HDCP flow needs to be changed.
The DisplayPort AUX protocol supports I2C transport.
In Order to support MCCS via the aux channel, the aux-i2c operation is added.
v6->v7
-[3/10] ad
From: Hermes Wu
HDCP KSV list readback can choose to use AUX FIFO or
general data register.
For some DisplayPort devices, the KSV list must be read
in 5 byte boundaries.
The original AUX read command does not support these devices.
The AUX command operation control register "REG_AUX_CMD_REQ" use
From: Hermes Wu
The original AUX operation using data registers is limited to 4 bytes.
The AUX operation command CMD_AUX_I2C_EDID_READ uses AUX FIFO and
is capable of reading 16 bytes.
This improves the speed of EDID read.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
drivers/gpu
From: Hermes Wu
A HDCP source device shall support max downstream to 127 devices.
Change definition MAX_HDCP_DOWN_STREAM_COUNT to 127
KSVs shall save for DRM blocked devices check.
This results in struct it6505 growth by ~0.5 KiB.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
dr
From: Hermes Wu
When HDCP negotiation with a repeater device.
Checking SHA V' matching must retry 3 times before restarting HDCP.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --gi
From: Hermes Wu
The hardware AUX FIFO is 16 bytes
Change definition of AUX_FIFO_MAX_SIZE to 16
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
From: Hermes Wu
HDCP must disabled encryption and restart authentication after
waiting KSV for 5s.
The original method uses a counter in a waitting loop that may
wait much longer than it is supposed to.
Use time_after() for KSV wait timeout.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/
From: Hermes Wu
When starting HDCP authentication, HDCP encryption should be enabled
when R0'is checked.
Change encryption enables time at R0' ready.
The hardware HDCP engine trigger is changed and the repeater KSV fails
will restart HDCP.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/i
From: Hermes Wu
When HDCP is activated,
a DisplayPort source receiving CP_IRQ from the sink
shall check Bstatus from DPCD and process the corresponding value
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 12 +---
1 file changed, 9 ins
From: Hermes Wu
When running the HDCP CTS test with UNIGRAF DPR-100.
KSV list must be read from DP_AUX_HDCP_KSV_FIFO in an AUX request,
and can not separate with multiple read requests.
The AUX operation command "CMD_AUX_GET_KSV_LIST" reads the KSV list
with AUX FIFO and is able to read DP_AUX_H
From: Hermes Wu
DisplayPort AUX protocol supports I2C transport which is capable of
reading EDID or supports MCCS.
In drm_dp_helper, drm_dp_i2c_xfer() packs I2C requests into a
sequence of AUX requests.
it6505_aux_i2c_operation() is implemented to match drm_dp_i2c_xfer()
operactions.
it6505_aux_
From: Hermes Wu
The original AUX operation using data registers is limited to 4 bytes.
The AUX operation command CMD_AUX_I2C_EDID_READ uses AUX FIFO and
is capable of reading 16 bytes.
This improves the speed of EDID read.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
drivers/gpu
From: Hermes Wu
HDCP KSV list readback can choose to use AUX FIFO or
general data register.
For some DisplayPort devices, the KSV list must be read
in 5 byte boundaries.
The original AUX read command does not support these devices.
The AUX command operation control register "REG_AUX_CMD_REQ" use
From: Hermes Wu
When starting HDCP authentication, HDCP encryption should be enabled
when R0'is checked.
Change encryption enables time at R0' ready.
The hardware HDCP engine trigger is changed and the repeater KSV fails
will restart HDCP.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/i
There are lots of failure items while running HDCP CTS using UNIGRAF DPR-100.
In Order to fix those failures, HDCP flow needs to be changed.
The DisplayPort AUX protocol supports I2C transport.
In Order to support MCCS via the aux channel, the aux-i2c operation is added.
v6->v7
-[3/10] ad
From: Hermes Wu
A HDCP source device shall support max downstream to 127 devices.
Change definition MAX_HDCP_DOWN_STREAM_COUNT to 127
KSVs shall save for DRM blocked devices check.
This results in struct it6505 growth by ~0.5 KiB.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
dr
From: Hermes Wu
When HDCP is activated,
a DisplayPort source receiving CP_IRQ from the sink
shall check Bstatus from DPCD and process the corresponding value
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 12 +---
1 file changed, 9 ins
From: Hermes Wu
HDCP must disabled encryption and restart authentication after
waiting KSV for 5s.
The original method uses a counter in a waitting loop that may
wait much longer than it is supposed to.
Use time_after() for KSV wait timeout.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/
From: Hermes Wu
The hardware AUX FIFO is 16 bytes
Change definition of AUX_FIFO_MAX_SIZE to 16
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver")
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
From: Hermes Wu
When running the HDCP CTS test with UNIGRAF DPR-100.
KSV list must be read from DP_AUX_HDCP_KSV_FIFO in an AUX request,
and can not separate with multiple read requests.
The AUX operation command "CMD_AUX_GET_KSV_LIST" reads the KSV list
with AUX FIFO and is able to read DP_AUX_H
From: Hermes Wu
When HDCP negotiation with a repeater device.
Checking SHA V' matching must retry 3 times before restarting HDCP.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 32 +++-
1 file changed, 19 insertions(+), 13 deletions(-)
diff --gi
From: Hermes Wu
DisplayPort AUX protocol supports I2C transport which is capable of
reading EDID or supports MCCS.
In drm_dp_helper, drm_dp_i2c_xfer() packs I2C requests into a
sequence of AUX requests.
it6505_aux_i2c_operation() is implemented to match drm_dp_i2c_xfer()
operactions.
it6505_aux_
From: Hermes Wu
For supporting audio form I2S to DP audio data sub stream.
Add hdmi_audio callbacks to drm_bridge_funcs for the
HDMI codec framework. The DRM_BRIDGE_OP_HDMI flag in bridge.ops
must be set, and hdmi_write_infoframe and hdmi_clear_infoframe
are necessary for the drm_bridge_connector
For supporting audio form I2S to DP audio data sub stream.
Add hdmi_audio callbacks to drm_bridge_funcs for the HDMI codec
framework.
The DRM_BRIDGE_OP_HDMI flag in bridge.ops must be set,
and implement necessary callbacks for the drm_bridge_connector
to enable the HDMI codec.
Signed-off-by:
From: Hermes Wu
Add DRM_BRIDGE_OP_HDMI to bridge.ops and implement necessary callback
functions.
The native AVI and AUDIO infoframe configuration API are removed.
In .atomic_enable use
drm_atomic_helper_connector_hdmi_update_infoframes().
for infoframe updates.
Signed-off-by: Hermes Wu
---
d
From: Hermes Wu
For supporting audio form I2S to DP audio data sub stream.
Add hdmi_audio callbacks to drm_bridge_funcs for the HDMI codec
framework.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 46 +
1 file changed, 46 insertions(+)
d
From: Hermes Wu
The loop of V compare is expected to iterate for 5 times
which compare V array form av[0][] to av[4][].
It should check loop counter reach the last statement before return true
Fixes: 0989c02c7a5c ("drm/bridge: it6505: fix HDCP CTS compare V matching")
Reviewed-by: Dmitry Baryshk
From: Hermes Wu
The loop of V compare is expected to iterate for 5 times
which compare V array form av[0][] to av[4][].
It should check loop counter reach the last statement "i == 5"
before return true
Fixes: 0989c02c7a5c ("drm/bridge: it6505: fix HDCP CTS compare V matching")
Reviewed-by: Dmitr
From: Hermes Wu
IT6505 supports audio form I2S to DP audio data sub stream
Support audio codec operation include
hw_params, audio_startup, audio_shutdown, hook_plugged_cb.
In order to prevent pop noise from sink devise, delay audio by
after I2S signal is enable by source.
Signed-off-by: Hermes
From: Hermes Wu
Fix a typo where V compare incorrectly compares av[] with av[] itself,
which can result in HDCP failure.
The loop of V compare is expected to iterate for 5 times
which compare V array form av[0][] to av[4][].
It should check loop counter reach the last statement "i == 5"
before r
IT6505 supports HW auto link training which will write DPCD and check
training status automatically. Some DP device can not pass
HW auto link training and must set link training step by step.
when HW auto link training fail, it may trigger video FIFO error,
and link training process will reset to
From: Hermes Wu
IT6505 supports HW link training which will write DPCD and check
training status automatically.
In the case that driver set link rate at 2.7G and HW fail to training,
it will change link configuration and try 1.65G. And this will cause
INT_VID_FIFO_ERROR triggered when link clock
From: Hermes Wu
When connect to device which can only training done by
step training, skip auto training when link training restart,
usually happen when display resolution is changed.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 36 +---
1
From: Hermes Wu
The DP link training work include auto training and after
auto training failed "auto_train_retry" times, it switch to
step training mode.
It will more efficiency that finish link auto training,
include retry, and step training in a work, rather than
re-schedule train work when ea
From: Hermes Wu
The loop of V compare is expected to iterate for 5 times
which compare V array form av[0][] to av[4][].
It should check loop counter reach the last statement before return true
Fixes: 0989c02c7a5c ("drm/bridge: it6505: fix HDCP CTS compare V matching")
Signed-off-by: Hermes Wu
From: Hermes Wu
The DP link training work include auto training and after
auto training failed "auto_train_retry" times, it switch to
step training mode.
It will more efficiency that finish link auto training,
include retry, and step training in a work, rather than
re-schedule train work when ea
From: Hermes Wu
IT6505 supports HW link training which will write DPCD and check
training status automatically.
In the case that driver set link rate at 2.7G and HW fail to training,
it will change link configuration and try 1.65G. And this will cause
INT_VID_FIFO_ERROR triggered when link clock
IT6505 supports HW auto link training which will write DPCD and check
training status automatically. Some DP device can not pass
HW auto link training and must set link training step by step.
when HW auto link training fail, it may trigger video FIFO error,
and link training process will reset to
From: Hermes Wu
When connect to a DP-to-HDMI device which does not connect
to HDMI sink, it will report DPCD 00200h with SINK_COUNT = "0",
and issue HPD_IRQ when SINK_COUNT change to "1".
IT6505 can not recive HPD_IRQ before training done and driver will
force HW enter training done state when c
From: Hermes Wu
When connect to device which can only training done by
step training, skip auto training when link training restart,
usually happen when display resolution is changed.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 36 +---
1
From: Hermes Wu
The DP link training work include auto training and after
auto training failed "AUTO_TRAIN_RETRY" times, it switch to
step training mode.
It will more efficiency that finish link auto training,
include retry, and step training in a work, rather than
re-schedule train work when ea
From: Hermes Wu
In order to reset HW link auto training state,
bits FORCE_RETRAIN and MANUAL_TRAIN at REG_TRAIN_CTRL1 must be set
at the same time.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers
From: Hermes Wu
When connect to device which can only training done by
step training, skip auto training when link training restart,
usually happen when display resolution is changed.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 29 +
1 file ch
From: Hermes Wu
IT6505 supports HW link training which will write DPCD and check
training status automatically.
In the case that driver set link rate at 2.7G and HW fail to training,
it will change link configuration and try 1.65G. And this will cause
INT_VID_FIFO_ERROR triggered when link clock
From: Hermes Wu
When start link training, interrupt status INT_LINK_TRAIN_FAIL can
use to check link training fail and no need to wait until timeout.
it6505_irq_link_train_fail() remove from interrupt and no longer used.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 25 ++
IT6505 supports HW auto link training which will write DPCD and check
training status automatically. Some DP device can not pass
HW auto link training and must set link training step by step.
when HW auto link training fail, it may trigger video FIFO error,
and link training process will reset to
From: Hermes Wu
When connect to device which can only training done by
step training, skip auto training when link training restart,
usually happen when display resolution is changed.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 8 ++--
1 file changed, 6 insertions(+)
From: Hermes Wu
IT6505 supports HW link training which will write DPCD and check
training status automatically.
In the case that driver set link rate at 2.7G and HW fail to training,
it will change link configuration and try 1.65G. And this will cause
INT_VID_FIFO_ERROR triggered when link clock
From: Hermes Wu
The DP link training work include auto training and after
auto training failed "AUTO_TRAIN_RETRY" times, it switch to
step training mode.
It will more efficiency that finish link auto training,
include retry, and step training in a work, rather than
re-schedule train work when ea
IT6505 supports HW auto link training which will write DPCD and check
training status automatically. Some DP device can not pass
HW auto link training and must set link training step by step.
when HW auto link training fail, it may trigger video FIFO error,
and link training process will reset to
From: Hermes Wu
When start link training, interrupt status INT_LINK_TRAIN_FAIL can
use to check link training fail and no need to wait until timeout.
it6505_irq_link_train_fail() remove from interrupt and no longer used.
Signed-off-by: Hermes Wu
---
drivers/gpu/drm/bridge/ite-it6505.c | 26 ++
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