Am Donnerstag, 15. August 2024, 19:26:54 CEST schrieb Cristian Ciocaltea:
> On 8/15/24 5:21 PM, Heiko Stübner wrote:
> > Am Donnerstag, 8. August 2024, 13:58:02 CEST schrieb Cristian Ciocaltea:
> >> Move rockchip_drm_platform_driver unregistration after its sub-drivers,
>
mermann
> Cc: Sandy Huang
> Cc: "Heiko Stübner"
> Cc: Andy Yan
I've looked up the whole patchseries and while I can't say overly much
about the core changes, at least for the Rockchip driver, things look
like they'll stay the same even after t
Am Montag, 19. August 2024, 13:25:08 CEST schrieb Mary Guillemard:
> Expose timestamp information supported by the GPU with a new device
> query.
>
> Mali uses an external timer as GPU system time. On ARM, this is wired to
> the generic arch timer so we wire cntfrq_el0 as device frequency.
>
> Th
Am Montag, 13. November 2023, 12:23:25 CET schrieb Heiner Kallweit:
> After removal of the legacy EEPROM driver and I2C_CLASS_DDC support in
> olpc_dcon there's no i2c client driver left supporting I2C_CLASS_DDC.
> Class-based device auto-detection is a legacy mechanism and shouldn't
> be used in n
Am Dienstag, 14. November 2023, 12:28:41 CET schrieb Andy Yan:
> From: Andy Yan
>
> The vop2 on rk3588 is similar to which on rk356x
> but with 4 video outputs and need to reference
> more grf modules.
>
> Signed-off-by: Andy Yan
> ---
>
> .../display/rockchip/rockchip-vop2.yaml | 25 ++
Hi Andy,
Am Dienstag, 14. November 2023, 12:28:55 CET schrieb Andy Yan:
> From: Andy Yan
>
> VOP2 on rk3588:
>
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4 4K Cluster windows with AFBC/line RGB and AFBC-only YUV support
> 4 4K Esmart
Am Mittwoch, 15. November 2023, 03:02:42 CET schrieb Andy Yan:
> Hi Heiko:
>
> On 11/15/23 07:34, Heiko Stübner wrote:
> > Hi Andy,
> >
> > Am Dienstag, 14. November 2023, 12:28:55 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> VO
Am Donnerstag, 22. Februar 2024, 19:14:17 CET schrieb Maxime Ripard:
> The new HDMI connector infrastructure allows to remove some boilerplate,
> especially to generate infoframes. Let's switch to it.
>
> Signed-off-by: Maxime Ripard
Reviewed-by: Heiko Stuebner
> ---
> drivers/gpu/drm/rockchi
Am Sonntag, 18. Februar 2024, 22:41:14 CET schrieb Boris Brezillon:
> Hello,
>
> This is the 5th version of the kernel driver for Mali CSF-based GPUs,
> and, unless someone has good reasons to block the merging of this
> driver, I expect it to be the last one (the gallium driver is now
> in a dece
Am Dienstag, 30. Januar 2024, 20:36:22 CET schrieb Manuel Traut:
> Hi Dang,
>
> On Sat, Jan 27, 2024 at 06:35:50PM +0700, Dang Huynh wrote:
> > Hi Manuel,
> >
> > Since the BOE patches have been accepted to next, you do not need to
> > include
> > it in this patch series.
>
> sorry, I thought
Am Donnerstag, 15. Februar 2024, 18:06:06 CET schrieb Conor Dooley:
> On Thu, Feb 15, 2024 at 10:05:14AM +0100, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > Add the compatible for the ltk101b4029w panel, that is really similar
> > to the ltk500hd1829.
>
> Please mention what makes the
Hi Alex,
Am Donnerstag, 9. Mai 2024, 14:07:08 CEST schrieb Alex Bee:
> This series aims to add support for the DesignWare MIPI DSI controller and
> the Innoslicon D-PHY found in RK3128 SoCs. The code additions are rather
> tiny: It only need some code in the Rockchip dw-mipi-dsi glue layer for
> t
Am Mittwoch, 15. Mai 2024, 18:19:29 CEST schrieb Conor Dooley:
> On Tue, May 14, 2024 at 11:19:47AM -0400, Detlev Casanova wrote:
> > Add the documentation for VOP2 video ports reset clocks.
> > One reset can be set per video port.
> >
> > Signed-off-by: Detlev Casanova
>
> Are these resets vali
Hi Alex,
Am Dienstag, 21. Mai 2024, 12:58:07 CEST schrieb keith:
> Verisilicon/DC8200 display controller IP has 2 display pipes and each
> pipe support a primary plane and a cursor plane .
> In addition, there are four overlay planes as two display pipes common
> resources.
>
> The first displ
Hi Val,
Am Montag, 27. Mai 2024, 09:16:33 CEST schrieb Val Packett:
> On the RK3066, there is a bit that must be cleared, otherwise
> the picture does not show up on the display (at least for RGB).
>
> Fixes: f4a6de8 ("drm: rockchip: vop: add rk3066 vop definitions")
> Cc: sta...@vger.kernel.org
Hey,
Am Dienstag, 28. Mai 2024, 00:13:59 CEST schrieb Val Packett:
> On Mon, May 27 2024 at 22:43:18 +02:00:00, Heiko Stübner
> wrote:
> > Am Montag, 27. Mai 2024, 09:16:33 CEST schrieb Val Packett:
> >> On the RK3066, there is a bit that must be cleared, otherwise
>
Am Mittwoch, 29. Mai 2024, 17:55:25 CEST schrieb Diederik de Haas:
> On Thursday, 25 April 2024 17:19:58 CEST Heiko Stuebner wrote:
> > On Mon, 22 Apr 2024 18:19:04 +0800, Andy Yan wrote:
> > > From: Andy Yan
> > >
> > > The port mux bits of VP2 should be defined by
> > > RK3568_OVL_PORT_SET__POR
Hi Johan,
Am Donnerstag, 23. November 2023, 13:54:28 CET schrieb Johan Jonker:
>
> On 11/20/23 18:06, Heiko Stuebner wrote:
> > Hi Johan,
> >
> > Am Donnerstag, 2. November 2023, 14:42:19 CET schrieb Johan Jonker:
> >> The Rk3066 hdmi output format is hard coded to RGB. Remove
> >> all useless c
Am Mittwoch, 22. November 2023, 13:54:13 CET schrieb Andy Yan:
> From: Andy Yan
>
> At first we thought the half_block_en bit in AFBCD_CTRL register
> only work in afbc mode. But the fact is that it control the line
> buffer in all mode(afbc/tile/line), so we need configure it in
> all case.
>
>
Am Mittwoch, 22. November 2023, 13:54:25 CET schrieb Andy Yan:
> From: Andy Yan
>
> The enable bit and transform offset of cluster windows should be
> cleared when it work at linear mode, or we may have a iommu fault
> issue.
>
> Signed-off-by: Andy Yan
I guess same here?
Fixes: 604be85547ce
Hi Andy,
Am Mittwoch, 22. November 2023, 13:55:44 CET schrieb Andy Yan:
> From: Andy Yan
>
> VOP2 on rk3588:
>
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4 4K Cluster windows with AFBC/line RGB and AFBC-only YUV support
> 4 4K Esmart
Am Dienstag, 28. November 2023, 09:03:46 CET schrieb Andy Yan:
> Hi Heiko:
>
> On 11/27/23 23:02, Heiko Stübner wrote:
> > Am Mittwoch, 22. November 2023, 13:54:25 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> The enable bit and transform offset
Hi Andy,
Am Dienstag, 28. November 2023, 10:32:55 CET schrieb Andy Yan:
> On 11/27/23 23:29, Heiko Stübner wrote:
> > Am Mittwoch, 22. November 2023, 13:55:44 CET schrieb Andy Yan:
> >> From: Andy Yan
> >>
> >> VOP2 on rk3588:
> >>
> >>
Hi Andy,
Am Donnerstag, 30. November 2023, 13:25:00 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add a Rockchip RK3588 compatible
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> Documentation/devicetree/bindings/iommu/rockchip,iommu.yaml | 1 +
> 1 file changed, 1 insertion(+)
Hi Alex,
Am Samstag, 2. Dezember 2023, 13:51:41 CET schrieb Alex Bee:
> Add power controller and qos nodes for RK3128 in order to use
> them as powerdomains.
does the power-domain controller work with the incomplete set of
pm-domains too?
What I have in mind is
- adding the power-controller node
Hi Alex,
Am Samstag, 2. Dezember 2023, 17:36:15 CET schrieb Alex Bee:
> Am 02.12.23 um 16:51 schrieb Heiko Stübner:
> > Am Samstag, 2. Dezember 2023, 13:51:41 CET schrieb Alex Bee:
> >> Add power controller and qos nodes for RK3128 in order to use
> >> them as power
Hi Alex,
Am Sonntag, 3. Dezember 2023, 17:05:47 CET schrieb Alex Bee:
> Am 02.12.23 um 18:46 schrieb Heiko Stübner:
> > Am Samstag, 2. Dezember 2023, 17:36:15 CET schrieb Alex Bee:
> >> Am 02.12.23 um 16:51 schrieb Heiko Stübner:
> >>> Am Samstag, 2. Dezember 2023,
Am Dienstag, 5. Dezember 2023, 09:28:24 CET schrieb Neil Armstrong:
> On 05/12/2023 09:26, Neil Armstrong wrote:
> > Hi,
> >
> > On Mon, 04 Dec 2023 12:57:09 -0600, Chris Morgan wrote:
> >> From: Chris Morgan
> >>
> >> Add support for the Rockchip RK3566 based Powkiddy X55 handheld gaming
> >> co
Am Dienstag, 26. März 2024, 18:50:37 CET schrieb Krzysztof Kozlowski:
> On 26/03/2024 18:50, Krzysztof Kozlowski wrote:
> > On 26/03/2024 18:28, Heiko Stuebner wrote:
> >> The #sound-dai-cells DT property is required to describe link between
> >> the HDMI IP block and the SoC's audio subsystem.
> >
Am Samstag, 15. Juni 2024, 19:03:53 CEST schrieb Jonas Karlman:
> Similar to DCLK_LCDC on RK3328, the DCLK_VOP on RK3228 is typically
> parented by the hdmiphy clk and it is expected that the DCLK_VOP and
> hdmiphy clk rate are kept in sync.
>
> Use CLK_SET_RATE_PARENT and CLK_SET_RATE_NO_REPARENT
Am Montag, 22. April 2024, 12:19:05 CEST schrieb Andy Yan:
> From: Andy Yan
>
> The port mux of VP2 should be RK3568_OVL_PORT_SET__PORT2_MUX.
>
> Fixes: 604be85547ce ("drm/rockchip: Add VOP2 driver")
> Signed-off-by: Andy Yan
on a rk3588 with VP3 connected to a DSI display
Tested-by: Heiko Stu
Am Freitag, 3. Mai 2024, 14:57:03 CEST schrieb Quentin Schulz:
> Hi Heiko,
>
> On 4/25/24 9:55 PM, Heiko Stuebner wrote:
> > From: Heiko Stuebner
> >
> > The rk3588 VOP2 has 4 video-ports, yet the driver currently only
> > configures the first 3, as used on the rk3568.
> >
>
> I'm wondering wh
mium.org
> [2] https://lore.kernel.org/r/20230901234202.566951-1-diand...@chromium.org
> [3] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: "Heiko Stübner"
> Cc: Quentin Schulz
> Signed-off-by: Douglas Anderson
On a rk3588-tiger with WIP DSI
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: "Heiko Stübner"
> Cc: Quentin Schulz
> Signed-off-by: Douglas Anderson
Reviewed-by: Heiko Stuebner
on a
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: Chris Zhong
> Cc: Lin Huang
> Cc: Brian Norris
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Ander
] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: Chris Zhong
> Cc: Lin Huang
> Cc: Brian Norris
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
change itself is
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: Brian Norris
> Cc: Chris Zhong
> Cc: Nickey Yang
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Ander
] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: Brian Norris
> Cc: Chris Zhong
> Cc: Nickey Yang
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
chang
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as t
mium.org
> [2] https://lore.kernel.org/r/20230901234202.566951-1-diand...@chromium.org
> [3] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as w
ed/enabled state. Even if someone was relying on the
> double-check before, that double-check is now in the core and not
> needed in individual drivers.
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as t
] https://lore.kernel.org/r/20230921192749.1542462-1-diand...@chromium.org
>
> Cc: "Heiko Stübner"
> Signed-off-by: Douglas Anderson
the underlying setup (rockchip-drm with dw-dsi) as well as the
change itself is similar to the ltk050h3146w variant, so I don't
see how this should behave differently ;-)
Reviewed-by: Heiko Stuebner
Am Freitag, 2. März 2018, 18:57:54 CET schrieb Enric Balletbo i Serra:
> From: Jeffy Chen
>
> Add missing error handling in bind().
>
> Fixes: 412d4ae6b7a5 ("drm/rockchip: hdmi: add Innosilicon HDMI support")
> Signed-off-by: Jeffy Chen
> Signed-off-by: Thierry Escande
> [moved clk_disable_unp
Am Freitag, 2. März 2018, 18:57:53 CET schrieb Enric Balletbo i Serra:
> From: Jeffy Chen
>
> In bind()'s error handling path call destroy functions instead of
> cleanup functions for encoder and connector and reorder to match how is
> called in bind().
>
> In unbind() call the connector and enc
Am Freitag, 2. März 2018, 18:57:55 CET schrieb Enric Balletbo i Serra:
> From: Jeffy Chen
>
> In bind the clk_prepare_enable of the HDMI pclk is called before adding the
> i2c_adapter. So it should be the other way around in unbind, first remove
> the i2c_adapter and then call the clk_disable_unp
Am Freitag, 2. März 2018, 18:57:56 CET schrieb Enric Balletbo i Serra:
> From: Jeffy Chen
>
> The HDMI vpll clock should be enabled when bind() is called. So move the
> clk_prepare_enable of that clock to bind() function and add the missing
> clk_disable_unprepare() required in error handling pat
Am Freitag, 9. März 2018, 23:22:53 CET schrieb Enric Balletbo i Serra:
> From: Sean Paul
>
> Now that the spinlocks and timers are gone, we can remove the psr
> worker located in rockchip's analogix driver and do the enable/disable
> directly. This should simplify the code and remove races on dis
Am Freitag, 9. März 2018, 23:22:55 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> Add a lock to vop to avoid disabling the crtc while waiting for a line
> flag while enabling psr. If we disable in the middle of waiting for the
> line flag, we'll end up timing out or worse.
>
> Signed-
Hi,
the subject is misleading I think, as this is touching only the generic
bridge code and not anything Rockchip-related, so should probably
be "drm/bridge"?
Am Freitag, 9. März 2018, 23:22:57 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> We currently wait for the panel to mirror o
Am Freitag, 9. März 2018, 23:22:52 CET schrieb Enric Balletbo i Serra:
> From: Yakir Yang
>
> Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
> function, or print the sink PSR error state if we failed to apply the
> requested PSR setting.
>
> Cc: 征增 王
> Cc: Stéphane M
Am Freitag, 9. März 2018, 23:22:54 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> There is a race between AUX CH bring-up and enabling bridge which will
> cause link training to fail. To avoid hitting it, don't change psr state
> while enabling the bridge.
>
> Cc: Tomeu Vizoso
> Cc:
Am Freitag, 9. März 2018, 23:23:10 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> If we failed disable psr, it would hang the display until next psr
> cycle coming. So we should restore psr->state when it failed.
>
> Cc: Tomasz Figa
> Signed-off-by: zain wang
> Signed-off-by: Dougla
Am Freitag, 9. März 2018, 23:22:51 CET schrieb Enric Balletbo i Serra:
> Hi,
>
> This patchset includes cleanups, improvements, and bug fixes for
> Rockchip DRM driver and PSR support.
>
> This new version is the same as before removing some of the patches
> already applied and fixing the Exynos
Am Freitag, 9. März 2018, 23:22:52 CET schrieb Enric Balletbo i Serra:
> From: Yakir Yang
>
> Make sure the request PSR state takes effect in analogix_dp_send_psr_spd()
> function, or print the sink PSR error state if we failed to apply the
> requested PSR setting.
>
> Cc: 征增 王
> Cc: Stéphane M
Am Freitag, 9. März 2018, 23:22:53 CET schrieb Enric Balletbo i Serra:
> From: Sean Paul
>
> Now that the spinlocks and timers are gone, we can remove the psr
> worker located in rockchip's analogix driver and do the enable/disable
> directly. This should simplify the code and remove races on dis
Am Freitag, 9. März 2018, 23:22:55 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> Add a lock to vop to avoid disabling the crtc while waiting for a line
> flag while enabling psr. If we disable in the middle of waiting for the
> line flag, we'll end up timing out or worse.
>
> Signed-
Am Freitag, 9. März 2018, 23:22:54 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> There is a race between AUX CH bring-up and enabling bridge which will
> cause link training to fail. To avoid hitting it, don't change psr state
> while enabling the bridge.
>
> Cc: Tomeu Vizoso
> Cc:
Am Freitag, 9. März 2018, 23:22:56 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> We would meet a short black screen when exit PSR with the full link
> training, In this case, we should use fast link train instead of full
> link training.
>
> Signed-off-by: zain wang
> Signed-off-by:
Am Freitag, 9. März 2018, 23:22:57 CET schrieb Enric Balletbo i Serra:
> From: zain wang
>
> We currently wait for the panel to mirror our intended PSR state
> before continuing on both PSR enter and PSR exit. This is really
> only important to do when we're entering PSR, since we want to
> be su
Am Dienstag, 20. Februar 2018, 14:01:17 CET schrieb Marc Zyngier:
> This small series fixes a number of issues that I found while trying
> to get kexec working on the Chromebook Plus (aka rk3399-gru-kevin) in
> order to use it as some sort of interactive bootloader.
>
> The main issue is that the
Hi,
Am Montag, 4. September 2017, 18:14:56 CEST schrieb Jagan Teki:
> Is linux-next support HDMI on rk3288? I'm trying to enable hdmi (with
> ddc-i2c-bus) statically along with Linux boot logo. Observed an kernel
> boot hang, didn't find whats wrong because DWC MHL PHY as detected
> from the log.
Hi Mark,
Am Donnerstag, 7. September 2017, 18:16:29 CEST schrieb Mark yao:
> Looks good for me, so:
> Reviewed-by: Mark Yao
>
> I'd like to apply these lvds patches tomorrow if there is no more doubts.
Rob had some minor comments on v7 of the dt-binding, so you may want
to give him a bit more t
Hi Nickey,
Am Montag, 18. September 2017, 17:05:37 CEST schrieb Nickey Yang:
> clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll
please try to be a bit more verbose in your commit messages :-) .
It looks to me, like this patch does not depend on the other ones and
I can
Am Montag, 18. September 2017, 17:05:37 CEST schrieb Nickey Yang:
> clk_24m --> Gate11[14] --> clk_mipidphy_ref --> Gate21[0] --> clk_dphy_pll
>
> Signed-off-by: Nickey Yang
applied as fix for 4.14 after polishing the commit message a bit
Thanks
Heiko
__
Hi Kishon,
Am Freitag, 16. Februar 2018, 12:04:42 CET schrieb Kishon Vijay Abraham I:
> On Friday 10 February 2017 01:14 PM, Chris Zhong wrote:
> > There are 2 Type-c PHYs in RK3399, but only one DP controller. Hence
> > only one PHY can connect to DP controller at one time, the other should
> > b
Am Dienstag, 30. Januar 2018, 21:28:35 CET schrieb Thierry Escande:
> From: zain wang
>
> The bridge does not need to be powered in analogix_dp_bind(), so
> remove the calls to pm_runtime_get()/phy_power_on()/analogix_dp_init_dp()
> as well as their power-off counterparts.
>
> Cc: Stéphane March
Am Mittwoch, 28. Februar 2018, 15:54:30 CET schrieb Marc Zyngier:
> On 28/02/18 14:37, Heiko Stübner wrote:
> > Am Dienstag, 30. Januar 2018, 21:28:35 CET schrieb Thierry Escande:
> >> From: zain wang
> >>
> >> The bridge does not need to be powered in an
Am Dienstag, 30. Januar 2018, 21:28:35 CET schrieb Thierry Escande:
> From: zain wang
>
> The bridge does not need to be powered in analogix_dp_bind(), so
> remove the calls to pm_runtime_get()/phy_power_on()/analogix_dp_init_dp()
> as well as their power-off counterparts.
>
> Cc: Stéphane March
Am Freitag, 23. Februar 2018, 07:22:50 CET schrieb Jeffy Chen:
> Currently we are calling scl_vop_cal_scale() to get vskiplines for yrgb
> and cbcr. So the cbcr's vskiplines might be an unexpected value if the
> second scl_vop_cal_scale() didn't update it.
>
> Init vskiplines in scl_vop_cal_scale(
Am Mittwoch, 7. Februar 2018, 18:53:09 CET schrieb Enric Balletbo i Serra:
> From: Jeffy Chen
>
> Since we are trying to access components' resources in the master's
> suspend/resume PM callbacks(e.g. panel), add device links to correct
> the suspend/resume and shutdown ordering.
>
> Signed-off-
Am Mittwoch, 10. Januar 2018, 17:23:41 CET schrieb Thierry Escande:
> From: Jeffy Chen
>
> The driver that instantiates the bridge should own the drvdata, as all
> driver model callbacks (probe, remove, shutdown, PM ops, etc.) are also
> owned by its driver struct. Moreover, storing two different
Am Mittwoch, 10. Januar 2018, 17:23:42 CET schrieb Thierry Escande:
> From: Jeffy Chen
>
> Since we are initing connector in the core driver and encoder in the
> plat driver, let's clean them up in the right places.
>
> Signed-off-by: Jeffy Chen
> Signed-off-by: Thierry Escande
> Reviewed-by:
Am Mittwoch, 10. Januar 2018, 17:23:43 CET schrieb Thierry Escande:
> From: Jeffy Chen
>
> The rockchip_drm_psr_register() can fail, so add a sanity check for that.
>
> Also reorder the calls in unbind() to match bind().
>
> Signed-off-by: Jeffy Chen
> Signed-off-by: Thierry Escande
applied
Am Mittwoch, 10. Januar 2018, 17:23:47 CET schrieb Thierry Escande:
> From: Jeffy Chen
>
> Let plat drivers own the drvdata, so that they could cleanup resources
> in their unbind().
>
> Signed-off-by: Jeffy Chen
> Signed-off-by: Thierry Escande
> Reviewed-by: Neil Armstrong
This looks like
Hi Jeffy, Thierry, Enric,
Am Mittwoch, 10. Januar 2018, 17:23:44 CET schrieb Thierry Escande:
> From: Jeffy Chen
>
> Add missing pm_runtime_disable() in bind()'s error handling path.
>
> Also cleanup encoder & connector in unbind().
Can you please split all these surprise "Also" sections into
Am Montag, 5. März 2018, 09:57:39 CET schrieb Marek Szyprowski:
> From: zain wang
>
> The bridge does not need to be powered in analogix_dp_bind(), so
> remove the calls to pm_runtime_get()/phy_power_on()/analogix_dp_init_dp()
> as well as their power-off counterparts.
>
> Cc: Stéphane Marchesin
Am Montag, 5. März 2018, 09:57:40 CET schrieb Marek Szyprowski:
> Enabling runtime power management early in analogix_dp_bind() causes
> following kernel NULL pointer dereference:
>
> Unable to handle kernel NULL pointer dereference at virtual address 07d8
> pgd = 28ffa2e4
> [07d8] *pgd=00
Am Montag, 5. März 2018, 09:57:41 CET schrieb Marek Szyprowski:
> If there is another bridge after analogix_dp, then the connector object
> should not be created. This fixes following timeouts on Exynos5420-based
> Chromebook2 Peach-PIT board during boot:
>
> exynos-dp 145b.dp-controller: AUX
Hi Mark,
Am Mittwoch, 26. Juli 2017, 14:19:25 CEST schrieb Mark Yao:
> Grouping the vop registers facilitates make register
> definition clearer, and also is useful for different vop
> reuse the same group register.
>
> Signed-off-by: Mark Yao
> ---
> drivers/gpu/drm/rockchip/rockchip_drm_vop.c
Am Donnerstag, 27. Juli 2017, 11:51:06 CEST schrieb Heiko Stübner:
> Hi Mark,
>
> Am Mittwoch, 26. Juli 2017, 14:19:25 CEST schrieb Mark Yao:
> > Grouping the vop registers facilitates make register
> > definition clearer, and also is useful for different vop
> > re
Am Mittwoch, 29. November 2017, 10:54:18 CET schrieb Daniel Vetter:
> On Tue, Nov 28, 2017 at 03:42:36PM -0800, Doug Anderson wrote:
> > Hi,
> >
> > On Sun, Nov 26, 2017 at 6:22 PM, Sandy Huang wrote:
> > > Hi Daniel,
> > >
> > > I register the account and get the drm-misc commit rights now,
Hi Chris,
Am Montag, 4. Dezember 2017, 10:47:08 CET schrieb Chris Zhong:
> On 2017年12月02日 05:58, Heiko Stuebner wrote:
> > Am Freitag, 1. Dezember 2017, 13:42:46 CET schrieb Doug Anderson:
> >> Hi,
> >>
> >> On Wed, Nov 29, 2017 at 6:27 PM, Chris Zhong wrote:
> >>> Hi Doug
> >>>
> >>> Thank you
Hi,
Am Montag, 4. Dezember 2017, 08:08:31 CET schrieb Doug Anderson:
> On Sun, Dec 3, 2017 at 11:46 PM, Heiko Stübner wrote:
> > Am Montag, 4. Dezember 2017, 10:47:08 CET schrieb Chris Zhong:
> >> On 2017年12月02日 05:58, Heiko Stuebner wrote:
> >> > Am Freitag,
Am Montag, 7. März 2016, 09:36:07 schrieb Doug Anderson:
> Hi,
>
> On Mon, Mar 7, 2016 at 12:37 AM, Mark yao wrote:
> > On 2016å¹´03æ05æ¥ 20:39, Russell King - ARM Linux wrote:
> >> On Sat, Mar 05, 2016 at 12:11:16PM +, John Keeping wrote:
> >>> On Fri, Mar 04, 2016 at 03:22:01PM -0800, D
Hi Doug,
Am Montag, 7. März 2016, 10:49:53 schrieb Doug Anderson:
> On Mon, Mar 7, 2016 at 9:57 AM, Heiko Stübner wrote:
> > Am Montag, 7. März 2016, 09:36:07 schrieb Doug Anderson:
> >> Hi,
> >>
> >> On Mon, Mar 7, 2016 at 12:37 AM, Mark yao
wrote:
> >> > On 2016å¹´03æ05æ¥ 20:39, Russel
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
Acked-by: Jingoo Han
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v14.1:
- Rebase against drm-next f
Split the dp core driver from exynos directory to bridge directory,
and rename the core driver to analogix_dp_*, rename the platform
code to exynos_dp.
Beside the new analogix_dp driver would export six hooks.
"analogix_dp_bind()" and "analogix_dp_unbind()"
"analogix_dp_suspned()" and "analogix_dp
Rockchip have three clocks for dp controller, we leave pclk_edp
to analogix_dp driver control, and keep the sclk_edp_24m and
sclk_edp in platform driver.
Signed-off-by: Yakir Yang
Tested-by: Javier Martinez Canillas
---
Changes in v14.1:
- replace rockchip_drm_encoder_get_mux_id with the new
d
Fix some obvious alignment problems, like alignment and line
over 80 characters problems, make this easy to be maintained
later.
Signed-off-by: Yakir Yang
Acked-by: Jingoo Han
Reviewed-by: Krzysztof Kozlowski
Tested-by: Javier Martinez Canillas
---
Changes in v14.1:
- Rebase against drm-next f
Hi Yakir,
Am Montag, 21. März 2016, 17:28:38 schrieb Yakir Yang:
> This patch set would add the RGA direct rendering based 2d graphics
> acceleration module.
very cool to see that.
> This patch set is based on git repository below:
> git://people.freedesktop.org/~airlied/linux drm-next
> commit
Hi,
Am Dienstag, 22. März 2016, 16:19:37 schrieb Javier Martinez Canillas:
> On 03/18/2016 07:53 PM, Doug Anderson wrote:
> > On Thu, Mar 17, 2016 at 11:41 PM, Caesar Wang > gmail.com>
wrote:
> Same here, this is the second time I tested this series (first time was
> v6 on October 25 [2]) and I
Am Mittwoch, 23. März 2016, 07:44:59 schrieb Inki Dae:
> + Ajay kumar with Samsung email
>
> Hi,
>
> 2016ë
03ì 23ì¼ 07:12ì Heiko Stübner ì´(ê°) ì´ ê¸:
> > Hi,
> >
> > Am Dienstag, 22. März 2016, 16:19:37 schrieb Javier Martinez Canillas:
> >> On 03/18/2016 07:53 PM, Doug Anderson w
Am Montag, 15. Februar 2016, 19:08:05 schrieb Yakir Yang:
> Hi all,
>
> The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
> share the same IP, so a lot of parts can be re-used. I split the common
> code into bridge directory, then rk3288 and exynos only need to keep
> some pla
Am Montag, 28. März 2016, 13:21:02 schrieb Emil Velikov:
> On 22 March 2016 at 00:42, Heiko Stuebner wrote:
> > Hi Yakir,
> >
> > Am Montag, 21. März 2016, 20:17:46 schrieb Yakir Yang:
> >> On 03/21/2016 07:29 PM, Heiko Stübner wrote:
> >> > Am Montag, 21. März 2016, 17:28:38 schrieb Yakir Ya
Am Montag, 28. März 2016, 22:35:36 schrieb Emil Velikov:
> On 28 March 2016 at 19:44, Heiko Stübner wrote:
> > Am Montag, 28. März 2016, 13:21:02 schrieb Emil Velikov:
> >> On 22 March 2016 at 00:42, Heiko Stuebner wrote:
> >> > Hi Yakir,
> >> >
> >> > Am Montag, 21. März 2016, 20:17:46 schr
Am Montag, 28. März 2016, 23:07:59 schrieb Emil Velikov:
> On 28 March 2016 at 22:46, Heiko Stübner wrote:
> > Am Montag, 28. März 2016, 22:35:36 schrieb Emil Velikov:
> >> On 28 March 2016 at 19:44, Heiko Stübner wrote:
> >> > Am Montag, 28. März 2016, 13:21:02 schrieb Emil Velikov:
> >> >>
Am Dienstag, 29. März 2016, 19:17:12 schrieb Yakir Yang:
> Hi Emil & Heiko,
>
> On 03/29/2016 05:35 AM, Emil Velikov wrote:
> > On 28 March 2016 at 19:44, Heiko Stübner wrote:
> >> Am Montag, 28. März 2016, 13:21:02 schrieb Emil Velikov:
> >>> On 22 March 2016 at 00:42, Heiko Stuebner wrote:
Hi Christian, Andy,
Am Donnerstag, 4. Januar 2024, 15:39:50 CET schrieb Cristian Ciocaltea:
> Commit 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> introduced a variable which ended up being unused. Remove it.
>
> rockchip_drm_vop2.c:1688:23: warning: variable ‘if_dclk_rate’ set b
Am Donnerstag, 4. Januar 2024, 15:39:49 CET schrieb Cristian Ciocaltea:
> The rockchip_drm_fb.h header contains just a single function which is
> not directly used by the VOP2 driver. Drop the unnecessary include.
>
> Signed-off-by: Cristian Ciocaltea
applied to drm-misc-next-fixes as
commit 38
Hi,
Am Freitag, 5. Januar 2024, 10:04:55 CET schrieb Andy Yan:
> On 1/4/24 23:58, Heiko Stübner wrote:
> > Am Donnerstag, 4. Januar 2024, 15:39:50 CET schrieb Cristian Ciocaltea:
> >> Commit 5a028e8f062f ("drm/rockchip: vop2: Add support for rk3588")
> >>
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