On 2021-07-23 3:14 p.m., Cornij, Nikola wrote:
> [AMD Official Use Only]
>
> +Harry
>
> -Original Message-
> From: Daniel Vetter
> Sent: Friday, July 23, 2021 11:23 AM
> To: Arnd Bergmann
> Cc: Daniel Vetter ; Ben Skeggs ; David
> Airlie ; Lyude Paul ; Arnd Bergmann
> ; Ville Syrjä
plane property
Harry Wentland (3):
drm/doc: Color Management and HDR10 RFC
drm/color: Add output transfer function to crtc
drm/amd/display: reformat YCbCr-RGB conversion matrix
Documentation/gpu/rfc/color_intentions.drawio | 1 +
Documentation/gpu/rfc/color_intentions.svg| 3 +
Docume
Cline's excellent HDR summaries
* Outline intention behind overly verbose doc
* Describe FP16 use-case
* Clean up links
v2: create this doc
v1: n/a
Signed-off-by: Harry Wentland
---
Documentation/gpu/rfc/color_intentions.drawio | 1 +
Documentation/gpu/rfc/color_intentions.svg
ucing named transfer functions. The original
LUT behavior is preserved with the default "1D LUT" transfer function.
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +++-
.../gpu/drm/arm/display/komeda/komeda_crtc.c | 7 ++-
drivers/gpu/drm/ar
From: Bhawanpreet Lakha
Add color space definitions for BT601, BT709, BT2020, and DCI-P3.
Default to BT709, the sRGB color space.
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +
.../gpu/drm/arm/display/komeda
Show the CSC matrixes in a 4x3 format.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 28 +
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
b/drivers/gpu/drm/amd/display/dc/inc/hw
imum white level for the SDR plane.
v2:
- fix type in description
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_color_mgmt.c | 17 +
include/drm/drm_color_mgmt.h | 6 ++
i
quot; from transfer function name (Harry)
- add DRM_TF_UNDEFINED enum as legacy default (Harry)
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +-
.../gpu/drm/arm/display/komeda/komeda_plane.c | 4 +-
drivers/g
)
| ^~
Fixes: 83b39e1fc3ea ("drm/amd/display: Log DMCUB trace buffer events")
Cc: Leo (Hanghong) Ma
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Solomon Chiu
Cc: Alex Deucher
Signed-off-by: Shaokun Zhang
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd/display
## Introduction
We are looking to enable HDR support for a couple of single-plane and
multi-plane scenarios. To do this effectively we recommend new interfaces to
drm_plane. Below I'll give a bit of background on HDR and why we propose these
interfaces.
## Defining a pixel's luminance
Curr
From: Bhawanpreet Lakha
Add the following color encodings
- RGB versions for BT601, BT709, BT2020
- DCI-P3: Used for digital movies
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_color_mgmt.c | 4
include/drm/drm_color_mgmt.h | 4
2 files
imum white level for the SDR plane.
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_color_mgmt.c | 17 +
include/drm/drm_color_mgmt.h | 6 ++
include/drm/drm_plane.h
nits
The usage is similar to color_encoding and color_range where the driver
can specify the default and supported tfs and pass it into
drm_plane_create_color_properties().
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4
On 2021-04-26 2:07 p.m., Ville Syrjälä wrote:
On Mon, Apr 26, 2021 at 01:38:50PM -0400, Harry Wentland wrote:
From: Bhawanpreet Lakha
Add the following color encodings
- RGB versions for BT601, BT709, BT2020
- DCI-P3: Used for digital movies
Signed-off-by: Bhawanpreet Lakha
Signed-off-by
On 2021-08-16 7:10 a.m., Brian Starkey wrote:
> On Fri, Aug 13, 2021 at 10:42:12AM +0530, Sharma, Shashank wrote:
>> Hello Brian,
>> (+Uma in cc)
>>
>> Thanks for your comments, Let me try to fill-in for Harry to keep the design
>> discussion going. Please find my comments inline.
>>
Thanks, Sh
On 2021-08-25 7:36 a.m., Colin King wrote:
> From: Colin Ian King
>
> There is a spelling mistake in a DC_LOG_WARNING message. Fix it.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c | 2
4th April anywhere on earth
** Election Committee **
* Eric Anholt
* Mark Filion
* Keith Packard
* Harry Wentland
Thanks,
Harry Wentland,
on behalf of the X.Org elections committee
** Nominees **
## Samuel Iglesias Gonsálvez
__Current Affiliation:__ Igalia
__Personal Statement:__
I
is it less. NTL what is
important is the application. I would like to see more training
material and more X11 applications especially for remote access.
But i was never involved in the xorg organisation. So i see myself more
as an apprentice. We will see if i can help.
Thanks,
Harry Wentland,
on b
On 2021-03-19 10:22 a.m., Alex Deucher wrote:
On Fri, Mar 19, 2021 at 3:23 AM Evan Benn wrote:
AMDGPU_DM_DEFAULT_MIN_BACKLIGHT was set to the value of 12
to ensure no display backlight will flicker at low user brightness
settings. However this value is quite bright, so for devices that do n
’
[-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/../display/dc/dce80/dce80_resource.c:913:16:
warning: no previous prototype for ‘dce80_validate_global’
[-Wmissing-prototypes]
Cc: Harry Wentland
Cc: Leo Li
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: A
/../display/dc/calcs/dce_calcs.c:2016:1: warning:
the frame size of 1216 bytes is larger than 1024 bytes [-Wframe-larger-than=]
Cc: Harry Wentland
Cc: Leo Li
Cc: Alex Deucher
Cc: "Christian König"
Cc: David Airlie
Cc: Daniel Vetter
Cc: Colin Ian King
Cc: amd-...@lists.freedesktop.org
Cc:
rn it into
an helper that can be shared across those drivers.
Signed-off-by: Maxime Ripard
Patches 1 & 2 are
Reviewed-by: Harry Wentland
Harry
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 21 +-
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 17 +--
driver
: Harry Wentland
Harry
Alex
---
From c9398160caf4ff20e63b8ba3a4366d6ef95c4ac3 Mon Sep 17 00:00:00 2001
From: Werner Sembach
Date: Wed, 17 Mar 2021 12:52:22 +0100
Subject: [PATCH] Retry forcing YCbCr420 color on failed encoder validation
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
On 2021-03-29 3:54 a.m., Louis Li wrote:
[Why]
This issue is found when scaling is not equal to one from src to dest.
When issue happens, there are offsets in both axis x and y between
two cursors. Users cannot control APP under such a condition.
What's the use case? I don't think we support t
On 2021-01-20 4:26 a.m., Colin King wrote:
From: Colin Ian King
Reviewed-by: Harry Wentland
Harry
There are two spelling mistakes of the function name, fix this
by using __func__ instead of a hard coded name string.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/display/dc
: WARNING: Assignment of 0/1 to bool variable.
Reported-by: Abaci Robot
Signed-off-by: Jiapeng Zhong
Reviewed-by: Harry Wentland
Harry
---
.../display/dc/dml/dcn30/display_rq_dlg_calc_30.c | 32 +++---
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu
27;dm' [-Werror,-Wunused-variable]
Add another such #ifdef.
Fixes: 98ab5f3513f9 ("drm/amd/display: Fix deadlock during gpu reset v3")
Signed-off-by: Arnd Bergmann
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
1 file changed,
Sun 4th April anywhere on earth
** Election Committee **
* Eric Anholt
* Mark Filion
* Keith Packard
* Harry Wentland
Thanks,
Harry Wentland,
on behalf of the X.Org elections committee
___
dri-devel mailing list
dri-devel@lists.freedes
Filion, Keith Packard, and Harry Wentland. They will
continue to serve until their term ends in 2022. Current directors whose
term expires in 2021 are Samuel Iglesias Gonsálvez, Manasi D Navare,
Lyude Paul, and Daniel Vetter.
A director is expected to participate in the fortnightly IRC meeting
Eric Anholt
* Mark Filion
* Keith Packard
* Harry Wentland
Cheers,
Harry Wentland,
on behalf of the X.Org elections committee
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
elieve setting it to zero is a correct default.
Addresses-Coverity: ("Uninitialized scalar variable")
Fixes: bd0c064c161c ("drm/amd/display: Add return code instead of boolean for future
use")
Signed-off-by: Colin Ian King
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu
Election Planned End: Sun 4th April anywhere on earth
** Election Committee **
* Eric Anholt
* Mark Filion
* Keith Packard
* Harry Wentland
Thanks,
Harry Wentland,
on behalf of the X.Org elections committee
___
dri-devel mailing list
date QA: Mon 15th March
Deadline of X.Org membership application or renewal: Thu 18th March
Election Planned Start: Mon 22nd March anywhere on earth
Election Planned End: Sun 4th April anywhere on earth
** Election Committee **
* Eric Anholt
* Mark Filion
* Keith Packard
* Harry Wentland
Th
On 2021-04-30 6:39 a.m., Shashank Sharma wrote:
> Hello Pekka,
>
> On 30/04/21 15:13, Pekka Paalanen wrote:
>> On Wed, 28 Apr 2021 13:24:27 +0530
>> Shashank Sharma wrote:
>>
>>> Assuming these details, A compositor will look for DRM color properties
>>> like these:
>>>
>>> 1. Degamma plane p
On 2021-04-30 8:53 p.m., Sebastian Wick wrote:
> On 2021-04-26 20:56, Harry Wentland wrote:
>> On 2021-04-26 2:07 p.m., Ville Syrjälä wrote:
>>> On Mon, Apr 26, 2021 at 01:38:50PM -0400, Harry Wentland wrote:
>>>> From: Bhawanpreet Lakha
>>>>
>>
On 2021-04-27 10:50 a.m., Pekka Paalanen wrote:
> On Mon, 26 Apr 2021 13:38:49 -0400
> Harry Wentland wrote:
>
>> ## Introduction
>>
>> We are looking to enable HDR support for a couple of single-plane and
>> multi-plane scenarios. To do this effectively
on on crtc
Bhawanpreet Lakha (3):
drm/color: Add transfer functions for HDR/SDR on drm_plane
drm/color: Add sdr boost property
drm/color: Add color space plane property
Harry Wentland (3):
drm/doc: Color Management and HDR10 RFC
drm/color: Add output transfer function to crtc
drm/amd/display
nance definition
* define input/output transfer functions for luminance space transforms,
rather than defining the luminance space of an input directly
Signed-off-by: Harry Wentland
---
Documentation/gpu/rfc/hdr-wide-gamut.rst | 416 +++
Documentation/gpu/rfc/index.rst
imum white level for the SDR plane.
v2:
- fix type in description
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_atomic_uapi.c | 4
drivers/gpu/drm/drm_color_mgmt.c | 17 +
include/drm/drm_color_mgmt.h | 6 ++
i
ucing named transfer functions. The original
LUT behavior is preserved with the default "1D LUT" transfer function.
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +++-
.../gpu/drm/arm/display/komeda/komeda_crtc.c | 7 ++-
drivers/gpu/drm/ar
Show the CSC matrixes in a 4x3 format.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 28 +
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h
b/drivers/gpu/drm/amd/display/dc/inc/hw
quot; from transfer function name (Harry)
- add DRM_TF_UNDEFINED enum as legacy default (Harry)
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +-
.../gpu/drm/arm/display/komeda/komeda_plane.c | 4 +-
drivers/g
From: Bhawanpreet Lakha
Add color space definitions for BT601, BT709, BT2020, and DCI-P3.
Default to BT709, the sRGB color space.
Signed-off-by: Bhawanpreet Lakha
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 +
.../gpu/drm/arm/display/komeda
On 2021-05-18 3:56 a.m., Pekka Paalanen wrote:
> On Mon, 17 May 2021 15:39:03 -0400
> Vitaly Prosyak wrote:
>
>> On 2021-05-17 12:48 p.m., Sebastian Wick wrote:
>>> On 2021-05-17 10:57, Pekka Paalanen wrote:
>>>> On Fri, 14 May 2021 17:05:11 -0400
>>
On 2021-05-17 4:34 a.m., Pekka Paalanen wrote:
> On Fri, 14 May 2021 17:04:51 -0400
> Harry Wentland wrote:
>
>> On 2021-04-30 8:53 p.m., Sebastian Wick wrote:
>>> On 2021-04-26 20:56, Harry Wentland wrote:
>
> ...
>
>>>> Another reason I'm
/../display/dc/dml/dcn31/display_mode_vba_31.c:3957:6:
> warning: stack frame size of 2568 bytes in function
> 'dml31_ModeSupportAndSystemConfigurationFull' [-Wframe-larger-than=]
>
> Signed-off-by: Reka Norman
Reviewed-by: Harry Wentland
Harry
> ---
>
> driv
On 2021-07-12 4:03 a.m., Pekka Paalanen wrote:
> On Fri, 9 Jul 2021 18:23:26 +0200
> Raphael Gallais-Pou wrote:
>
>> On 7/9/21 10:04 AM, Pekka Paalanen wrote:
>>> On Wed, 7 Jul 2021 08:48:47 +
>>> Raphael GALLAIS-POU - foss wrote:
>>>
Some display controllers can be programmed to p
On 2021-07-13 3:52 a.m., Pekka Paalanen wrote:
> On Mon, 12 Jul 2021 12:15:59 -0400
> Harry Wentland wrote:
>
>> On 2021-07-12 4:03 a.m., Pekka Paalanen wrote:
>>> On Fri, 9 Jul 2021 18:23:26 +0200
>>> Raphael Gallais-Pou wrote:
>>>
>
On 2021-07-14 3:35 a.m., Pekka Paalanen wrote:
> On Tue, 13 Jul 2021 09:54:35 -0400
> Harry Wentland wrote:
>
>> On 2021-07-13 3:52 a.m., Pekka Paalanen wrote:
>>> On Mon, 12 Jul 2021 12:15:59 -0400
>>> Harry Wentland wrote:
>>>
>>
On 2021-07-15 5:34 a.m., Pekka Paalanen wrote:
> On Wed, 14 Jul 2021 12:13:58 -0400
> Harry Wentland wrote:
>
>> On 2021-07-14 3:35 a.m., Pekka Paalanen wrote:
>>> On Tue, 13 Jul 2021 09:54:35 -0400
>>> Harry Wentland wrote:
>>>
>>
z MBP Retina eDP panel with DCE-11.2. These are the
> highest resolution/framerate monitors I have atm.I don't have access
> to any 4k monitors, so maybe the problem is somehow specific to such
> high resolutions? Maybe somewhere else in the code something would
> need to be adapted? La
CRTCs have been converted, let's move forward with the
connectors to provide a consistent interface.
The conversion was done using the coccinelle script below, and built tested
on all the drivers.
Did you forget the coccinelle script?
Cc: Harry Wentland
Cc: Leo Li
Cc: Alex Deuche
On 2020-11-10 3:03 a.m., Bernard Zhao wrote:
In function amdgpu_dm_connector_get_modes, drm_edid_is_valid
will check weather (!edid), no need to check again in the if
branch.
Signed-off-by: Bernard Zhao
Reviewed-by: Harry Wentland
Harry
---
drivers/gpu/drm/amd/display/amdgpu_dm
On 2022-03-08 17:02, Hans de Goede wrote:
> Hi,
>
> On 3/8/22 21:56, Sean Paul wrote:
>> From: Sean Paul
>>
>> This patch adds the necessary hooks to make amdgpu aware of privacy
>> screens. On devices with privacy screen drivers (such as thinkpad-acpi),
>> the amdgpu driver will defer probe u
On 2022-03-25 00:05, Ryan Lin wrote:
> Disable ABM feature when the system is running on AC mode to get
> the more perfect contrast of the display.
It says patch 3 out of 25. Are there other patches? If so, I can't
find them in my mailbox and neither can patchwork
https://patchwork.freedesktop.
ul
With the subject line fixed as per Christian's comment this is
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 5 +++--
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
> 2 files changed, 7 insertions(+), 6 deletion
On 2022-03-28 12:54, Melissa Wen wrote:
> On 03/28, Simon Ser wrote:
>> Thanks a lot for you patch! I've noticed as well that amdgpu ignores
>> the plane alpha property [1]. I'll try to find time to test it.
> Hi Simon,
>
> So you've faced this kind of issue many times :/
> Let me know the resu
D_PARAM
> indicating this port can't do aux DPCD read.
>
> It's expected result. Not an error.
>
> [How]
> Use drm_dbg_kms() to replace drm_err() when receive NAK.
>
> Signed-off-by: Wayne Lin
Reviewed-by: Harry Wentland
Harry
> ---
> drivers
On 2022-03-24 19:10, Ryan Lin wrote:
> Disable ABM feature when the system is running on AC mode to get
> the more perfect contrast of the display.
>
> Signed-off-by: Ryan Lin
>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 4 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c|
On 2022-03-29 10:33, Harry Wentland wrote:
>
>
> On 2022-03-24 19:10, Ryan Lin wrote:
>> Disable ABM feature when the system is running on AC mode to get
>> the more perfect contrast of the display.
>>
>> Signed-off-by: Ryan Lin
>>
>> ---
if (per_pixel_alpha && pipe_ctx->plane_state->global_alpha) {
>> + blnd_cfg.alpha_mode =
>> MPCC_ALPHA_BLEND_MODE_PER_PIXEL_ALPHA_COMBINED_GLOBAL_GAIN;
>> + blnd_cfg.global_gain = pipe_ctx->plane_state->global_alpha_value;
>> + } else
On 2022-02-18 07:12, Simon Ser wrote:
> On Friday, February 18th, 2022 at 12:54, Hans de Goede
> wrote:
>
>> On 2/18/22 12:39, Simon Ser wrote:
>>> On Friday, February 18th, 2022 at 11:38, Hans de Goede
>>> wrote:
>>>
What I'm reading in the above is that it is being considered to allow
>
On 2022-02-18 05:03, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> These on stack copies of the modes appear to be pointless.
> Just look at the originals directly.
>
> Cc: Harry Wentland
> Cc: Leo Li
> Cc: Rodrigo Siqueira
> Cc: Alex Deucher
> Cc: amd-
when != S
> + drm_mode_init(&M, &E);
> +
> S1
>
> @@
> expression decl.E;
> @@
> - &*E
> + E
>
> Cc: Harry Wentland
> Cc: Leo Li
> Cc: Rodrigo Siqueira
> Cc: Alex Deucher
> Cc: amd-...@lists.freedesktop.org
> Signed-off-by: Ville Syrjälä
Re
> - memcpy(mode, E, S)
> + drm_mode_copy(mode, E)
> )
>
> @depends on !is_mode_copy@
> struct drm_display_mode mode;
> expression E;
> @@
> (
> - mode = E
> + drm_mode_copy(&mode, &E)
> |
> - memcpy(&mode, E, S)
> + drm_mode_copy(&
gned-off-by: Ville Syrjälä
Reviewed-by: Harry Wentland
Harry
> ---
> drivers/gpu/drm/drm_modes.c | 17 +
> include/drm/drm_modes.h | 2 ++
> 2 files changed, 19 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
>
Series is
Reviewed-by: Harry Wentland
Harry
On 2022-02-24 14:15, Magali Lemes wrote:
> This patchset addresses a few warnings reported by the Kernel Test Robot and
> sparse.
>
> Magali Lemes (4):
> drm/amd/display: Adjust functions documentation
> drm/amd/display: Add
gt; by removing the over-specified array size from the argument declarations.
>
> This helps with the ongoing efforts to globally enable
> -Wstringop-overflow.
>
> Link: https://github.com/KSPP/linux/issues/181>> Signed-off-by: Gustavo A. R.
> Silva
Acked-by: Harry Wentl
On 2021-09-13 3:26 p.m., Sean Paul wrote:
> On Mon, Sep 13, 2021 at 2:05 PM Alex Deucher wrote:
>>
>> On Mon, Sep 13, 2021 at 1:57 PM Sean Paul wrote:
>>>
>>> From: Sean Paul
>>>
>>> Hello,
>>> This patchset pulls the HDCP protocol auth/exchange/check logic out from
>>> i915 into a HDCP helpe
On 2021-09-07 10:03, Simon Ser wrote:
> Hi all,
>
> Recently I've been discussing with various people [1] [2] about amdgpu's
> handling of KMS planes. AMD hardware is a bit special when it comes to
> the cursor plane, and it's not always 100% clear how that maps with the
> KMS API.
>
> Up until n
;
> Etc..
>
Fixed by https://patchwork.freedesktop.org/patch/456190/?series=95166&rev=2 but
looks like it's not in drm-misc-next.
Siqueira, do you have bandwidth to pull that patch into drm-misc-next?
Harry
> Regards,
>
> Tvrtko
>
>
> On 30/09/2021 22:21,
parating the functional bits from the straight
refactor will help with bisection if this leads to a regression.
All changes look reasonable to me, though. With this patch split
into three patches in the sequence (b), (c), then (a) this is
Reviewed-by: Harry Wentland
Harry
> Signed-off-by: Cl
On 2021-10-15 12:33, Simon Ser wrote:
> When updating a single connector, use
> drm_kms_helper_connector_hotplug_event instead of
> drm_kms_helper_hotplug_event.
>
> Signed-off-by: Simon Ser
Reviewed-by: Harry Wentland
Patches 1-3 are also
Acked-by: Harry Wentland
Harry
&
r quality from source to panel taking
>>> advantage of advanced color features in hardware.
>>>
>>> These patches add the property interfaces and enable helper functions.
>>> This series adds Intel's XE_LPD hw specific plane gamma feature. We
>>>
Thanks, Uma, for the updated patches. I'm finally finding
time to go through them.
On 2021-10-15 03:42, Pekka Paalanen wrote:
> On Thu, 14 Oct 2021 19:44:25 +
> "Shankar, Uma" wrote:
>
>>> -Original Message-
>>> From: Pekka Paalanen
>>> Sent: Wednesday, October 13, 2021 2:01 PM
>>>
On 2021-10-14 15:44, Shankar, Uma wrote:
>
>
>> -Original Message-
>> From: Pekka Paalanen
>> Sent: Wednesday, October 13, 2021 2:01 PM
>> To: Shankar, Uma
>> Cc: harry.wentl...@amd.com; ville.syrj...@linux.intel.com; intel-
>> g...@lists.freedesktop.org; dri-devel@lists.freedesktop
On 2021-10-12 16:58, Shankar, Uma wrote:
>
>
>> -Original Message-
>> From: Pekka Paalanen
>> Sent: Tuesday, October 12, 2021 4:01 PM
>> To: Shankar, Uma
>> Cc: intel-...@lists.freedesktop.org; dri-devel@lists.freedesktop.org;
>> harry.wentl...@amd.com; ville.syrj...@linux.intel.com
On 2021-10-27 04:00, Pekka Paalanen wrote:
> On Tue, 26 Oct 2021 11:36:33 -0400
> Harry Wentland wrote:
>
>> On 2021-10-14 15:44, Shankar, Uma wrote:
>>>
>
...
>> FWIW, AMD HW (depending on generation) can do these operations
>> (in this order):
>
On 2021-10-27 10:39, Guenter Roeck wrote:
> On Wed, Oct 13, 2021 at 04:04:13PM -0400, Thelford Williams wrote:
>> Size can be any value and is user controlled resulting in overwriting the
>> 40 byte array wr_buf with an arbitrary length of data from buf.
>>
>> Signed-off-by: Thelford Williams
>> S
On 2021-09-15 10:01, Pekka Paalanen wrote:> On Fri, 30 Jul 2021 16:41:29 -0400
> Harry Wentland wrote:
>
>> Use the new DRM RFC doc section to capture the RFC previously only
>> described in the cover letter at
>> https://patchwork.freedesktop.org/series/89506/
>
On 2021-09-15 10:36, Pekka Paalanen wrote:
> On Mon, 16 Aug 2021 15:37:23 +0200
> sebast...@sebastianwick.net wrote:
>
>> On 2021-08-16 14:40, Harry Wentland wrote:
>>> On 2021-08-16 7:10 a.m., Brian Starkey wrote:
>>>> On Fri, Aug 13, 2021 at 10:4
On 2021-09-21 09:31, Pekka Paalanen wrote:
> On Mon, 20 Sep 2021 20:14:50 -0400
> Harry Wentland wrote:
>
>> On 2021-09-15 10:01, Pekka Paalanen wrote:> On Fri, 30 Jul 2021 16:41:29
>> -0400
>>> Harry Wentland wrote:
>>>
>>>> Use the
On 2021-09-20 20:14, Harry Wentland wrote:
> On 2021-09-15 10:01, Pekka Paalanen wrote:> On Fri, 30 Jul 2021 16:41:29 -0400
>> Harry Wentland wrote:
>>
>>> +If a display's maximum HDR white level is correctly reported it is trivial
>>> +to convert be
On 2021-09-22 04:31, Pekka Paalanen wrote:
> On Tue, 21 Sep 2021 14:05:05 -0400
> Harry Wentland wrote:
>
>> On 2021-09-21 09:31, Pekka Paalanen wrote:
>>> On Mon, 20 Sep 2021 20:14:50 -0400
>>> Harry Wentland wrote:
>>>
...
>
>>
ollow-up
header updates for any addition DP 2.0 definitions required
by our driver.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 53 ++--
1 file changed, 48 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dp_types.h
b/
On 2021-09-23 04:01, Pekka Paalanen wrote:
> On Wed, 22 Sep 2021 11:06:53 -0400
> Harry Wentland wrote:
>
>> On 2021-09-20 20:14, Harry Wentland wrote:
>>> On 2021-09-15 10:01, Pekka Paalanen wrote:> On Fri, 30 Jul 2021 16:41:29
>>>
On 2021-09-27 15:23, Fangzhi Zuo wrote:
> Include FEC, DSC, Link Training related headers.
>
> Change since v2
> - Align with the spec for DP_DSC_SUPPORT_AND_DSC_DECODER_COUNT
>
> Signed-off-by: Fangzhi Zuo
Reviewed-by: Harry Wentland
Harry
> ---
> This patch is b
our driver and provide follow-up
header updates for any addition DP 2.0 definitions required
by our driver.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 54 ++--
1 file changed, 49 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
ollow-up
header updates for any addition DP 2.0 definitions required
by our driver.
We also ensure drm_dp_helper.h is included before dc_dp_types.h.
v3: Ensure drm_dp_helper.h is included before dc_dp_types.h
v2: Add one missing endif
Signed-off-by: Harry Wentland
Reviewed-by: Fangzhi Zuo
---
> already defined
>
> [AMD Official Use Only]
>
>> -Original Message-
>> From: Harry Wentland
>> Sent: September 28, 2021 1:08 PM
>> To: Deucher, Alexander ; amd-
>> g...@lists.freedesktop.org; Zuo, Jerry
>> Cc: jani.nik...@intel.com; L
On 2021-10-01 15:56, Sean Paul wrote:
> On Wed, Sep 29, 2021 at 03:39:26PM -0400, Mark Yacoub wrote:
>> From: Mark Yacoub
>>
>> [Why]
>> drm_atomic_helper_check_crtc now verifies both legacy and non-legacy LUT
>> sizes. There is no need to check it within amdgpu_dm_atomic_check.
>>
>> [How]
>>
On 2021-10-05 11:25, Zuo, Jerry wrote:
> [AMD Official Use Only]
>
>> -Original Message-
>> From: Doug Anderson
>> Sent: October 5, 2021 11:14 AM
>> To: Zuo, Jerry
>> Cc: Ville Syrjälä ; dri-
>> de...@lists.freedesktop.org; ge...@linux-m68k.org; oliver.s...@intel.com;
>> Daniel Vetter
rt modifiers but infer the actual layout of the
> underlying buffer. Therefore, a new flag fb_modifiers_not_supported is
> introduced for these legacy drivers, and allow_fb_modifiers is replaced
> with this new flag.
>
> Signed-off-by: Tomohito Esaki
Acked-by: Harry Wentland
Harr
On 2022-01-21 06:26, Yongzhi Liu wrote:
> [why]
> Resource release is needed on the error handling path
> to prevent memory leak.
>
> [how]
> Fix this by adding kfree on the error handling path.
>
> Signed-off-by: Yongzhi Liu
Reviewed-by: Harry Wentland
Harry
>
for intersect_frl_link_bw_support() instead
>
> Fixes: c022375ae095 ("drm/amd/display: Add DP-HDMI FRL PCON Support in DC")
> Signed-off-by: Randy Dunlap
> Reported-by: kernel test robot
> Cc: Fangzhi Zuo
> Cc: Alex Deucher
> Cc: Nicholas Kazlauskas
> Cc: Harr
On 2022-01-26 04:39, Lucas De Marchi wrote:
> Remove the local yesno() implementation and adopt the str_yes_no() from
> linux/string_helpers.h.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Harry Wentland
Harry
> ---
> .../drm/amd/display/amdgpu_dm/amdgpu_
On 2022-01-28 12:35, Colin Ian King wrote:
> There are quite a few spelling mistakes in various function names
> and error messages. Fix these.
>
> Signed-off-by: Colin Ian King
Reviewed-by: Harry Wentland
Harry
> ---
> .../amd/display/amdgpu_dm/amdgpu
On 2022-01-28 20:04, Yang Li wrote:
> Eliminate the follow smatch warning:
> drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c:2246
> dp_perform_8b_10b_link_training() warn: inconsistent indenting
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
Reviewed-by: Harr
On 2021-10-29 09:43, Sean Paul wrote:
> On Thu, Oct 28, 2021 at 11:03:54PM -0400, Mark Yacoub wrote:
>> On Thu, Oct 28, 2021 at 8:42 PM Sean Paul wrote:
>>>
>>> On Tue, Oct 26, 2021 at 03:21:00PM -0400, Mark Yacoub wrote:
From: Mark Yacoub
[Why]
This function and enum do no
On 2021-09-06 17:38, Uma Shankar wrote:
> Existing LUT precision structure is having only 16 bit
> precision. This is not enough for upcoming enhanced hardwares
> and advance usecases like HDR processing. Hence added a new
> structure with 32 bit precision values.
>
> This also defines a new st
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