+danvet
Hi,
On Tue, 10 Aug 2021 at 23:58, Yunfei Dong wrote:
>
> This series adds support for multi hardware decode into mtk-vcodec, by first
> adding component framework to manage each hardware information: interrupt,
> clock, register bases and power. Secondly add core thread to deal with core
On Thu, 19 Aug 2021 at 04:13, yunfei.d...@mediatek.com
wrote:
>
> Hi Ezequiel,
>
> Thanks for your suggestion.
>
> On Wed, 2021-08-18 at 11:11 -0300, Ezequiel Garcia wrote:
> > +danvet
> >
> > Hi,
> >
> > On Tue, 10 Aug 2021 at 23:58, Yunfei Dong
On Fri, 20 Aug 2021 at 04:59, yunfei.d...@mediatek.com
wrote:
>
> Hi Ezequiel,
>
> Thanks for your detail feedback.
>
> On Thu, 2021-08-19 at 11:10 -0300, Ezequiel Garcia wrote:
> > On Thu, 19 Aug 2021 at 04:13, yunfei.d...@mediatek.com
> > wrote:
> > >
&g
On Sun, 22 Aug 2021 at 13:50, Daniel Vetter wrote:
>
> On Wed, Aug 18, 2021 at 4:12 PM Ezequiel Garcia
> wrote:
> >
> > +danvet
> >
> > Hi,
> >
> > On Tue, 10 Aug 2021 at 23:58, Yunfei Dong wrote:
> > >
> > > This series adds sup
-rM=8...@mail.gmail.com/
> Cc: Ezequiel Garcia
> Cc: Greg Kroah-Hartman
> Cc: "Rafael J. Wysocki"
> Signed-off-by: Daniel Vetter
> ---
> MAINTAINERS | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index ac58d0032a
Hi Chris,
I'm hijacking this discussion a bit.
I recently tried to boot maline on my Odroid GOA, which I managed to do,
except the display wasn't displaying anything :-)
Everything looks good on a quick look, the Inno PHY driver is here,
and there's a DRM card registered with the right mode 320x
(Now with Heiko's address fixed)
On Sat, 13 Feb 2021 at 10:53, Ezequiel Garcia
wrote:
>
> Hi Chris,
>
> I'm hijacking this discussion a bit.
>
> I recently tried to boot maline on my Odroid GOA, which I managed to do,
> except the display wasn't displaying an
On Fri, 19 Feb 2021 at 00:14, Chris Morgan wrote:
>
> This fixes an issue with the panel not working after
> commit c6d94e37bdbb ("drm/bridge/synopsys: dsi: add support for
> non-continuous HS clock").
> With this change the panel inits successfully and displays an image.
>
> Signed-off-by: Chris
("drm/bridge/synopsys: dsi: add support for
non-continuous HS clock")
Cc: sta...@vger.kernel.org # 5.10+
With this fix, my Odroid Go2 has display.
Tested-by: Ezequiel Garcia
Thanks,
Ezequiel
> Signed-off-by: Heiko Stuebner
> ---
> drivers/gpu/drm/panel/panel-elida-kd35t133.c | 3 +
Hi Neil,
On Mon, 26 Apr 2021 at 06:59, Neil Armstrong wrote:
>
> Hi,
>
> On 21/04/2021 07:28, Nicolas Boichat wrote:
> > Hi!
> >
> > This is just a rebase of the v11, untested (but it seems like
> > Neil Armstrong recently tested it), with small changes in
> > binding and dts. v11 cover follows:
Hi Alex,
On Sat, 2021-06-26 at 10:33 +0200, Alex Bee wrote:
> Hi Ezequiel,
>
> Am 26.06.21 um 02:46 schrieb Ezequiel Garcia:
> > (Adding Nicolas)
> >
> > Hi Alex,
> >
> > On Fri, 2021-06-25 at 01:13 +0200, Alex Bee wrote:
> > > Hi Ezequiel,
&g
On Wed, 1 Sept 2021 at 05:32, Yunfei Dong wrote:
>
> This series adds support for multi hardware decode into mtk-vcodec, by first
> adding component framework to manage each hardware information: interrupt,
> clock, register bases and power. Secondly add core thread to deal with core
> hardware me
Hi Yunfei,
On Mon, Oct 11, 2021 at 03:02:43PM +0800, Yunfei Dong wrote:
> Core thread:
> 1. Gets lat_buf from core msg queue.
> 2. Proceeds core decode.
> 3. Puts the lat_buf back to lat msg queue.
>
> Both H264 and VP9 rely on the core thread.
>
Avoid the kthread API and instead go with the wo
Hi Yunfei,
On Tue, 12 Oct 2021 at 22:17, yunfei.d...@mediatek.com
wrote:
>
> Hi Ezequiel,
>
> Thanks for your feedback,
>
> The driver can work well now according to your advice with
> of_platform_populate interface.
>
> In order to separate parent node with children node, parent node is
> master
On Sun, 26 Sept 2021 at 05:27, yunfei.d...@mediatek.com
wrote:
>
> Hi Ezequiel,
>
> Could you please help to give some feedback when you are free for iommu
> limitation?
>
How about you work on the architecture I originally suggested?
As the saying goes, talk is cheap, show us the code.
So let's
Yunfei,
On Thu, 11 Nov 2021 at 01:15, Yunfei Dong wrote:
>
> Adds decoder dt-bindings for mt8192.
>
> Signed-off-by: Yunfei Dong
> ---
> .../media/mediatek,vcodec-subdev-decoder.yaml | 261 ++
> 1 file changed, 261 insertions(+)
> create mode 100644
> Documentation/devicetree/
Hi Yunfei,
On Thu, 11 Nov 2021 at 01:15, Yunfei Dong wrote:
>
> This series adds support for multi hardware decode into mtk-vcodec, by first
> adding use
> of_platform_populate to manage each hardware information: interrupt, clock,
> register
> bases and power. Secondly add core work queue to d
Hi Yunfei,
On Tue, 16 Nov 2021 at 08:42, yunfei.d...@mediatek.com
wrote:
>
> Hi Ezequiel,
>
> Thanks for you suggestion.
> On Sun, 2021-11-14 at 19:04 -0300, Ezequiel Garcia wrote:
> > Hi Yunfei,
> >
> > On Thu, 11 Nov 2021 at 01:15, Yunfei Dong
> > wrot
pport.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/panfrost/Makefile | 3 ++-
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 13 ++---
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 19 +--
3 files changed, 21 insertions(+), 14 deletions(-)
diff --git a/dr
On Tue, 2019-05-14 at 08:38 -0500, Rob Herring wrote:
> On Mon, May 13, 2019 at 12:56 PM Ezequiel Garcia
> wrote:
> > Currently, there is some logic to make devfreq optional,
> > but it fails to cover some cases such as !CONFIG_PM_DEVFREQ.
>
> Fails how? compiling? runti
Currently, there is some logic for the driver to work without devfreq.
However, the driver actually fails to probe if !CONFIG_PM_DEVFREQ.
Fix this by selecting devfreq, and drop the additional checks
for devfreq.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/panfrost/Kconfig
On Mon, 2019-03-11 at 12:45 +0100, Paul Cercueil wrote:
> Hi Ezequiel,
>
> On Mon, Mar 11, 2019 at 1:02 AM, Ezequiel Garcia
> wrote:
> > On Thu, 2019-02-28 at 19:07 -0300, Paul Cercueil wrote:
> > > Hi,
> > >
> > > This is a first attemp
On Wed, 17 Apr 2019 at 10:48, Rob Herring wrote:
>
> On Sun, Apr 14, 2019 at 3:08 PM Paul Cercueil wrote:
> >
> > Add macros that can be used with the ingenic,lcd-mode property in the
> > devicetree node that corresponds to the ingenic-drm driver.
>
> DRM is a Linuxism.
>
> >
> > Signed-off-by: P
On Tue, 2018-10-30 at 10:15 +0100, Heiko Stuebner wrote:
> From: Nickey Yang
>
> Support Kingdisplay kd097d04 9.7" 1536x2048 TFT LCD panel,
> it is a MIPI dual-DSI panel.
>
> v4-resend:
> - Thierry noted missing dt-bindings for v4 but forgot that he
> already had applied them one kernel releas
vop_win->yuv2yuv_data = &vop_data->win_yuv2yuv[i];
> }
> }
>
Ugh, another one of these.
Reviewed-by: Ezequiel Garcia
Thanks,
Eze
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Mon, 28 Jan 2019 at 12:59, Thierry Reding wrote:
>
> On Thu, Jan 24, 2019 at 12:51:36PM -0500, Sean Paul wrote:
> > On Thu, Jan 24, 2019 at 05:18:12PM +0100, Thierry Reding wrote:
> > > On Thu, Jan 24, 2019 at 12:01:55PM -0300, Ezequiel Garcia wrote:
> > > >
more verbose
history is useful.
The patch looks good:
Reviewed-by: Ezequiel Garcia
> Signed-off-by: Gerd Hoffmann
> ---
> drivers/gpu/drm/virtio/virtgpu_drv.h | 14 ---
> drivers/gpu/drm/virtio/virtgpu_display.c | 1 -
> drivers/gpu/drm/virtio/virtgpu_drv.c | 9 +-
;state->src_x >> 16,
> + plane->state->src_y >> 16,
> + plane->state->src_w >> 16,
> + plane->state->src_h >> 16);
> }
>
> static int virtio_gp
fb->fence)
> - virtio_gpu_fence_cleanup(vgfb->fence);
> + if (vgfb->fence) {
> + dma_fence_put(&vgfb->fence->f);
> + vgfb->fence = NULL;
> + }
> }
>
> static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
Reviewed-by: Ezequiel Garcia
Regards,
Ezequiel
___
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
On Wed, 2018-12-19 at 13:27 +0100, Gerd Hoffmann wrote:
> Create virtio_gpu_object_params, use that to pass object parameters to
> virtio_gpu_object_create. Also drop unused "kernel" parameter (unused,
> always false).
>
> Signed-off-by: Gerd Hoffmann
> ---
> drivers/gpu/drm/virtio/virtgpu_drv.
As per the VirtIO spec, the virtqueues must be reset during cleanup
(see "3.3.1 Driver Requirements: Device Cleanup").
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/virtio/virtgpu_kms.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/virtio/virtgpu_kms.c
b/d
The virtio_gpu_output is a member of struct virtio_gpu_device
and is not a dynamically-allocated chunk, so it's wrong to kfree() it.
Removing it fixes a memory corruption BUG() that can be triggered
when the virtio-gpu driver is removed.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/v
Move the code around so the driver is probed the bus
.probe and removed from the bus .remove callbacks.
This commit is just a cleanup and shouldn't affect
functionality.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/virtio/Makefile | 2 +-
drivers/gpu/drm/v
On Fri, 2018-12-14 at 13:29 -0300, Ezequiel Garcia wrote:
> From: Daniele Castagna
>
> Currently, YUV hardware overlays are converted to RGB using
> a color space conversion different than BT.601.
>
> The result is that colors of e.g. NV12 buffers don't match
> color
Hi Liviu,
On Mon, 2018-12-03 at 11:31 +, Ayan Halder wrote:
> From: Brian Starkey
>
> AFBC is a flexible, proprietary, lossless compression protocol and
> format, with a number of defined DRM format modifiers. To facilitate
> consistency and compatibility between different AFBC producers and
Hey Gustavo,
On Thu, 3 Jan 2019 at 17:25, Gustavo A. R. Silva wrote:
>
> Fix boolean expressions by using logical AND operator '&&'
> instead of bitwise operator '&'.
>
> This issue was detected with the help of Coccinelle.
>
> Fixes: 9a4b7d4c769e ("drm/amdgpu: Add vm context module param")
> Cc:
On Mon, 2019-01-07 at 14:26 +0100, Heiko Stuebner wrote:
> Hi,
>
> sorry, only now got to test this on actual hardware,
>
> Am Freitag, 14. Dezember 2018, 17:29:20 CET schrieb Ezequiel Garcia:
> > From: Daniele Castagna
> >
> > Currently, YUV hardware overlays
On Tue, 2019-01-08 at 11:43 +0100, Gerd Hoffmann wrote:
> On Thu, Jan 03, 2019 at 01:16:00PM -0300, Ezequiel Garcia wrote:
> > Move the code around so the driver is probed the bus
> > .probe and removed from the bus .remove callbacks.
> > This commit is just a cleanup
Move the code around so the driver is probed the bus
.probe and removed from the bus .remove callbacks.
This commit is just a cleanup and shouldn't affect
functionality.
Signed-off-by: Ezequiel Garcia
---
v2: rebased on drm-misc-next
drivers/gpu/drm/virtio/Makefile | 2 +-
dr
On Mon, 2019-01-07 at 17:07 -0300, Ezequiel Garcia wrote:
> On Mon, 2019-01-07 at 14:26 +0100, Heiko Stuebner wrote:
> > Hi,
> >
> > sorry, only now got to test this on actual hardware,
> >
> > Am Freitag, 14. Dezember 2018, 17:29:20 CET schrieb Ezequiel Gar
oards connected to HDMI monitor):
$ modetest 39@32:1920x1080@NV12
$ gst-launch-1.0 videotestrc ! video/x-raw,format=NV12 ! kmssink
Signed-off-by: Daniele Castagna
[ezequiel: rebase on linux-next and massage commit log]
Signed-off-by: Ezequiel Garcia
---
v3: Add a check for non-null win_yuv2y
@33:1920x1080@XR24 -w 30:rotation:33
XY mirror:
modetest -s 43@33:1920x1080@XR24 -w 30:rotation:49
Signed-off-by: Daniele Castagna
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 33 +
drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 2
This commit splits the registers for RK3288 from those
for RK3328, RK3368 and RK3399. It seems RK3288 does not
support plane x-y-mirroring, and so in order to support this
for the other SoCs, we need to have separate set of registers
for win0 and win1.
Signed-off-by: Ezequiel Garcia
---
drivers
lting code shouldn't change.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 7
n originally by Daniele. I just cleaned
up the implementation a it, and ported the code to upstream.
This series is based on drm-misc-next plus
https://patchwork.kernel.org/patch/10752893/.
Daniele Castagna (1):
drm/rockchip: Add reflection properties
Ezequiel Garcia (2):
drm/rockchip: Fix typ
On Thu, 2019-02-28 at 19:07 -0300, Paul Cercueil wrote:
> Hi,
>
> This is a first attempt at a KMS driver for the JZ47xx MIPS SoCs by
> Ingenic. It is aimed to replace the aging jz4740-fb driver.
>
> The driver will later be updated with new features (overlays, TV-out
> etc.), that's why I didn't
Hi everyone,
Dante: please avoid top-posting. In other words, put your replies in-line,
like I'm gonna do now. See below (and see how discussion goes on other threads).
On Mon, 11 Mar 2019 at 17:34, DANTE JAVIER PAZ wrote:
>
> Hello Sam, thank you very much for your comments,
> As I told Dan (my
On Mon, 11 Mar 2019 at 18:40, Sam Ravnborg wrote:
>
> Hi Eze
> >
> > Why is this driver still here? I thought we migrated everyhing to
> > tinydrm already.
> Some have been ported, some are waiting for a user to do the port.
> If you looks at tinydrm you will see:
> ili9225.c ili9341.c
>
> And we
On Fri, 2019-05-31 at 14:37 +0200, Neil Armstrong wrote:
> Devfreq runtime usage was made mandatory, thus making panfrost fail to probe
> on Amlogic S912 SoCs missin the "operating-points-v2" property.
> Make it optional again, leaving PM_DEVFREQ is selected by default.
>
> Fixes: f3617b449d ("drm
On Fri, 2019-05-31 at 14:37 +0200, Neil Armstrong wrote:
> Devfreq runtime usage was made mandatory, thus making panfrost fail to probe
> on Amlogic S912 SoCs missin the "operating-points-v2" property.
> Make it optional again, leaving PM_DEVFREQ is selected by default.
>
> Fixes: f3617b449d ("drm
Panfrost depends on the simple_ondemand governor, and therefore
it's a required configuration. Select it.
Fixes: f3617b449d ("drm/panfrost: Select devfreq")
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/panfrost/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/
; Fixes: f3617b449d ("drm/panfrost: Select devfreq")
> Signed-off-by: Neil Armstrong
Reviewed-by: Ezequiel Garcia
Thanks for the fix,
Eze
> ---
> Changes since v1:
> - fixed else/if logic in panfrost_devfreq_init
>
> drivers/gpu/drm/panfrost/panfrost_devfreq.c | 13
On Tue, Jun 11, 2019, 1:01 PM Anders Roxell
wrote:
> On Tue, 11 Jun 2019 at 10:21, Hans Verkuil wrote:
> >
> > On 6/11/19 10:15 AM, Philipp Zabel wrote:
> > > Hi,
> > >
> > > On Mon, 2019-06-10 at 13:14 +, Matt Redfearn wrote:
> > >>
> > >> On 10/06/2019 14:03, Anders Roxell wrote:
> > >>> O
Add CRTC gamma LUT configuration on RK3288 and RK3399.
Signed-off-by: Ezequiel Garcia
---
This patch seems to work well on RK3288, but produces
a distorted output on RK3399. I was hoping
someone could have any idea, so we can support both
platforms.
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
On Thu, 28 Mar 2019 at 16:50, Uma Shankar wrote:
>
> This is how a typical display color hardware pipeline looks like:
> +---+
> |RAM|
> | +--++-++-+ |
> | | FB 1 || FB 2 |
(+ Boris, + Sean)
On Fri, 2019-06-14 at 13:17 -0300, Ezequiel Garcia wrote:
> On Thu, 28 Mar 2019 at 16:50, Uma Shankar wrote:
> > This is how a typical display color hardware pipeline looks like:
> > +---+
> >
On Mon, 2019-06-17 at 12:06 +0200, Jacopo Mondi wrote:
> Hi Ezequiel,
>one small question, as I'm working on supporting gamma LUT for
> rcar-du as well, and there's one point not totally clear to me
>
>
> On Thu, Jun 13, 2019 at 04:22:44PM -0300, Ezequiel Garcia w
's not at all
clear how configure that.
Thanks for the feedback,
Ezequiel
> -ilia
>
> On Thu, Jun 13, 2019 at 3:23 PM Ezequiel Garcia
> wrote:
> > Add CRTC gamma LUT configuration on RK3288 and RK3399.
> >
> > Signed-off-by: Ezequiel Garcia
> > ---
On Fri, 2019-06-14 at 13:05 -0700, Doug Anderson wrote:
> Hi,
>
> On Thu, Jun 13, 2019 at 12:23 PM Ezequiel Garcia
> wrote:
> > @@ -1744,6 +1793,41 @@ int rockchip_drm_wait_vact_end(struct drm_crtc
> > *crtc, unsigned int mstimeout)
> > }
> > EXPO
On Tue, 2019-06-18 at 02:15 -0300, Ezequiel Garcia wrote:
> On Mon, 2019-06-17 at 12:06 +0200, Jacopo Mondi wrote:
> > Hi Ezequiel,
> >one small question, as I'm working on supporting gamma LUT for
> > rcar-du as well, and there's one point not totally clear to
ove gamma setting to atomic_commit_tail, as pointed
out by Jacopo/Laurent, is the correct way.
Ezequiel Garcia (3):
dt-bindings: display: rockchip: document VOP gamma LUT address
drm/rockchip: Add optional support for CRTC gamma LUT
ARM: dts: rockchip: Add RK3288 VOP gamma LUT address
RK3288 SoC VOPs have optional support Gamma LUT setting,
which requires specifying the Gamma LUT address in the devicetree.
Signed-off-by: Ezequiel Garcia
---
arch/arm/boot/dts/rk3288.dtsi | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b
latter
is supported by a different driver. This prevents the DRM driver
from requesting an entire register space.
The current implementation works for RGB 10-bit tables, as that
is what seems to work on RK3288.
Signed-off-by: Ezequiel Garcia
---
Changes from RFC:
* Request (an optional) address
Add the register specifier description for an
optional gamma LUT address.
Signed-off-by: Ezequiel Garcia
---
.../bindings/display/rockchip/rockchip-vop.txt | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/rockchip
On Tue, 2019-06-18 at 17:47 -0400, Ilia Mirkin wrote:
> On Tue, Jun 18, 2019 at 5:43 PM Ezequiel Garcia
> wrote:
> > Add an optional CRTC gamma LUT support, and enable it on RK3288.
> > This is currently enabled via a separate address resource,
> > which needs to be spe
On Wed, 2019-06-19 at 06:20 +, Shankar, Uma wrote:
> > -Original Message-
> > From: dri-devel [mailto:dri-devel-boun...@lists.freedesktop.org] On Behalf
> > Of
> > Ezequiel Garcia
> > Sent: Friday, June 14, 2019 9:48 PM
> > To: Shankar, Um
On Wed, 2019-06-19 at 18:03 +0300, Ville Syrjälä wrote:
> On Wed, Jun 19, 2019 at 10:18:18AM -0300, Ezequiel Garcia wrote:
> > On Wed, 2019-06-19 at 06:20 +, Shankar, Uma wrote:
> > > > -Original Message-
> > > > From: dri-devel [mailto:dri-devel-
On Wed, 2019-06-19 at 00:18 +0200, Heiko Stübner wrote:
> Am Mittwoch, 19. Juni 2019, 00:09:57 CEST schrieb Ezequiel Garcia:
> > On Tue, 2019-06-18 at 17:47 -0400, Ilia Mirkin wrote:
> > > On Tue, Jun 18, 2019 at 5:43 PM Ezequiel Garcia
> > > wrote:
> > > >
On Thu, 2019-06-20 at 09:43 -0700, Doug Anderson wrote:
> Hi,
>
> On Tue, Jun 18, 2019 at 2:43 PM Ezequiel Garcia
> wrote:
> > Add the register specifier description for an
> > optional gamma LUT address.
> >
> > Signed-off-by: Ezequiel Garcia
> &
On Thu, 2019-06-20 at 10:25 -0700, Doug Anderson wrote:
> Hi,
>
> On Tue, Jun 18, 2019 at 2:43 PM Ezequiel Garcia
> wrote:
> > +static void vop_crtc_gamma_set(struct vop *vop, struct drm_crtc *crtc,
> > + struct drm_crtc_state *old_state)
>
Hi Jacopo,
Thanks for the review.
On Fri, 2019-06-21 at 10:22 +0200, Jacopo Mondi wrote:
> Hi Ezequiel,
>just a few minor comments. Thanks for this new iteration.
>
> On Tue, Jun 18, 2019 at 06:34:05PM -0300, Ezequiel Garcia wrote:
> > Add an optional CRTC gamma LUT supp
RK3288 SoC VOPs have optional support Gamma LUT setting,
which requires specifying the Gamma LUT address in the devicetree.
Signed-off-by: Ezequiel Garcia
---
Changes from v1:
* Drop reg-names, as suggested by Doug.
---
arch/arm/boot/dts/rk3288.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2
tting when GAMMA_LUT is NULL.
* Add a check for the gamma size, as suggested by Ilia.
* Move gamma setting to atomic_commit_tail, as pointed
out by Jacopo/Laurent, is the correct way.
Ezequiel Garcia (3):
dt-bindings: display: rockchip: document VOP gamma LUT address
drm/rockchip: Add optio
latter
is supported by a different driver. This prevents the DRM driver
from requesting an entire register space.
The current implementation works for RGB 10-bit tables, as that
is what seems to work on RK3288.
Signed-off-by: Ezequiel Garcia
---
Changes from v1:
* drop explicit linear LUT after
Add the register specifier description for an
optional gamma LUT address.
Signed-off-by: Ezequiel Garcia
---
Changes from v1:
* Drop reg-names, suggested by Doug.
---
.../devicetree/bindings/display/rockchip/rockchip-vop.txt | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff
On Tue, 2019-06-25 at 10:05 +0200, Jacopo Mondi wrote:
> Hi Ezequiel,
>
> On Fri, Jun 21, 2019 at 06:13:45PM -0300, Ezequiel Garcia wrote:
> > Add an optional CRTC gamma LUT support, and enable it on RK3288.
> > This is currently enabled via a separate address resource,
Hi Heiko,
On Fri, 2019-06-21 at 18:13 -0300, Ezequiel Garcia wrote:
> Let's support Gamma LUT configuration on RK3288 SoCs.
>
> In order to do so, this series adds a new and optional
> address resource.
>
> A separate address resource is required because on this RK328
On Thu, 2019-03-28 at 10:17 -0700, Douglas Anderson wrote:
> From: Sean Paul
>
> This patch adds a new subnode to simple-panel allowing us to override
> the typical timing expressed in the panel's display_timing.
>
> Changes in v2:
> - Split out the binding into a new patch (Rob)
> - display-t
Hi Pavel,
The commit log is lacking the proper "leds: triggers: ".
Also...
On Thu, 2019-07-18 at 21:08 +0200, Pavel Machek wrote:
> Configuring backlight trigger from dts results in backlight off during
> boot. Machine looks dead upon boot, which is not good.
>
> Fix that by enabling LED on tri
This option finds the first connected connector and then
sets its preferred mode on it.
Set this option to be set when no mode or plane is set
explicitily. This allows to quickly test, in cases where
one just needs something displayed.
Signed-off-by: Ezequiel Garcia
---
tests/modetest
When a mode is set with just a connector "-s foo",
we get a nasty segmentation fault. Fix it.
Signed-off-by: Ezequiel Garcia
---
tests/modetest/modetest.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/modetest/modetest.c b/tests/modetest/modetest.c
index e66be6607e00..5e
Hi,
I'm glad to see this work moving forward!
On Wed, 2019-07-24 at 10:01 +0200, Thomas Zimmermann wrote:
> Hi
>
> Am 23.07.19 um 14:44 schrieb Andrzej Pietrasiewicz:
> > Hi Sam,
> >
> > W dniu 23.07.2019 o 11:05, Sam Ravnborg pisze:
> > > Hi Andrzej
> > >
> > > On Thu, Jul 11, 2019 at 01:26:4
Fix small typo which causes the mask for the 'precharge1' setting
to be used with the 'precharge2' value.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/solomon/ssd130x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/solomon/ssd130x.
On Thu, Jul 7, 2022 at 5:37 AM Javier Martinez Canillas
wrote:
>
> Hello Ezequiel,
>
> Thanks a lot for your patch.
>
> On 7/6/22 20:41, Ezequiel Garcia wrote:
> > Fix small typo which causes the mask for the 'precharge1' setting
> > to be used with the &
sible.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +-
drivers/gpu/drm/panfrost/panfrost_job.c | 2 +-
drivers/gpu/drm/panfrost/panfrost_mmu.c | 6 --
3 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu
Hey everyone,
Thanks for the quick comments.
(Feedback for kernel patches on the same day, am I dreaming??)
On Fri, 2019-12-13 at 13:46 +, Robin Murphy wrote:
> On 13/12/2019 1:18 pm, Neil Armstrong wrote:
> > Hi,
> >
> > On 13/12/2019 13:39, Ezequiel Garcia wrote:
d-off-by: Ezequiel Garcia
---
v2:
* Use consistent naming, as suggested by Alyssa, Neil and Robin.
drivers/gpu/drm/panfrost/panfrost_gpu.c | 2 +-
drivers/gpu/drm/panfrost/panfrost_job.c | 2 +-
drivers/gpu/drm/panfrost/panfrost_mmu.c | 6 --
3 files changed, 6 insertions(+), 4 deletions(-)
It's not entirely obvious why these messages have
"info" severity. In any case, add a proper driver prefix
to give the user a bit of context of where they are coming from.
Signed-off-by: Ezequiel Garcia
---
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 ++
driv
Hi Adrian,
Thanks for the patch. This is nice consolidation work.
I'm Ccing Heiko for the Rockchip part.
See below for some comments.
On Mon, 2019-12-02 at 21:33 +0200, AdrianAdrian Ratiu wrote:
> Convert the common bridge code and the two rockchip & stm drivers
> which currently use it to the r
On Mon, 2019-12-16 at 14:58 +0100, Enric Balletbo i Serra wrote:
> From: Jitao Shi
>
> This patch adds drm_bridge driver for parade DSI to eDP bridge chip.
>
> Signed-off-by: Jitao Shi
> Reviewed-by: Daniel Kurtz
> Reviewed-by: Enric Balletbo i Serra
> [uli: followed API changes, removed FW u
Hi John,
On Mon, 2019-12-16 at 17:23 +, John Garry wrote:
> Hi all,
>
> Enabling CONFIG_DEBUG_TEST_DRIVER_REMOVE causes many warns on a system
> with the HIBMC hw:
>
> [ 27.788806] WARNING: CPU: 24 PID: 1 at
> drivers/gpu/drm/drm_gem_vram_helper.c:564 bo_driver_move_notify+0x8c/0x98
A t
On Wed, 2019-12-18 at 16:21 +0100, Enric Balletbo i Serra wrote:
> Hi Ezequiel,
>
> Many thanks for the review, I am just preparing the next version to send.
>
[..]
> > > +
> > > +#define PAGE1_VSTART 0x6b
> > > +#define PAGE2_SPI_CFG3 0x82
> > > +#define I2C_TO_SPI_RESET 0x
Hi Enric, Rob,
On Mon, 2019-12-23 at 15:35 +0100, Enric Balletbo i Serra wrote:
> From: Jitao Shi
>
> Add documentation for DT properties supported by
> ps8640 DSI-eDP converter.
>
> Signed-off-by: Jitao Shi
> Acked-by: Rob Herring
> Reviewed-by: Philipp Zabel
> Signed-off-by: Ulrich Hecht
Hi Enric,
Note that this series is marked as v22, but it's really the 23th.
Some minor comments below, it's looking really now.
Reviewed-by: Ezequiel Garcia
On Mon, 2019-12-23 at 15:35 +0100, Enric Balletbo i Serra wrote:
> From: Jitao Shi
>
> This patch adds drm_bridge dr
Hello Sean,
On Mon, 2019-10-07 at 14:54 -0400, Sean Paul wrote:
> On Mon, Sep 30, 2019 at 07:28:00PM -0300, Ezequiel Garcia wrote:
> > Add an optional CRTC gamma LUT support, and enable it on RK3288.
> > This is currently enabled via a separate address resource,
> > which nee
On Tue, 2019-10-08 at 16:23 -0300, Ezequiel Garcia wrote:
> Hello Sean,
>
> On Mon, 2019-10-07 at 14:54 -0400, Sean Paul wrote:
> > On Mon, Sep 30, 2019 at 07:28:00PM -0300, Ezequiel Garcia wrote:
> > > Add an optional CRTC gamma LUT support, and enable it on RK3288.
On Tue, 2019-10-08 at 16:03 -0400, Sean Paul wrote:
> On Tue, Oct 08, 2019 at 04:33:35PM -0300, Ezequiel Garcia wrote:
> > On Tue, 2019-10-08 at 16:23 -0300, Ezequiel Garcia wrote:
> > > Hello Sean,
> > >
> > > On Mon, 2019-10-07 at 14:54 -0400, Sean Paul wrote
RK3288 SoC VOPs have optional support Gamma LUT setting,
which requires specifying the Gamma LUT address in the devicetree.
Signed-off-by: Ezequiel Garcia
Reviewed-by: Douglas Anderson
---
Changes from v3:
* None.
Changes from v2:
* None.
Changes from v1:
* Drop reg-names, as suggested by Doug
Add the register specifier description for an
optional gamma LUT address.
Signed-off-by: Ezequiel Garcia
Reviewed-by: Douglas Anderson
Reviewed-by: Rob Herring
---
Changes from v3:
* None.
Changes from v2:
* None.
Changes from v1:
* Drop reg-names, suggested by Doug.
---
.../devicetree
latter
is supported by a different driver. This prevents the DRM driver
from requesting an entire register space.
The current implementation works for RGB 10-bit tables, as that
is what seems to work on RK3288.
Signed-off-by: Ezequiel Garcia
---
Changes from v3:
* Move to atomic_enable and
1 - 100 of 237 matches
Mail list logo
