Currently reading EDID only works because usually only two EDID blocks
of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
blocks. And the first EDID segment read works fine but E-EDID specifies
up to 128 segments.
The logic is broken so change EDID segment index to multiple of
On Thu, Oct 26, 2023 at 09:11:53PM +0200, Frieder Schrempf wrote:
> [You don't often get email from frieder.schre...@kontron.de. Learn why this
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>
> On 26.10.23 13:30, Emil Abildgaard Svendsen wrote:
> > [Si
On Thu, Oct 26, 2023 at 11:49:00AM -0300, Fabio Estevam wrote:
> Hi Emil,
>
> On Thu, Oct 26, 2023 at 11:47 AM Emil Abildgaard Svendsen
> wrote:
> >
> > Currently reading EDID only works because usually only two EDID blocks
> > of 128 bytes is used. Where an EDID
Currently reading EDID only works because usually only two EDID blocks
of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
blocks. And the first EDID segment read works fine but E-EDID specifies
up to 128 segments.
The logic is broken so change EDID segment index to multiple of
Change check of DDC status. Instead of silently not reading EDID when in
"IDLE" state [1]. Always read EDID but add a debug log when DDC
controller is in reset.
[1]
ADV7511 Programming Guide: Table 11: DDCController Status:
0xC8 [3:0] DDC Controller State
In Reset (No Hot Plug D
On Fri, Oct 27, 2023 at 12:51:07PM +0300, Jani Nikula wrote:
> On Thu, 26 Oct 2023, Emil Abildgaard Svendsen wrote:
> > Currently reading EDID only works because usually only two EDID blocks
> > of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
> > block
Currently reading EDID only works because usually only two EDID blocks
of 128 bytes is used. Where an EDID segment holds 256 bytes or two EDID
blocks. And the first EDID segment read works fine but E-EDID specifies
up to 128 segments.
The logic is broken so change EDID segment index to multiple of
Change check of DDC status. Instead of silently not reading EDID when in
"IDLE" state [1]. Wait for HDCP being initialized because the EDID and
HDCP block shares memory [2].
[1]
ADV7511 Programming Guide revision G: Table 11: DDCController Status:
0xC8 [3:0] DDC Controller State
0b