09.07.2021 22:31, Thierry Reding пишет:
> From: Thierry Reding
>
> Hi all,
>
> Mikko has been away for a few weeks, so I've been testing and revising
> the new UABI patches in the meantime. There are very minor changes to
> the naming of some of the UABI fields, but other than that it's mostly
>
13.08.2021 13:33, Thierry Reding пишет:
> On Mon, Jun 07, 2021 at 01:40:06AM +0300, Dmitry Osipenko wrote:
>> 01.06.2021 07:21, Dmitry Osipenko пишет:
>>> This series adds memory bandwidth management to the NVIDIA Tegra DRM driver,
>>> which is done using interconnect
13.08.2021 19:36, kernel test robot пишет:
> tree: git://anongit.freedesktop.org/tegra/linux.git drm/tegra/for-next
> head: ad85b0843ee4536593415ca890d7fb52cd7f1fbe
> commit: 04d5d5df9df79f9045e76404775fc8a084aac23d [16/17] drm/tegra: dc:
> Support memory bandwidth management
> config: arm-def
13.08.2021 20:12, Dmitry Osipenko пишет:
...
> I probably should update compiler or set W=1 to get that warning. These
> variables were used in older versions of the patch and they can be removed
> now.
>
> Please amend the patch with this:
Perhaps too late already. I'll
which added RPM to memory
drivers since hardware is always-on and RPM not needed.
- Replaced the "dummy host1x driver" patch with new "Disable unused
host1x hardware" patch, since it's a cleaner solution.
Dmitry Osipenko (34):
opp: Add dev_pm_opp_sync()
Add dev_pm_opp_sync() helper which syncs OPP table with hardware state
and vice versa.
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 42 +++---
include/linux/pm_opp.h | 6 ++
2 files changed, 45 insertions(+), 3 deletions(-)
diff --git a
Only couple drivers need to get the -ENODEV error code and explicitly
initialize the performance state. Add new helper that allows to avoid
the extra boilerplate code in majority of drivers.
Signed-off-by: Dmitry Osipenko
---
include/soc/tegra/common.h | 13 +
1 file changed, 13
Use new generic dev_pm_opp_sync() helper which initializes voltage vote
based on clock rate.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/common.c | 30 +-
1 file changed, 1 insertion(+), 29 deletions(-)
diff --git a/drivers/soc/tegra/common.c b/drivers/soc
d
and now we're going make a better GENPD implementation that will require
to update each device driver with the runtime PM and OPP support before
we could safely enable the state syncing.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/pmc.c | 17 +
1 file changed, 17
error message about missing OPP table in the common helper,
we can print it elsewhere.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/common.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c
index cd33e99
Memory Client should be blocked before hardware reset is asserted in order
to prevent memory corruption and hanging of memory controller.
Document Memory Client resets of Host1x, GR2D and GR3D hardware units.
Signed-off-by: Dmitry Osipenko
---
.../bindings/display/tegra/nvidia,tegra20
Document new DVFS OPP table and power domain properties of the Host1x bus
and devices sitting on the bus.
Reviewed-by: Rob Herring
Signed-off-by: Dmitry Osipenko
---
.../display/tegra/nvidia,tegra20-host1x.txt | 49 +++
1 file changed, 49 insertions(+)
diff --git
a
-by: Peter Geis # Ouya T30
Tested-by: Paul Fertser # PAZ00 T20
Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/channel.c | 8
include/linux/host1x.h | 1 +
2 files changed, 9 insertions
Tested-by: Peter Geis # Ouya T30
Tested-by: Paul Fertser # PAZ00 T20
Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/clk/tegra/Makefile | 1 +
drivers/clk/tegra/clk-device.c | 222
Add power management to the GR2D driver.
Tested-by: Peter Geis # Ouya T30
Tested-by: Paul Fertser # PAZ00 T20
Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gr2d.c | 154
Hardware must be stopped before system is suspended. Add suspend-resume
callbacks.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/vic.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c
index c02010ff2b7f..359dd77f8b85
evice dedicated
to them, clock controller is in charge of managing power for them.
Signed-off-by: Dmitry Osipenko
---
.../bindings/clock/nvidia,tegra20-car.yaml| 51 +++
1 file changed, 51 insertions(+)
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra20-car.ya
The NAND on Tegra belongs to the core power domain and we're going to
enable GENPD support for the core domain. Now NAND must be resumed using
runtime PM API in order to initialize the NAND power state. Add runtime PM
and OPP support to the NAND driver.
Signed-off-by: Dmitry Osi
e
rate. Add OPP support to the driver.
Signed-off-by: Dmitry Osipenko
---
drivers/spi/spi-tegra20-slink.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c
index deff16ba6d58..37cb15dc59f7 100644
--- a/
omain performance state in accordance to the rate. Add runtime PM and OPP
support to the SDHCI driver.
Signed-off-by: Dmitry Osipenko
---
drivers/mmc/host/sdhci-tegra.c | 146 -
1 file changed, 105 insertions(+), 41 deletions(-)
diff --git a/drivers/mmc/host/sdhci-te
The GMI bus on Tegra belongs to the core power domain and we're going to
enable GENPD support for the core domain. Now GMI must be resumed using
runtime PM API in order to initialize the GMI power state. Add runtime PM
and OPP support to the GMI driver.
Signed-off-by: Dmitry Osi
# Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c | 74 ++
drivers/gpu/drm/tegra/dc.h | 2 ++
2 files changed, 76 insertions(+)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 16c7aabb94d3..435dd8139c6e 100644
rated
from the RPM managed by tegra-usb driver. Add runtime PM and OPP support
to tegra-usb driver.
Signed-off-by: Dmitry Osipenko
---
drivers/usb/chipidea/ci_hdrc_tegra.c | 61
1 file changed, 54 insertions(+), 7 deletions(-)
diff --git a/drivers/usb/chipidea/ci_hd
Add power management to the GR3D driver.
Tested-by: Peter Geis # Ouya T30
Tested-by: Paul Fertser # PAZ00 T20
Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/gr3d.c | 393
Convert NVIDIA Tegra video decoder binding to schema.
Signed-off-by: Dmitry Osipenko
---
.../bindings/media/nvidia,tegra-vde.txt | 64 ---
.../bindings/media/nvidia,tegra-vde.yaml | 107 ++
2 files changed, 107 insertions(+), 64 deletions(-)
delete mode
k
rate. Add OPP support to the HDMI driver.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/hdmi.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index e5d2a4026028..aa13028480f7 100644
--- a/
omain
performance state in accordance to the rate. Add runtime PM and OPP
support to the PWM driver.
Signed-off-by: Dmitry Osipenko
---
drivers/pwm/pwm-tegra.c | 104
1 file changed, 85 insertions(+), 19 deletions(-)
diff --git a/drivers/pwm/pwm-tegra.c b/drivers/pw
Memory access must be blocked before hardware reset is asserted and before
power is gated, otherwise a serious hardware fault is inevitable. Add
reset for memory clients to the GR2D, GR3D and Host1x nodes.
Tested-by: Peter Geis # Ouya T30
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry
All device drivers got runtime PM and OPP support. Flip the core domain
support status for Tegra20 and Tegra30 SoCs.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/pmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/tegra/pmc.c b/drivers/soc/tegra
Add OPP tables and power domains to all peripheral devices which
support power management on Tegra20 SoC.
Tested-by: Paul Fertser # PAZ00 T20
Tested-by: Nicolas Chauvet # PAZ00 T20
Signed-off-by: Dmitry Osipenko
---
.../boot/dts/tegra20-acer-a500-picasso.dts| 1 +
arch/arm/boot/dts
The FUSE controller is enabled at a boot time. Reset it in order to put
hardware and clock into clean and disabled state.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/fuse/fuse-tegra.c | 25 +
drivers/soc/tegra/fuse/fuse.h | 1 +
2 files changed, 26
Initialize and sync FUSE OPP to set up SoC core voltage vote needed by
FUSE hardware.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/fuse/fuse-tegra.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/soc/tegra/fuse/fuse-tegra.c
b/drivers/soc/tegra/fuse/fuse
ted-by: Paul Fertser # PAZ00 T20
Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/debug.c | 15 +++
drivers/gpu/host1x/dev.c | 157 -
drivers/gpu/host1x/d
: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 5c74cc76b5e3..2cb31bdd9eea 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts
Add OPP tables and power domains to all peripheral devices which
support power management on Tegra30 SoC.
Tested-by: Peter Geis # Ouya T30
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
.../tegra30-asus-nexus7-grouper-common.dtsi |1 +
arch/arm/boot/dts/tegra30
Depending on hardware version, Tegra SoC may require a higher voltages
during resume from system suspend, otherwise hardware will crash. Set
SoC voltages to a nominal levels during suspend.
Signed-off-by: Dmitry Osipenko
---
drivers/soc/tegra/regulators-tegra20.c | 99
d-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra20.dtsi | 4
arch/arm/boot/dts/tegra30.dtsi | 8
2 files changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 2cb31bdd9eea..32abe559645f 100644
--- a/arch/arm/boot/dts/tegra20
Tested-by: Nicolas Chauvet # PAZ00 T20 and TK1 T124
Tested-by: Matt Merhar # Ouya T30
Signed-off-by: Dmitry Osipenko
---
drivers/staging/media/tegra-vde/vde.c | 65 ++-
1 file changed, 54 insertions(+), 11 deletions(-)
diff --git a/drivers/staging/media/tegra-vde/vde.c
b
Document new OPP table and power domain properties of the video decoder
hardware.
Signed-off-by: Dmitry Osipenko
---
.../devicetree/bindings/media/nvidia,tegra-vde.yaml | 12
1 file changed, 12 insertions(+)
diff --git a/Documentation/devicetree/bindings/media/nvidia,tegra
Remove unused variables from tegra_crtc_update_memory_bandwidth().
Fixes: 04d5d5df9df7 ("drm/tegra: dc: Support memory bandwidth management")
Reported-by: kernel test robot
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c | 3 ---
drivers/gpu/drm/tegra/dc.h | 6 -
Fix troubles introduced by recent commits.
Dmitry Osipenko (3):
drm/tegra: dc: Remove unused variables
drm/tegra: uapi: Fix wrong mapping end address in case of disabled
IOMMU
gpu/host1x: fence: Make spinlock static
drivers/gpu/drm/tegra/dc.c | 3 ---
drivers/gpu/drm/tegra/dc.h
The DEFINE_SPINLOCK macro creates a global spinlock symbol that is visible
to the whole kernel. This is unintended in the code, fix it.
Fixes: 687db2207b1b ("gpu: host1x: Add DMA fence implementation")
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/host1x/fence.c | 2 +-
1 file
All jobs are failing on Tegra20 because it doesn't use IOMMU and mapping
function uses size of mapping that is zero instead of BO size, fix it.
Fixes: d7c591bc1a3f ("drm/tegra: Implement new UAPI")
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/uapi.c | 2 +-
1
17.08.2021 10:55, Viresh Kumar пишет:
...
>> +int dev_pm_opp_sync(struct device *dev)
>> +{
>> +struct opp_table *opp_table;
>> +struct dev_pm_opp *opp;
>> +int ret = 0;
>> +
>> +/* Device may not have OPP table */
>> +opp_table = _find_opp_table(dev);
>> +if (IS_ERR(opp_tab
17.08.2021 15:22, Mark Brown пишет:
> On Tue, Aug 17, 2021 at 04:27:42AM +0300, Dmitry Osipenko wrote:
>> The SPI on Tegra belongs to the core power domain and we're going to
>> enable GENPD support for the core domain. Now SPI driver must use OPP
>> API for driving t
18.08.2021 04:16, Rob Herring пишет:
> On Tue, Aug 17, 2021 at 04:27:29AM +0300, Dmitry Osipenko wrote:
>> Memory Client should be blocked before hardware reset is asserted in order
>> to prevent memory corruption and hanging of memory controller.
>>
>> Document Mem
18.08.2021 04:15, Rob Herring пишет:
>> + tegra-clocks:
>> +description: child nodes are the output clocks from the CAR
>> +type: object
>> +
>> +patternProperties:
>> + "^[a-z]+[0-9]+$":
>> +type: object
>> +properties:
>> + compatible:
>> +al
18.08.2021 04:37, Dmitry Osipenko пишет:
> 18.08.2021 04:16, Rob Herring пишет:
>> On Tue, Aug 17, 2021 at 04:27:29AM +0300, Dmitry Osipenko wrote:
>>> Memory Client should be blocked before hardware reset is asserted in order
>>> to prevent memory corruption and h
18.08.2021 05:04, Dmitry Osipenko пишет:
> 18.08.2021 04:37, Dmitry Osipenko пишет:
>> 18.08.2021 04:16, Rob Herring пишет:
>>> On Tue, Aug 17, 2021 at 04:27:29AM +0300, Dmitry Osipenko wrote:
>>>> Memory Client should be blocked before hardware reset is asserted i
18.08.2021 06:55, Viresh Kumar пишет:
> On 17-08-21, 18:49, Dmitry Osipenko wrote:
>> 17.08.2021 10:55, Viresh Kumar пишет:
>> ...
>>>> +int dev_pm_opp_sync(struct device *dev)
>>>> +{
>>>> + struct opp_table *opp_table;
18.08.2021 07:12, Dmitry Osipenko пишет:
> 18.08.2021 06:55, Viresh Kumar пишет:
>> On 17-08-21, 18:49, Dmitry Osipenko wrote:
>>> 17.08.2021 10:55, Viresh Kumar пишет:
>>> ...
>>>>> +int dev_pm_opp_sync(struct device *dev)
>>>>> +{
>&
18.08.2021 07:29, Dmitry Osipenko пишет:
> 18.08.2021 07:12, Dmitry Osipenko пишет:
>> 18.08.2021 06:55, Viresh Kumar пишет:
>>> On 17-08-21, 18:49, Dmitry Osipenko wrote:
>>>> 17.08.2021 10:55, Viresh Kumar пишет:
>>>> ...
>
18.08.2021 07:31, Viresh Kumar пишет:
> On 18-08-21, 07:12, Dmitry Osipenko wrote:
>> 18.08.2021 06:55, Viresh Kumar пишет:
>>> On 17-08-21, 18:49, Dmitry Osipenko wrote:
>>>> 17.08.2021 10:55, Viresh Kumar пишет:
>>>> ...
>
18.08.2021 07:53, Viresh Kumar пишет:
> On 18-08-21, 07:37, Dmitry Osipenko wrote:
>> This will set voltage level without having an actively used hardware.
>> Take a 3d driver for example, if you set the rate on probe and
>> rpm-resume will never be called, then the vol
18.08.2021 08:58, Viresh Kumar пишет:
> On 18-08-21, 08:21, Dmitry Osipenko wrote:
>> Yes, GENPD will cache the perf state across suspend/resume and initially
>> cached value is out of sync with h/w.
>>
>> Nothing else. But let me clarify it all again.
>
18.08.2021 16:52, Thierry Reding пишет:
> On Wed, Aug 18, 2021 at 04:44:30AM +0300, Dmitry Osipenko wrote:
>> 18.08.2021 04:15, Rob Herring пишет:
>>>> + tegra-clocks:
>>>> +description: child nodes are the output clocks from the CAR
>>>> +ty
18.08.2021 16:59, Thierry Reding пишет:
> On Tue, Aug 17, 2021 at 04:27:26AM +0300, Dmitry Osipenko wrote:
>> Document tegra-clocks sub-node which describes Tegra SoC clocks that
>> require a higher voltage of the core power domain in order to operate
>> properly on a high
18.08.2021 17:07, Thierry Reding пишет:
> On Tue, Aug 17, 2021 at 04:27:27AM +0300, Dmitry Osipenko wrote:
> [...]
>> +struct clk *tegra_clk_register(struct clk_hw *hw)
>> +{
>> +struct platform_device *pdev;
>> +struct device *dev = NULL;
>> +struct
18.08.2021 13:08, Ulf Hansson пишет:
> On Wed, 18 Aug 2021 at 11:50, Viresh Kumar wrote:
>>
>> On 18-08-21, 11:41, Ulf Hansson wrote:
>>> On Wed, 18 Aug 2021 at 11:14, Viresh Kumar wrote:
What we need here is just configure. So something like this then:
- genpd->get_performance_sta
18.08.2021 18:43, Dmitry Osipenko пишет:
> 18.08.2021 13:08, Ulf Hansson пишет:
>> On Wed, 18 Aug 2021 at 11:50, Viresh Kumar wrote:
>>>
>>> On 18-08-21, 11:41, Ulf Hansson wrote:
>>>> On Wed, 18 Aug 2021 at 11:14, Viresh Kumar wrote:
>>>>>
18.08.2021 12:41, Ulf Hansson пишет:
> On Wed, 18 Aug 2021 at 11:14, Viresh Kumar wrote:
>>
>> On 18-08-21, 10:29, Ulf Hansson wrote:
>>> Me and Dmitry discussed adding a new genpd callback for this. I agreed
>>> that it seems like a reasonable thing to add, if he insists.
Either way gives the eq
18.08.2021 19:39, Thierry Reding пишет:
>> We don't have a platform device for CaR. I don't see how it's going to
>> work. We need to create a platform device for each RPM-capable clock
>> because that's how RPM works. The compatible string is required for
>> instantiating OF-devices from a node, o
18.08.2021 19:42, Thierry Reding пишет:
> On Wed, Aug 18, 2021 at 06:05:21PM +0300, Dmitry Osipenko wrote:
>> 18.08.2021 17:07, Thierry Reding пишет:
>>> On Tue, Aug 17, 2021 at 04:27:27AM +0300, Dmitry Osipenko wrote:
>>> [...]
>>>> +struct cl
18.08.2021 19:57, Dmitry Osipenko пишет:
>>>> Also, I don't think the tegra- prefix is necessary here. The parent node
>>>> is already identified as Tegra via the compatible string.
>>>>
>>>> In the case of CAR, I'd imagine
18.08.2021 11:35, Ulf Hansson пишет:
> Thanks for clarifying! As I said, feel free to ignore my comments then.
>
> For this and the other patches in the series, I assume you only need
> to care about whether the driver is a cross SoC driver and used on
> other platforms than Tegra then.
Yes, and
19.08.2021 16:07, Ulf Hansson пишет:
> On Wed, 18 Aug 2021 at 17:43, Dmitry Osipenko wrote:
>>
>> 18.08.2021 13:08, Ulf Hansson пишет:
>>> On Wed, 18 Aug 2021 at 11:50, Viresh Kumar wrote:
>>>>
>>>> On 18-08-21, 11:41, Ulf Hansson wrote:
19.08.2021 19:54, Thierry Reding пишет:
> On Wed, Aug 18, 2021 at 08:11:03PM +0300, Dmitry Osipenko wrote:
>> 18.08.2021 19:42, Thierry Reding пишет:
>>> On Wed, Aug 18, 2021 at 06:05:21PM +0300, Dmitry Osipenko wrote:
>>>> 18.08.2021 17:07, Thierry Reding пишет:
&g
19.08.2021 19:31, Thierry Reding пишет:
> Also, I don't think the tegra- prefix is necessary here. The parent node
> is already identified as Tegra via the compatible string.
>
> In the case of CAR, I'd imagine something like:
>
> clocks {
> sclk {
>
19.08.2021 20:03, Thierry Reding пишет:
> On Tue, Aug 17, 2021 at 04:27:40AM +0300, Dmitry Osipenko wrote:
>> The SDHCI on Tegra belongs to the core power domain and we're going to
>> enable GENPD support for the core domain. Now SDHCI must be resumed using
>> runtime PM
19.08.2021 19:31, Thierry Reding пишет:
>> The "device" representation is internal to the kernel. It's okay to me
>> to have PLLs represented by a device, it's a distinct h/w by itself.
>>
>> CCF supports managing of clock's RPM and it requires to have clock to be
>> backed by a device. That's what
20.08.2021 15:42, Ulf Hansson пишет:
> On Thu, 19 Aug 2021 at 21:35, Dmitry Osipenko wrote:
>>
>> 19.08.2021 16:07, Ulf Hansson пишет:
>>> On Wed, 18 Aug 2021 at 17:43, Dmitry Osipenko wrote:
>>>>
>>>> 18.08.2021 13:08, Ulf Hansson пишет:
20.08.2021 16:08, Ulf Hansson пишет:
...
>> I suppose if there's really no good way of doing this other than
>> providing a struct device, then so be it. I think the cleaned up sysfs
>> shown in the summary above looks much better than what the original
>> would've looked like.
>>
>> Perhaps an add
20.08.2021 08:18, Viresh Kumar пишет:
> On 19-08-21, 16:55, Ulf Hansson wrote:
>> Right, that sounds reasonable.
>>
>> We already have pm_genpd_opp_to_performance_state() which translates
>> an OPP to a performance state. This function invokes the
>> ->opp_to_performance_state() for a genpd. Maybe
23.08.2021 13:46, Ulf Hansson пишет:
>>> ...
>>> dev_pm_opp_set_rate(rate)
>>> pm_runtime_get_noresume()
>>> pm_runtime_set_active()
>>> pm_runtime_enable()
>>> ...
>>> pm_runtime_put()
>>> ...
>>>
>>> We need to call genpd_set_performance_state() independently of whether
>>> the device is runtime
23.08.2021 17:33, Thierry Reding пишет:
> On Sat, Aug 21, 2021 at 08:45:54PM +0300, Dmitry Osipenko wrote:
>> 20.08.2021 16:08, Ulf Hansson пишет:
>> ...
>>>> I suppose if there's really no good way of doing this other than
>>>> providing a struct d
20.08.2021 15:57, Ulf Hansson пишет:
...
>> We already have similar APIs, so that won't be a problem. We also have
>> a mechanism inside the OPP core, frequency based, which is used to
>> guess the current OPP. Maybe we can enhance and use that directly
>> here.
>
> After reading the last reply fr
20.08.2021 14:35, Thierry Reding пишет:
> On Fri, Aug 20, 2021 at 01:37:13AM +0300, Dmitry Osipenko wrote:
>> 19.08.2021 20:03, Thierry Reding пишет:
>>> On Tue, Aug 17, 2021 at 04:27:40AM +0300, Dmitry Osipenko wrote:
>>>> The SDHCI on Tegra belongs to the core p
22.08.2021 21:35, Dmitry Osipenko пишет:
> 20.08.2021 08:18, Viresh Kumar пишет:
>> On 19-08-21, 16:55, Ulf Hansson wrote:
>>> Right, that sounds reasonable.
>>>
>>> We already have pm_genpd_opp_to_performance_state() which translates
>>> an OPP to a
so I
(Dmitry Osipenko) picked up the effort since these patches are
wanted by the NVIDIA Tegra voltage-scaling series that I'm
working on.
- Fixed the double put of OPP resources.
- Dropped all patches that are unrelated to OPP API. I also dropped
the Tegra me
From: Yangtao Li
Add devres wrapper for dev_pm_opp_set_clkname() to simplify drivers code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 27 +++
include/linux/pm_opp.h | 6 ++
2 files changed, 33 insertions(+)
diff --git a
From: Yangtao Li
Add devres wrapper for dev_pm_opp_set_regulators() to simplify drivers
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 30 ++
include/linux/pm_opp.h | 8
2 files changed, 38 insertions(+)
diff
From: Yangtao Li
Add devres wrapper for dev_pm_opp_set_supported_hw() to simplify drivers
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 29 +
include/linux/pm_opp.h | 8
2 files changed, 37 insertions
From: Yangtao Li
Add devres wrapper for dev_pm_opp_of_add_table() to simplify drivers
code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/opp/of.c | 36
include/linux/pm_opp.h | 6 ++
2 files changed, 42 insertions
Make devm_pm_opp_register_set_opp_helper() to return error code instead
of opp_table pointer in order to have return type consistent with the
other resource-managed OPP helpers.
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 18 ++
include/linux/pm_opp.h | 6
Make devm_pm_opp_attach_genpd() to return error code instead of
opp_table pointer in order to have return type consistent with the
other resource-managed OPP helpers.
Signed-off-by: Dmitry Osipenko
---
drivers/opp/core.c | 18 ++
include/linux/pm_opp.h | 9 +
2
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/tty/serial/qcom_geni_serial.c | 23 ---
1 file changed, 8 insertions(+), 15 deletions(-)
diff --git a/drivers/tty/serial
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Acked-by: Mark Brown
Signed-off-by: Dmitry Osipenko
---
drivers/spi/spi-geni-qcom.c | 16 ++--
include/linux/qcom-geni-se.h | 2 --
2 files changed, 6 insertions(+), 12 deletions(-)
diff
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Acked-by: Mark Brown
Signed-off-by: Dmitry Osipenko
---
drivers/spi/spi-qcom-qspi.c | 18 +-
1 file changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/spi-qcom-qspi.c b
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/mmc/host/sdhci-msm.c | 19 +--
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/lima/lima_devfreq.c | 47 +++--
drivers/gpu/drm/lima/lima_devfreq.h | 3 --
2 files changed, 11 insertions(+), 39 deletions
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Reviewed-by: Steven Price
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/panfrost/panfrost_devfreq.c | 37 +
drivers/gpu/drm/panfrost/panfrost_devfreq.h | 2 --
2 files changed
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/media/platform/qcom/venus/core.h | 1 -
.../media/platform/qcom/venus/pm_helpers.c| 35 +--
2 files changed, 8 insertions(+), 28
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 2 +-
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 2 +-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 11 +++--
drivers/gpu
From: Yangtao Li
Use resource-managed OPP API to simplify code.
Signed-off-by: Yangtao Li
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Osipenko
---
drivers/memory/samsung/exynos5422-dmc.c | 13 +++--
1 file changed, 3 insertions(+), 10 deletions(-)
diff --git a/drivers
Use generic dev_err_probe() helper which silences noisy error messages
about deferred probe of the Tegra DRM drivers.
Signed-off-by: Dmitry Osipenko
---
drivers/gpu/drm/tegra/dc.c | 13 +++--
drivers/gpu/drm/tegra/hdmi.c | 34 +-
2 files changed, 12
15.03.2021 01:31, Michał Mirosław пишет:
> On Thu, Mar 11, 2021 at 08:22:54PM +0300, Dmitry Osipenko wrote:
>> Display controller (DC) performs isochronous memory transfers, and thus,
>> has a requirement for a minimum memory bandwidth that shall be fulfilled,
>> otherwise f
15.03.2021 21:39, Dmitry Osipenko пишет:
>>> + /*
>>> +* Horizontal downscale needs a lower memory latency, which roughly
>>> +* depends on the scaled width. Trying to tune latency of a memory
>>> +* client alone will likely result in a strong
15.03.2021 01:11, Michał Mirosław пишет:
> On Thu, Mar 11, 2021 at 08:22:55PM +0300, Dmitry Osipenko wrote:
>> It's useful to know the total number of underflow events and currently
>> the debug stats are getting reset each time CRTC is being disabled. Let's
>> accou
sor plane index.
v13: - No code changes. Patches missed v5.12, re-sending them for v5.13.
Dmitry Osipenko (2):
drm/tegra: dc: Support memory bandwidth management
drm/tegra: dc: Extend debug stats with total number of events
drivers/gpu/drm/tegra/Kconfig |
It's useful to know the total number of underflow events and currently
the debug stats are getting reset each time CRTC is being disabled. Let's
account the overall number of events that doesn't get a reset.
Reviewed-by: Michał Mirosław
Signed-off-by: Dmitry Osipenko
---
driver
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