*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
v3: Moved crc enable to ddi pre enable
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
v3: Moved crc enable to ddi pre enable
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_ddi.c | 12
1 file changed, 12 insertions(+)
diff
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
v3: Moved crc enable to ddi pre enable
v4: Separate function for SDP CRC16 (Jani N)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_ddi.c | 4
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
Signed-off-by: Arun R Murthy
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index
.
Corrective actions on SDP corruption is yet to be defined.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_dp.c | 13 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/drm
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915
DP2.0 E11 defines a new register to facilitate SDP error detection by a
128B/132B capable DPRX device.
v2: Update the macro name to reflect the DP spec(Harry)
Signed-off-by: Arun R Murthy
Reviewed-by: Harry Wentland
---
include/drm/display/drm_dp.h | 3 +++
1 file changed, 3 insertions
*** BLURB HERE ***
Arun R Murthy (2):
drm: Add SDP Error Detection Configuration Register
i915/display/dp: SDP CRC16 for 128b132b link layer
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
include/drm/display/drm_dp.h | 3 +++
2 files changed
this write.
Corrective actions on SDP corruption is yet to be defined.
v2: Moved the CRC enable to link training init(Jani N)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_dp_link_training.c| 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915
might a challenge.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
include/drm/drm_plane.h | 8
include/uapi/drm/drm_mode.h | 20
3 files changed, 31 insertions(+)
=Option 2
diff
be confused by a corresponding dpcd write.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 26 +++
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
d
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
d
be confused by a corresponding dpcd write.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/display/drm_dp_mst_topology.c | 38 +++
1 file changed, 22 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
b/drivers/gpu/drm/display
Create a i915 private plane property for sharing the async supported
modifiers to the user.
UMD related discussion requesting the same
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29618#note_2487123
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 6
get_modifiers will get the list of modifiers supported by the plane. Add
a flag async_flip to fetch only the async_flip supported modifiers.
Also expose function to get the number of modifiers supported by the
platform.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/i9xx_plane.c
Add the formats/modifiers supported by asynchronous flips by the
platform based on the plane capabilities.
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/skl_universal_plane.c| 22 +++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/display
supported modifiers/formats so that user can use
this information ahead and done flips with unsupported
formats/modifiers. This will save flips failures.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu/drm/drm_plane.c | 73
Few of the modifiers are not supported with async flip. Add an element
async_flip to say if the modifier supports asynchronous flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_fb.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915
under review @
https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/4063
Arun R Murthy (4):
drm/plane: Add new plane property IN_FORMATS_ASYNC
drm/i915/fb: Add async field to the modifiers description
drm/i915/display: Add async_flip flag in get_modifiers
drm/i915/display: Add async
Histogram added as part of i915/display driver. Adding the same for xe
as well.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index edfd812e0f41..2a5e3ed5ea17 100644
ani)
v3: Replaced drm_i915_private with intel_display (Suraj)
Refactored the histogram read code (Jani)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_display_irq.c | 6 +-
.../gpu/drm/i915/display/intel_histogram.c| 93 +++
.../gpu/drm/i915/disp
In Display 20+, new registers are added for setting index, reading
histogram and writing the IET.
v2: Removed duplicate code (Jani)
v3: Moved histogram core changes to earlier patches (Jani/Suraj)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_histogram.c| 111
The delay counter for histogram does not reset and as a result the
histogram bin never gets updated. Workaround would be to use save and
restore histogram register.
HSD: 14014889975
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 17 +
.../gpu
am is also pushed for review at
https://patchwork.freedesktop.org/series/135789/
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (6):
drm/i915/histogram: Add support for histogram
drm/xe: Add histogram support to Xe builds
drm/i915/histogram: histogram interrupt hand
togram data.
"Global IET" is a crtc property to write the IET binary LUT data.
v2: Read the histogram blob data before sending uevent (Jani)
v3: use drm_property_replace_blob_from_id (Vandita)
Add substruct for histogram in intel_crtc_state (Jani)
Signed-off-by: Arun R Murthy
---
enhancement factor can be multiplied/added with
the incoming pixel data frame.
v2: forward declaration in header file along with error handling (Jani)
v3: Replaced i915 with intel_display (Suraj)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915
)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_display_types.h| 2 +
.../gpu/drm/i915/display/intel_histogram.c| 187 ++
.../gpu/drm/i915/display/intel_histogram.h| 35
4 files changed, 225
Histogram added as part of i915/display driver. Adding the same for xe
as well.
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index
ani)
v3: Replaced drm_i915_private with intel_display (Suraj)
Refactored the histogram read code (Jani)
v4: Rebased after addressing comments on patch 1
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_display_irq.c | 6 +-
.../gpu/drm/i915/display/intel_histogram.c|
The delay counter for histogram does not reset and as a result the
histogram bin never gets updated. Workaround would be to use save and
restore histogram register.
Wa: 14014889975
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 17 +
.../gpu
Add the register/bit definitions for global histogram.
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/intel_histogram_reg.h| 54 +++
1 file changed, 54 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_histogram_reg.h
diff --git a/drivers/gpu/drm
In Display 20+, new registers are added for setting index, reading
histogram and writing the IET.
v2: Removed duplicate code (Jani)
v3: Moved histogram core changes to earlier patches (Jani/Suraj)
v4: Rebased after addressing comments on patch 1
Signed-off-by: Arun R Murthy
---
.../gpu/drm
am is also pushed for review at
https://patchwork.freedesktop.org/series/135789/
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (7):
drm/i915/histogram: Define registers for histogram
drm/i915/histogram: Add support for histogram
drm/xe: Add histogram support to
ents on patch 1
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_atomic.c | 5 +
drivers/gpu/drm/i915/display/intel_crtc.c | 169 +-
drivers/gpu/drm/i915/display/intel_crtc.h | 5 +
drivers/gpu/drm/i915/display/intel_display.c | 13 ++
.../drm/i915
am is also pushed for review at
https://patchwork.freedesktop.org/series/135789/
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (8):
drm/i915/histogram: Define registers for histogram
drm/i915/histogram: Add support for histogram
drm/xe: Add histogram support to
Add the register/bit definitions for global histogram.
v2: Intended the register contents, removed unused regs (Jani)
Bspec: 4270
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
.../drm/i915/display/intel_histogram_regs.h | 48 +++
1 file changed, 48 insertions
ments on patch 1
v5: histogram check with old/new crtc_state (Suraj)
v6: Rebase
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_atomic.c | 5 +
drivers/gpu/drm/i915/display/intel_crtc.c | 166 +-
drivers/gpu/drm/i915/display/intel_crtc.h | 5 +
)
v5: IET LUT pgm follow the seq in spec and removed change to TC at end
(Suraj)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_display_types.h| 2 +
.../gpu/drm/i915/display/intel_histogram.c| 190
Guardband Delay Interrupt counter = 0
(Suraj)
Wa: 14014889975
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 14 ++
.../gpu/drm/i915/display/intel_histogram_regs.h| 2 ++
2 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm
In Display 20+, new registers are added for setting index, reading
histogram and writing the IET.
v2: Removed duplicate code (Jani)
v3: Moved histogram core changes to earlier patches (Jani/Suraj)
v4: Rebased after addressing comments on patch 1
Signed-off-by: Arun R Murthy
---
.../gpu/drm
ani)
v3: Replaced drm_i915_private with intel_display (Suraj)
Refactored the histogram read code (Jani)
v4: Rebased after addressing comments on patch 1
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_display_irq.c | 6 +-
.../gpu/drm/i915/display/intel_histogram.c|
The delay counter for histogram does not reset and as a result the
histogram bin never gets updated. Workaround would be to use save and
restore histogram register.
Wa: 14014889975
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 17 +
.../gpu
Add the register/bit definitions for global histogram.
v2: Intended the register contents, removed unused regs (Jani)
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/intel_histogram_regs.h | 48 +++
1 file changed, 48 insertions(+)
create mode 100644 drivers/gpu/drm
)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_display_types.h| 2 +
.../gpu/drm/i915/display/intel_histogram.c| 195 ++
.../gpu/drm/i915/display/intel_histogram.h| 35
4 files changed, 233
am is also pushed for review at
https://patchwork.freedesktop.org/series/135789/
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (8):
drm/i915/histogram: Define registers for histogram
drm/i915/histogram: Add support for histogram
drm/xe: Add histogram support to
ments on patch 1
v5: histogram check with old/new crtc_state (Suraj)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_atomic.c | 5 +
drivers/gpu/drm/i915/display/intel_crtc.c | 168 +-
drivers/gpu/drm/i915/display/intel_crtc.h | 5 +
drivers/gpu/dr
Histogram added as part of i915/display driver. Adding the same for xe
as well.
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index
Enable pipe dithering while enabling histogram to overcome some
atrifacts seen on the screen.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
b/drivers
Populate the list of formats/modifiers supported by async flip. Register
a async property and expose the same to user through blob.
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/skl_universal_plane.c| 51 +++
1 file changed, 51 insertions(+)
diff --git a/drivers/gpu
Expose drm plane function to create formats/modifiers blob. This
function can be used to expose list of supported formats/modifiers for
sync/async flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_plane.c | 44 -
include/drm/drm_plane.h | 4
Populate the list of formats/modifiers supported by async flip. Register
a async property and expose the same to user through blob.
Signed-off-by: Arun R Murthy
---
.../drm/i915/display/skl_universal_plane.c| 51 +++
1 file changed, 51 insertions(+)
diff --git a/drivers/gpu
supported modifiers/formats so that user can use
this information ahead and done flips with unsupported
formats/modifiers. This will save flips failures.
v2: Remove async variable from drm_plane (Ville)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu
under review @
https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/4063
Arun R Murthy (3):
drm/plane: Add new plane property IN_FORMATS_ASYNC
drm/plane: Expose function to create format/modifier blob
drm/i915/display: Populate list of async supported formats/modifiers
drivers/gpu/drm
under review @
https://gitlab.gnome.org/GNOME/mutter/-/merge_requests/4063
Arun R Murthy (3):
drm/plane: Add new plane property IN_FORMATS_ASYNC
drm/plane: Expose function to create format/modifier blob
drm/i915/display: Populate list of async supported formats/modifiers
drivers/gpu/drm
Expose drm plane function to create formats/modifiers blob. This
function can be used to expose list of supported formats/modifiers for
sync/async flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_plane.c | 44 -
include/drm/drm_plane.h | 4
supported modifiers/formats so that user can use
this information ahead and done flips with unsupported
formats/modifiers. This will save flips failures.
v2: Remove async variable from drm_plane (Ville)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu
ani)
v3: Replaced drm_i915_private with intel_display (Suraj)
Refactored the histogram read code (Jani)
v4: Rebased after addressing comments on patch 1
v5: removed the retry logic and moved to patch7 (Jani)
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_display_irq.c |
Add variables for histogram drm_property, its corrsponding crtc_state
variables and define the structure pointed by the blob property.
Signed-off-by: Arun R Murthy
---
include/drm/drm_crtc.h | 48 +
include/uapi/drm/drm_mode.h | 11 +
2 files
Guardband Delay Interrupt counter = 0
(Suraj)
v3: updated wa version for display 13 and 14
Wa: 14014889975
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 14 ++
.../gpu/drm/i915/display/intel_histogram_regs.h| 2 ++
2 files changed, 16
?commit_id=270808ca7c8be48513553d95b4a47541f5d40206
The IGT changes for validating the histogram event and reading the
histogram is also pushed for review at
https://patchwork.freedesktop.org/series/135789/
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (10):
drm/crtc: Add
Add drm-crtc property for histogram and for the properties added add
corresponding get/set_property.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_atomic_state_helper.c | 6 +
drivers/gpu/drm/drm_atomic_uapi.c | 17 +
drivers/gpu/drm/drm_crtc.c
Add the register/bit definitions for global histogram.
v2: Intended the register contents, removed unused regs (Jani)
Bspec: 4270
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
.../drm/i915/display/intel_histogram_regs.h | 48 +++
1 file changed, 48 insertions
)
v5: IET LUT pgm follow the seq in spec and removed change to TC at end
(Suraj)
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_display_types.h| 2 +
.../gpu/drm/i915/display/intel_histogram.c
the patch series
v6: optimize wite_iet() (Suraj)
Bspec: 68895
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_histogram.c| 105 +-
.../drm/i915/display/intel_histogram_regs.h | 25 +
2 files changed, 103 insertions(+), 27 deletions(-)
diff --git a
Histogram added as part of i915/display driver. Adding the same for xe
as well.
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index
Enable pipe dithering while enabling histogram to overcome some
atrifacts seen on the screen.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
b/drivers
Check for any updates on drm_crtc property histogram_enable and
histogram_iet_updated and call/act accordingly to update histogram or
update the image enhancement LUT data API defined in i915 histogram.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_atomic.c | 1
er held in data_ptr.
The same element data_ptr in teh struct drm_histogram when writing the
image enahnced data from user to KMD holds the address to pixel factor.
v2: Added blob description in commit message (Dmitry)
Signed-off-by: Arun R Murthy
---
include/drm/drm_crtc.h
Check for any updates on drm_crtc property histogram_enable and
histogram_iet_updated and call/act accordingly to update histogram or
update the image enhancement LUT data API defined in i915 histogram.
v2: corrected the FORTIFY_SOURCE error
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm
?commit_id=270808ca7c8be48513553d95b4a47541f5d40206
The IGT changes for validating the histogram event and reading the
histogram is also pushed for review at
https://patchwork.freedesktop.org/series/135789/
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (10):
drm/crtc: Add
)
v5: IET LUT pgm follow the seq in spec and removed change to TC at end
(Suraj)
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/Makefile | 1 +
.../drm/i915/display/intel_display_types.h| 2 +
.../gpu/drm/i915/display/intel_histogram.c
Add the register/bit definitions for global histogram.
v2: Intended the register contents, removed unused regs (Jani)
Bspec: 4270
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
.../drm/i915/display/intel_histogram_regs.h | 48 +++
1 file changed, 48 insertions
Histogram added as part of i915/display driver. Adding the same for xe
as well.
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/xe/Makefile | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index
Guardband Delay Interrupt counter = 0
(Suraj)
v3: updated wa version for display 13 and 14
Wa: 14014889975
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_histogram.c | 14 ++
.../gpu/drm/i915/display/intel_histogram_regs.h
ani)
v3: Replaced drm_i915_private with intel_display (Suraj)
Refactored the histogram read code (Jani)
v4: Rebased after addressing comments on patch 1
v5: removed the retry logic and moved to patch7 (Jani)
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/disp
the patch series
v6: optimize wite_iet() (Suraj)
Bspec: 68895
Signed-off-by: Arun R Murthy
Reviewed-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_histogram.c| 105 +-
.../drm/i915/display/intel_histogram_regs.h | 25 +
2 files changed, 103 insertions(+), 27
Check for any updates on drm_crtc property histogram_enable and
histogram_iet_updated and call/act accordingly to update histogram or
update the image enhancement LUT data API defined in i915 histogram.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_atomic.c | 1
Add drm-crtc property for histogram and for the properties added add
corresponding get/set_property.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_atomic_state_helper.c | 6 ++
drivers/gpu/drm/drm_atomic_uapi.c | 17 +
drivers/gpu/drm/drm_crtc.c| 84
Enable pipe dithering while enabling histogram to overcome some
atrifacts seen on the screen.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/intel_histogram.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_histogram.c
b/drivers
han the size of histogram
data.
Signed-off-by: Arun R Murthy
---
include/drm/drm_crtc.h | 51 +
include/uapi/drm/drm_mode.h | 24 +
2 files changed, 75 insertions(+)
diff --git a/include/drm/drm_crtc.h b/include/drm/drm_crtc.h
index 8b48a1974
Add new plane->funcs format_mod_supported_async (Ville)
Arun R Murthy (3):
drm/plane: Add new plane property IN_FORMATS_ASYNC
drm/plane: Expose function to create format/modifier blob
drm/i915/display: Populate list of async supported formats/modifiers
drivers/gpu/drm/drm_mode_c
)
v3: Add new function pointer for async (Ville)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu/drm/drm_plane.c | 6 ++
include/drm/drm_mode_config.h | 6 ++
include/drm/drm_plane.h | 20
4 files
Expose drm plane function to create formats/modifiers blob. This
function can be used to expose list of supported formats/modifiers for
sync/async flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_plane.c | 44 +---
include/drm/drm_plane.h
.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_plane.c | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index
4f35eec2b7770fcc90c3e07a9068b31c0563a4c0
Populate the list of formats/modifiers supported by async flip. Register
a async property and expose the same to user through blob.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 51 ++
1 file changed, 51 insertions(+)
diff --git a
Add driver specific function definition for the plane->funcs
format_mod_supported_async to check if the provided format/modifier is
supported for asynchronous flip.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 62 --
1 file chan
Hook up the newly added plane function pointer
format_mod_supported_async to populate the modifiers/formats supported
by asynchronous flips.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 56 --
1 file changed, 41 insertions(+), 15
create_in_formats creates the list of supported format/modifiers for
synchronous flips, modify the same function so as to take the
format_mod_supported as argument and create list of format/modifier for
async as well.
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_plane.c | 40
)
v3: Add new function pointer for async (Ville)
Signed-off-by: Arun R Murthy
---
drivers/gpu/drm/drm_mode_config.c | 7 +++
drivers/gpu/drm/drm_plane.c | 6 ++
include/drm/drm_mode_config.h | 6 ++
include/drm/drm_plane.h | 20
4 files
s drm
core changes reviewed the i915 driver changes utilizing this histogram
and IET LUT properties will be floated.
Test-with: 20240705091333.328322-1-mohammed.thasl...@intel.com
Arun R Murthy (10):
drm/crtc: Add histogram properties
drm/crtc: Expose API to create drm crtc property for histogram
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