On 05/31/2017 01:37 PM, Boris Brezillon wrote:
Hi Archit,
Le Wed, 31 May 2017 13:31:16 +0530,
Archit Taneja a écrit :
Hi Boris,
On 05/31/2017 11:56 AM, Boris Brezillon wrote:
Hi Philippe,
Le Tue, 30 May 2017 16:55:42 +,
Philippe CORNU a écrit :
Hi Eric,
I took your patch for the
Hi,
On 06/02/2017 05:34 PM, Boris Brezillon wrote:
Document the bindings used for the Cadence DSI bridge.
Signed-off-by: Boris Brezillon
---
.../bindings/display/bridge/cdns,dsi.txt | 55 ++
1 file changed, 55 insertions(+)
create mode 100644
Documentation/devi
On 6/2/2017 5:34 PM, Boris Brezillon wrote:
Add a driver for Cadence DPI -> DSI bridge.
Signed-off-by: Boris Brezillon
---
Changes in v2:
- rebase on v4.12-rc1 and adapt to driver to the drm_bridge API changes
- return the correct error when devm_clk_get(sysclk) fails
- add missing depends on
On 05/30/2017 03:59 PM, Philipp Zabel wrote:
Hi Archit,
On Tue, 2017-05-30 at 15:54 +0530, Archit Taneja wrote:
Hi,
On 05/25/2017 07:49 PM, Jose Abreu wrote:
Now that we have a callback to check if bridge supports a given mode
we can use it in Synopsys Designware HDMI bridge so that we
nholt
Acked-by: Daniel Vetter (v1)
Reviewed-by: Boris Brezillon (v2)
Acked-by: Archit Taneja (v2)
---
New version of the first patch with build fixes. I've re-pushed to
get another round of kbuild test, but if it comes back clean, I'd like
to merge this one, the vc4 patches (unchanged
Hi,
When pushing to drm-misc-next, I got a minor merge conflict when dim tried
to rebuild drm-tip.
The reason for the conflict was because the following commit was present
in drm-tip but not in drm-misc:
https://cgit.freedesktop.org/drm-tip/commit/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_output.
On 06/06/2017 02:27 PM, Boris Brezillon wrote:
Hi Archit,
On Mon, 5 Jun 2017 21:06:20 +0530
Archit Taneja wrote:
Hi,
When pushing to drm-misc-next, I got a minor merge conflict when dim tried
to rebuild drm-tip.
The reason for the conflict was because the following commit was present
in
On 06/06/2017 11:22 PM, Eric Anholt wrote:
Maarten Lankhorst writes:
This fixes the following depmod error when building drm as a module:
depmod: ERROR: Found 6 modules in dependency cycles!
depmod: ERROR: Cycle detected: drm -> drm_kms_helper -> drm
Fixes: 13dfc0540a57 ("drm/bridge: Refact
On 06/06/2017 05:04 PM, Boris Brezillon wrote:
Attach the panel-bridge created by drm_panel_bridge_add() to the
parallel RGB encoder.
queued to drm-misc-next
Thanks,
Archit
Fixes: 96160a8071b2 ("drm/atmel-hlcdc: Replace the panel usage with
drm_panel_bridge.")
Signed-off-by: Boris Brezil
Hi Philippe, Rob,
On 06/08/2017 09:10 PM, Rob Herring wrote:
On Fri, Jun 02, 2017 at 04:37:11PM +0200, Philippe CORNU wrote:
This patch adds documentation of device tree bindings for the
Synopsys DesignWare MIPI DSI host DRM bridge driver.
Could you drop "DRM bridge driver" from the subject
Hi Phillipe,
Thanks for the clean ups. Some comments inline.
On 06/02/2017 08:07 PM, Philippe CORNU wrote:
Add a Synopsys Designware MIPI DSI host DRM bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
Signed-off-by: Philippe CORNU
---
drivers/g
On 10/22/2016 12:13 AM, Russell King - ARM Linux wrote:
> On Thu, Oct 20, 2016 at 04:56:44PM +0530, Archit Taneja wrote:
>>
>>
>> On 10/20/2016 02:45 PM, Russell King - ARM Linux wrote:
>>> On Thu, Oct 20, 2016 at 02:38:25PM +0530, Archit Taneja wrote:
>>
On 10/21/2016 11:39 PM, Russell King - ARM Linux wrote:
> On Thu, Oct 20, 2016 at 04:56:44PM +0530, Archit Taneja wrote:
>> 3) Rough conversion to bridge:
>
> So I thought I might give this a try, and see what's needed to complete
> the patch, but...
>
> I thought w
On 10/22/2016 03:25 PM, Russell King - ARM Linux wrote:
> On Fri, Oct 21, 2016 at 09:04:39PM +0200, Jean-Francois Moine wrote:
>> On Wed, Oct 19, 2016 at 12:19:30PM +0300, Laurent Pinchart wrote:
>> (sorry, I lost your original mail)
>> DRM bridges indeed don't create encoders. That
.
Thanks,
Archit
>
> v2: Drop the BIT()
>
> Cc: Rob Clark
> Cc: Jilai Wang
> Cc: Archit Taneja
> Signed-off-by: Ville Syrjälä
> Reviewed-by: Rob Clark
> ---
> drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 14 +-
> 1 file changed, 5 inserti
On 10/24/2016 03:45 PM, Ville Syrjälä wrote:
> On Mon, Oct 24, 2016 at 03:33:18PM +0530, Archit Taneja wrote:
>> Hi Ville,
>>
>> On 10/22/2016 12:52 AM, ville.syrjala at linux.intel.com wrote:
>>> From: Ville Syrjälä
>>>
>>> The global mod
On 10/24/2016 03:55 PM, Ville Syrjälä wrote:
> On Mon, Oct 24, 2016 at 03:52:09PM +0530, Archit Taneja wrote:
>>
>>
>> On 10/24/2016 03:45 PM, Ville Syrjälä wrote:
>>> On Mon, Oct 24, 2016 at 03:33:18PM +0530, Archit Taneja wrote:
>>>>
Hi,
On 10/17/2016 10:03 PM, Marek Vasut wrote:
> Add driver for the ITE IT6251 LVDS-to-eDP bridge.
>
> Signed-off-by: Marek Vasut
> Cc: Daniel Vetter
> Cc: Sean Cross
> ---
> drivers/gpu/drm/bridge/Kconfig | 9 +
> drivers/gpu/drm/bridge/Makefile | 1 +
> drivers/gpu/drm/bridge/it
clocks enabled. The other reason is a
deadlock caused by calling drm_hpd_helper_irq_event in a context
that might already hold drm_device's mode_config.mutex.
Archit Taneja (2):
drm/msm/dsi: Queue HPD helper work in attach/detach callbacks
drm/msm: Don't provide 'is_enabl
work instead.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index f05ed0e..6f24002 100644
--- a/drivers/gpu/drm/ms
terface clocks/power domains beforehand.
We remove the is_enabled clk_ops from the PLL clocks for now since they
aren't mandatory. This needs to be revisited, since bootloaders can enable
display, the enable count maintained by clock framework wouldn't work in
such cases.
Cc: Stephen Boyd
Hi,
On 10/20/2016 09:13 AM, Chen-Yu Tsai wrote:
> Some rgb-to-vga bridges have an enable GPIO, either directly tied to
> an enable pin on the bridge IC, or indirectly controlling a power
> switch.
>
> Add support for it.
Does the bridge on your platform have an active/passive DAC, or is it a
smar
On 10/20/2016 09:13 AM, Chen-Yu Tsai wrote:
> The Hummingbird A31 board has a RGB-to-VGA bridge which converts RGB
> output from the LCD interface to VGA signals.
>
> Enable this part of the display pipeline.
I couldn't find the enable-gpios binding for the bridge that you
introduced in the prev
Hi Andrzej,
On 10/10/2016 01:09 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
> It is controlled via I2C bus. Its interaction with other
> devices in video pipeline is performed mainly on HW level.
> The only interaction it does on device driver level is
> f
On 10/26/2016 01:58 AM, Stephen Boyd wrote:
> On 10/25, Archit Taneja wrote:
>> The DSI/HDMI PLLs in MSM require resources like interface clocks, power
>> domains to be enabled before we can access their registers.
>>
>> The clock framework doesn't have a mech
On 10/07/2016 12:32 PM, Andrzej Hajda wrote:
> This header adds definitions specific to MHL protocol.
queued to drm-misc.
Thanks,
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 10/07/2016 12:32 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0. It is controlled
> via I2C bus.
queued to drm-misc.
Thanks,
Archit
>
> Signed-off-by: Andrzej Hajda
> Acked-by: Rob Herring
> ---
> .../bindings/video/bridge/sil-sii8620.txt |
On 10/10/2016 01:09 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
> It is controlled via I2C bus. Its interaction with other
> devices in video pipeline is performed mainly on HW level.
> The only interaction it does on device driver level is
> filtering-ou
terface clocks/power domains beforehand.
We set the CLK_IGNORE_UNUSED flag for PLL clocks for now. This needs to be
revisited, since bootloaders can enable display, and we would want to
disable the PLL clocks if there isn't a display driver using them.
Cc: Stephen Boyd
Signed-off-by: Archit Taneja
On 10/25/2016 02:29 PM, Chen-Yu Tsai wrote:
> On Tue, Oct 25, 2016 at 4:09 PM, Archit Taneja
> wrote:
>> Hi,
>>
>> On 10/20/2016 09:13 AM, Chen-Yu Tsai wrote:
>>>
>>> Some rgb-to-vga bridges have an enable GPIO, either directly tied to
>>
On 09/01/2016 02:00 AM, Laurent Pinchart wrote:
> Hi Archit,
>
> On Wednesday 31 Aug 2016 22:24:30 Archit Taneja wrote:
>> On 8/31/2016 9:23 PM, Laurent Pinchart wrote:
>>> On Wednesday 31 Aug 2016 16:22:09 Archit Taneja wrote:
>>>> ADV7533 requires supply
.
Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
drm/msm/hdmi: Clean up HDMI gpio DT bindings
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support
.../devicetree/bindings/display/msm/hdmi.txt | 11 +--
arch/arm/boot/dts/qcom
;t a panel node available.
While we're at it, use of_graph_get_endpoint_by_regs instead of
of_graph_get_next_endpoint to make it more explicit that the LVDS
output is at port 0.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 ---
1 file changed,
d a missing lpm gpio used on some platforms.
Make the necessary changes in the driver to incorporate these changes.
There hasn't been any upstream DT that uses the HDMI bindings, so it's
okay to change and move around these properties.
Cc: Rob Herring
Cc: devicetree at vger.kernel.or
vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +
1 file changed, 91 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 74a9b6c..b688fb6 100644
--- a/arch/arm/boot/dts/qcom
g
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2eeb090..3d
Hi,
On 9/2/2016 2:13 AM, Sergei Shtylyov wrote:
> The Renesas Wheat board has 2 ADV7513 chips on the same I2C bus, however
> the ADV751x driver only supports 1 chip as it tries to assign the packet/
> EDID/CEC memory I2C devices to the fixed I2C addresses. Assign these I2C
> addresses at the fi
On 8/31/2016 9:39 PM, Daniel Vetter wrote:
> We don't want to burry the bridge structures kerneldoc in drm_crtc.h.
>
> Cc: Archit Taneja
Reviewed-by: Archit Taneja
> Signed-off-by: Daniel Vetter
> ---
> Documentation/gpu/drm-kms-helpers.rst | 7 ++
> dr
On 8/31/2016 9:39 PM, Daniel Vetter wrote:
> Big thing is untangling and carefully documenting the different uapi
> types of planes. I also sprinkled a few more cross references around
> to make this easier to discover.
>
> As usual, remove the kerneldoc for internal functions which are not
> exp
Hi,
On 8/30/2016 5:11 AM, John Stultz wrote:
> From: Andy Green
>
> Set the initial audio packet settings to allow the audio
> driver to work.
>
> Cc: David Airlie
> Cc: Archit Taneja
> Cc: Laurent Pinchart
> Cc: Wolfram Sang
> Cc: Srinivas Kandagatla
> C
On 09/06/2016 01:13 AM, Sergei Shtylyov wrote:
> The Renesas Wheat board has 2 ADV7513 chips on the same I2C bus, however
> the ADV751x driver only supports 1 chip as it tries to assign the packet/
> EDID/CEC memory I2C devices to the fixed I2C addresses. Assign these I2C
> addresses at the fi
Hi,
On 09/08/2016 05:47 PM, Maxime Ripard wrote:
> Some boards have an entirely passive RGB to VGA bridge, based on either
> DACs or resistor ladders.
>
> Those might or might not have an i2c bus routed to the VGA connector in
> order to access the screen EDIDs.
>
> Add a bridge that doesn't do an
Hi,
On 09/08/2016 05:02 AM, John Stultz wrote:
> Sort of tagging on to Archit's patchset here.
>
> Adds the core gpu, and dsi nodes for the apq8064 needed
> to get graphics working on the nexus7 and other devices.
>
> Feedback would be greatly appreciated!
>
> Cc: Arc
ne.c:84:5: warning: no previous
> prototype for 'mdp4_plane_set_property' [-Wmissing-prototypes]
>
> In fact, these functions are only used in the file in which they are
> declared and don't need a declaration, but can be made static.
> So this patch marks these functions wit
On 09/07/2016 04:53 PM, Sean Paul wrote:
> In order to reduce the time required to turn on the panel, this patch
> makes 2 assumptions:
> 1- In detect(): if there's a panel, we're connected.
> 2- In get_modes(): if there's a panel, let the panel driver decide if
> it should prepare/unprepare
On 9/12/2016 6:49 PM, Rob Herring wrote:
> On Thu, Sep 01, 2016 at 07:06:52PM +0530, Archit Taneja wrote:
>> Make the following changes in the HDMI gpio bindings:
>>
>> - Use "-gpios" as the suffix for all the gpio names
>> - Move all the gpios to optiona
On 9/13/2016 12:42 PM, Archit Taneja wrote:
>
>
> On 9/12/2016 6:49 PM, Rob Herring wrote:
>> On Thu, Sep 01, 2016 at 07:06:52PM +0530, Archit Taneja wrote:
>>> Make the following changes in the HDMI gpio bindings:
>>>
>>> - Use "-gpios" as
on HDMI gpio bindings as suggested by Rob H.
Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
drm/msm/hdmi: Clean up HDMI gpio DT bindings
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support
.../devicetree/bindings/display
;t a panel node available.
While we're at it, use of_graph_get_endpoint_by_regs instead of
of_graph_get_next_endpoint to make it more explicit that the LVDS
output is at port 0.
Tested-by: John Stultz
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 +++
#x27;s
okay to change and move around these properties.
Cc: Rob Herring
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja
---
v3:
- Removed HDMI DDC clk/data gpios.
.../devicetree/bindings/display/msm/hdmi.txt| 9 -
drivers/gpu/drm/msm/hdmi/h
vger.kernel.org
Tested-by: John Stultz
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +
1 file changed, 91 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 74a9b6c..b688fb6 100644
g
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2eeb090..3d
On 9/14/2016 3:14 AM, Stephen Boyd wrote:
> On 09/13/2016 08:21 AM, Archit Taneja wrote:
>> APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS
>> and 2 DSI outputs.
>>
>> Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display
&
On 09/19/2016 06:43 PM, Daniel Vetter wrote:
> On Fri, Sep 02, 2016 at 03:00:38PM +0530, Archit Taneja wrote:
>>
>>
>> On 8/31/2016 9:39 PM, Daniel Vetter wrote:
>>> Big thing is untangling and carefully documenting the different uapi
>>> types of pl
sprinkle at least some warning over them.
>
> Fixes: 532b36712ddf ("drm/doc: Polish for drm_plane.[hc]")
> Cc: Archit Taneja
> Cc: Sean Paul
> Signed-off-by: Daniel Vetter
Reviewed-by: Archit Taneja
> ---
> include/drm/drm_blend.h | 3 +++
> include/drm/d
: Archit Taneja
---
v2:
- Use regulator_bulk_* API to configure regulators as suggested by Laurent.
- Set up regulators for ADV7511 too.
drivers/gpu/drm/bridge/adv7511/adv7511.h | 4 ++
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 85 +---
2 files changed, 80
On 09/17/2016 04:47 AM, John Stultz wrote:
> This patch adds support to Audio for both adv7511 and adv7533
> bridge chips.
>
> This patch was originally from [1] by Lars-Peter Clausen
> and was adapted by Archit Taneja and
> Srinivas Kandagatla .
>
> Then I heavily rew
On 09/17/2016 04:47 AM, John Stultz wrote:
> From: Srinivas Kandagatla
>
> This patch enables the Audio Data and Clock pads to the adv7533 bridge.
> Without this patch audio can not be played.
>
> Cc: David Airlie
> Cc: Archit Taneja
> Cc: Laurent Pinchart
> Cc: W
Hi,
On 9/14/2016 2:03 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
> It is controlled via I2C bus. Its interaction with other
> devices in video pipeline is performed mainly on HW level.
> The only interaction it does on device driver level is
> filtering-o
On 9/25/2016 11:05 PM, Laurent Pinchart wrote:
> Hi Archit,
>
> Thank you for the patch.
>
> On Friday 23 Sep 2016 14:50:28 Archit Taneja wrote:
>> Maintain a table of regulator names expect by ADV7511 and ADV7533.
>> Use regulator_bulk_* api to configure these.
>
Hi Peter,
On 09/26/2016 01:57 PM, Peter Senna Tschudin wrote:
> Patch 1/4 is already on linux-next, but what about this one? Ping?
I'd posted some queries a couple of times which you didn't answer to.
Could you please respond to them before we try to get this merged?
Archit
>
> On Tuesday, Augu
On 09/26/2016 03:06 PM, Andrzej Hajda wrote:
> Hi,
>
> Thanks for review.
>
>
> On 25.09.2016 19:01, Archit Taneja wrote:
>> Hi,
>>
>> On 9/14/2016 2:03 PM, Andrzej Hajda wrote:
>>> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
>>&
On 09/26/2016 05:01 PM, Archit Taneja wrote:
>
>
> On 09/26/2016 03:06 PM, Andrzej Hajda wrote:
>> Hi,
>>
>> Thanks for review.
>>
>>
>> On 25.09.2016 19:01, Archit Taneja wrote:
>>> Hi,
>>>
>>> On 9/14/2016 2:03 PM, Andrzej
Hi,
Some comments.
On 08/09/2016 10:11 PM, Peter Senna Tschudin wrote:
> Add a driver that create a drm_bridge and a drm_connector for the LVDS
> to DP++ display bridge of the GE B850v3.
>
> There are two physical bridges on the video signal pipeline: a
> STDP4028(LVDS to DP) and a STDP2690(DP to
On 09/26/2016 05:24 PM, Peter Senna Tschudin wrote:
>
> On Monday, September 26, 2016 12:29 CEST, Archit Taneja codeaurora.org> wrote:
>
>> Hi,
>>
>> Some comments.
>
> Thank you for the review!
>
>>
>> On 08/09/2016 10:11 PM, Peter S
Hi,
On 09/26/2016 02:28 PM, Peter Senna Tschudin wrote:
> Hi Archit,
>
> On Monday, September 26, 2016 10:31 CEST, Archit Taneja codeaurora.org> wrote:
>
>> Hi Peter,
>>
>> On 09/26/2016 01:57 PM, Peter Senna Tschudin wrote:
>>> Patch 1/4 is already on
Hi Andrezj,
On 09/26/2016 07:10 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
> It is controlled via I2C bus. Its interaction with other
> devices in video pipeline is performed mainly on HW level.
> The only interaction it does on device driver level is
> f
ldoc tends to be long).
>
> Also some minor drive-by polish where it makes sense, I read a lot
> of docs ...
>
> Cc: Archit Taneja
> Cc: Jani Nikula
> Cc: Chris Wilson
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_bridge.c | 27 +++
Hi Sekhar,
On 1/2/2017 4:38 PM, Sekhar Nori wrote:
> Hi Archit,
>
> On Wednesday 14 December 2016 10:35 AM, Archit Taneja wrote:
>>
>>
>> On 12/13/2016 03:39 PM, Bartosz Golaszewski wrote:
>>> THS8135 is a configurable video DAC, but no configuration is ac
gt; Video output
>
> Cc: Martyn Welch
> Cc: Martin Donnelly
> Cc: Daniel Vetter
> Cc: Enric Balletbo i Serra
> Cc: Philipp Zabel
> Cc: Rob Herring
> Cc: Fabio Estevam
> CC: David Airlie
> CC: Thierry Reding
> CC: Thierry Reding
> CC: Archit Taneja
> Re
Add DSI PHY 14nm domains for DSI PHY common, DSI PHY lane and
DSI PLL registers. Used in MSM8996.
Signed-off-by: Archit Taneja
---
rnndb/dsi/dsi.xml | 128 ++
1 file changed, 128 insertions(+)
diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi
(single DSI)
on DB820c.
Archit Taneja (6):
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
drm/msm/dsi: Add 8x96 info in dsi_cfg
drm/msm/dsi: Add a PHY op that initializes version specific stuff
drm/msm/dsi: Reset both PHYs before clock operation for dual
ng the DSI device
even if it doesn't have a bridge/panel connected to it.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi
rnings.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 25 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 63436d8..a5d75c9 10064
Create an init() op for dsi_phy which sets up things specific to
a given DSI PHY.
The dsi_phy driver probe expects every DSI version to get a
"dsi_phy_regulator" mmio base. This isn't the case for 8x96.
Creating an init() op will allow us to accommodate such
differences.
Signed
From: Hai Li
For some new types of DSI PHY, more settings depend on
use cases controlled by DSI manager. This change allows
DSI manager to setup PHY with a use case.
Signed-off-by: Hai Li
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 8 +++
drivers/gpu/drm/msm
From: Hai Li
The DSI host is required to configure more timings calculated
in PHY. By introducing a shared structure, this change allows
more timing information passed from PHY to host.
Signed-off-by: Hai Li
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 13
From: Hai Li
Since DSI PHY has been a separate platform device, it should not
depend on the resources in host to be functional. This change is
to trigger PHY operations in manager, instead of host, so that
host and PHY can be completely separated.
Signed-off-by: Hai Li
Signed-off-by: Archit
From: Hai Li
The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different
set of calculations for computing D-PHY timing params. Create a
timing_calc_v2 func for the newer v2 PHYs.
Signed-off-by: Hai Li
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 117
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 252 ++
1 file changed, 252 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b/drivers/gpu/drm/msm/dsi/dsi.xml.h
index 4958594..234b3b3 100644
--- a/drivers/gpu/drm/msm/dsi
up
by Archit Taneja ]
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c| 25 +
drivers/gpu/drm/msm/dsi/dsi_manager.c | 32 +---
3 files changed, 43 insertions(+), 15 dele
ephen Boyd
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/Kconfig|7 +
drivers/gpu/drm/msm/Makefile |2 +
drivers/gpu/drm/msm/dsi/dsi.h |8 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c |2 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h |
On 01/05/2017 01:01 PM, Sean Paul wrote:
> On Fri, Dec 30, 2016 at 4:57 AM, Marek Szyprowski
> wrote:
>> Analogix_dp_bind() can be called from component framework, which doesn't
>> guarantee proper runtime PM state of the device during bind operation,
>> so ensure that device is runtime active b
set the encoder's bridge. That's now managed by the bridge
API.
Cc: Laurent Pinchart
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/d
n the binding docs.
- Update the driver to manage regulators for both ADV7511 and ADV7533.
- Have separate supply entries for AVDD, DVDD, PVDD, A2VDD pins.
- Use regulator_bulk_* API to configure regulators.
Archit Taneja (2):
dt-bindings: drm/bridge: adv7511: Add regulator bindings
drm/bridge: ad
Add the regulator supply properties needed by ADV7511 and ADV7533.
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Signed-off-by: Archit Taneja
---
v5:
- Bring back supplies for individual pins
- In v2, we had a v3p3-supply for DVDD_3V on ADV7511 and V3P3 pin
on ADV7533. We don't r
Maintain a table of regulator names expected by ADV7511 and ADV7533.
Use regulator_bulk_* api to configure these.
Initialize and enable the regulators during probe itself. Controlling
these dynamically is left for later.
Reviewed-by: Laurent Pinchart
Signed-off-by: Archit Taneja
---
drivers
would be appreciated!
Tested on DB410c on 4.10-rc3. Works well for me.
Thanks,
Archit
>
> thanks
> -john
>
> New in v3:
> * Addressed naming improvements and drm_kms_helper_hotplug_event
> usage corrections as suggested by Laurent.
>
> Cc: David Airlie
> Cc: Arc
e the
DSI mode flags and set the corresponding mode of operation.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi_manager.c | 39 ++---
drivers/
e that the
encoder is configured only in video mode. Later, the same encoder
would be usable in both modes.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.c | 14 +-
drivers/gpu/drm/msm/dsi/dsi.h | 4 ++--
drivers/gpu/drm/msm/dsi/dsi_manage
Rename the mdp5_encoder_* ops for active displays to
mdp5_vid_encoder_* ops.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 31 ++---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 3 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 4
previously created LM # of CRTCs, which was a bit
unnecessary.
Changes in v2:
- Rebase over bridge API updates going in 4.11
- Fix issues seen when calling kms func's set_encoder_mode for
devices where the control/primary device is of the type
mipi_dsi_device
Archit Taneja (6):
drm/msm: Cons
Count can't be non-zero. Changing to uint will also prevent future
warnings.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
b/drivers/gpu/drm/msm/mdp
TCs we
have.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 39 -
1 file changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
index 9794cad13
rface type. It can use the
the kms func op set_encoder_mode to change the mode of operation, which
in turn would configure the interface type for the INTF.
In mdp5_cmd_encoder.c, we remove the redundant code, and make the commmand
mode funcs as helpers that are used in mdp5_encoder.c
Signed-off-
d the fast path patch in the end as suggested by Maarten.
- Minor cleanups.
Archit Taneja (8):
drm/msm/mdp5: cfg: Add pipe_cursor block
drm/msm/mdp5: Prepare CRTC/LM for empty stages
drm/msm/mdp5: Use plane helpers to configure src/dst rectangles
drm/msm/mdp5: Configure COLOR3_OUT propagation
has to be staged at the topmost
blender of the LM, which can result in empty stages in between 2) In
the future, when we support multiple LMs per CRTC. We could have stages
which don't have any pipe assigned to them.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 2
#x27;t an update
on the crtc (which would de-stage the plane), we would still see the
plane in its last 'visible' configuration.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 57 ---
drivers/gpu/drm/msm/msm_atomic.c
Define the block in advance so that the generated mdp5.xml.h doesn't
break build.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
the maximum stage #
present on the HW.
- Create drm_crtc_funcs that doesn't try to implement cursors using the
older LM cursor HW.
- Pass drm_plane_type in mdp5_plane_init instead of a bool telling
whether plane is primary or not.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp
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