add bridge support. Philippe had posted a patch for adding bridges
to ltdc before:
https://patchwork.kernel.org/patch/9724835/
He can now redo his patch over Eric's panel-bridge patch-set.
Thanks,
Archit
Thanks,
Boris
~160 lines have been removed from ltdc.c thanks to your panel-bridge cod
On 05/31/2017 01:37 PM, Boris Brezillon wrote:
Hi Archit,
Le Wed, 31 May 2017 13:31:16 +0530,
Archit Taneja a écrit :
Hi Boris,
On 05/31/2017 11:56 AM, Boris Brezillon wrote:
Hi Philippe,
Le Tue, 30 May 2017 16:55:42 +,
Philippe CORNU a écrit :
Hi Eric,
I took your patch for the
o support the SDI inputs.
+ Port 0 should be connected to a DPI encoder output.
The output of the DSI bridge may be another bridge, which could be i2c
controlled. In that case, it won't be a child of the DSI bridge. For
such scenarios, we might want to define an output port for the bridge.
msecs_to_jiffies(1000));
+
+ sts = readl(dsi->regs + DIRECT_CMD_STS);
+ writel(wait, dsi->regs + DIRECT_CMD_STS_CLR);
+ writel(0, dsi->regs + DIRECT_CMD_STS_CTL);
+
+ writel(readl(dsi->regs + MCTL_MAIN_DATA_CTL) & ~ctl,
+
On 05/30/2017 03:59 PM, Philipp Zabel wrote:
Hi Archit,
On Tue, 2017-05-30 at 15:54 +0530, Archit Taneja wrote:
Hi,
On 05/25/2017 07:49 PM, Jose Abreu wrote:
Now that we have a callback to check if bridge supports a given mode
we can use it in Synopsys Designware HDMI bridge so that we
nholt
Acked-by: Daniel Vetter (v1)
Reviewed-by: Boris Brezillon (v2)
Acked-by: Archit Taneja (v2)
---
New version of the first patch with build fixes. I've re-pushed to
get another round of kbuild test, but if it comes back clean, I'd like
to merge this one, the vc4 patches (unchanged
/atmel_hlcdc_output.c?id=6bee9b78a7a5ea257b24d93974538938c82b1169
I fixed the conflict such that drm-tip is rebuit successfully. I'd
however like if Eric and Boris could have a look at atmel_hlcdc_output.c
to check if things are okay.
Thanks,
Archit
On 05/12/2017 12:01 AM, Eric Anholt wrote:
This cuts 135 lin
On 06/06/2017 02:27 PM, Boris Brezillon wrote:
Hi Archit,
On Mon, 5 Jun 2017 21:06:20 +0530
Archit Taneja wrote:
Hi,
When pushing to drm-misc-next, I got a minor merge conflict when dim tried
to rebuild drm-tip.
The reason for the conflict was because the following commit was present
in
patch.
I can queue it to drm-misc-next if no one else has any comments on it
in the next few hours or so.
I'll make sure I check with 'make module_install' before pushing, I didn't
know depmod wasn't called otherwise.
Thanks,
Archit
--
Qualcomm Innovation Center, Inc. i
On 06/06/2017 05:04 PM, Boris Brezillon wrote:
Attach the panel-bridge created by drm_panel_bridge_add() to the
parallel RGB encoder.
queued to drm-misc-next
Thanks,
Archit
Fixes: 96160a8071b2 ("drm/atmel-hlcdc: Replace the panel usage with
drm_panel_bridge.")
Signed-off
oC, the
bindings "rockchip,rk3288-dw-hdmi" or "renesas,r8a7795-dw-hdmi" are used,
and they don't have a separate PHY DT node.
I wasn't sure whether this is the right way to proceed or not for such IPs.
Some advice would help us here.
Thanks,
Archit
+
+- resets:
const struct dw_mipi_dsi_plat_data *plat_data)
+{
+ struct dw_mipi_dsi *dsi;
+ int ret;
+
+ dsi = __dw_mipi_dsi_probe(pdev, plat_data);
+ if (IS_ERR(dsi))
+ return PTR_ERR(dsi);
+
+ ret = drm_bridge_attach(encoder, &dsi->bridge, NULL);
On 10/22/2016 12:13 AM, Russell King - ARM Linux wrote:
> On Thu, Oct 20, 2016 at 04:56:44PM +0530, Archit Taneja wrote:
>>
>>
>> On 10/20/2016 02:45 PM, Russell King - ARM Linux wrote:
>>> On Thu, Oct 20, 2016 at 02:38:25PM +0530, Archit Taneja wrote:
>>
On 10/21/2016 11:39 PM, Russell King - ARM Linux wrote:
> On Thu, Oct 20, 2016 at 04:56:44PM +0530, Archit Taneja wrote:
>> 3) Rough conversion to bridge:
>
> So I thought I might give this a try, and see what's needed to complete
> the patch, but...
>
> I thought w
return ret;
>
> config = &priv->bridge.encoder->dev->mode_config;
>
> mutex_lock(&config->mutex);
> list_for_each_entry(connector, &config->connector_list, head) {
> if (priv->bridge.encoder == connector-
f (!is_power_of_2(val & DRM_ROTATE_MASK))
+ if (!is_power_of_2(val & (DRM_ROTATE_MASK | DRM_REFLECT_MASK)))
return -EINVAL;
state->rotation = val;
} else if (property == plane->zpos_property) {
Otherwise, the patches look fine to me
On 10/24/2016 03:45 PM, Ville Syrjälä wrote:
> On Mon, Oct 24, 2016 at 03:33:18PM +0530, Archit Taneja wrote:
>> Hi Ville,
>>
>> On 10/22/2016 12:52 AM, ville.syrjala at linux.intel.com wrote:
>>> From: Ville Syrjälä
>>>
>>> The global mod
On 10/24/2016 03:55 PM, Ville Syrjälä wrote:
> On Mon, Oct 24, 2016 at 03:52:09PM +0530, Archit Taneja wrote:
>>
>>
>> On 10/24/2016 03:45 PM, Ville Syrjälä wrote:
>>> On Mon, Oct 24, 2016 at 03:33:18PM +0530, Archit Taneja wrote:
>>>>
gt; + .reset = drm_atomic_helper_connector_reset,
> + .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
> + .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
> +};
> +
> +static int it6251_attach(struct drm_bridge *bridge)
&g
clocks enabled. The other reason is a
deadlock caused by calling drm_hpd_helper_irq_event in a context
that might already hold drm_device's mode_config.mutex.
Archit Taneja (2):
drm/msm/dsi: Queue HPD helper work in attach/detach callbacks
drm/msm: Don't provide 'is_enabl
work instead.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi_host.c
index f05ed0e..6f24002 100644
--- a/drivers/gpu/drm/ms
terface clocks/power domains beforehand.
We remove the is_enabled clk_ops from the PLL clocks for now since they
aren't mandatory. This needs to be revisited, since bootloaders can enable
display, the enable count maintained by clock framework wouldn't work in
such cases.
Cc: Stephen Boyd
DAC, or is it a
smarter encoder chip that is capable of doing more? If so, it might be
good to have a separate DT compatible string to it, like what's done
in the patch titled:
drm: bridge: vga-dac: Add adi,adv7123 compatible string
so that we can switch to a different driver later if nee
introduced in the previous patch. Is that intentional?
Thanks,
Archit
>
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 56
> +
> 1 file changed, 56 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun6i-a31-hum
elow.
If it looks okay to you, I'll go ahead and merge to drm-misc.
Thanks,
Archit
58c60
< @@ -0,0 +1,1563 @@
---
> @@ -0,0 +1,1565 @@
328c330
< +struct sii8620_mt_msg *msg)
---
> +struct sii8620_mt_msg *msg)
4
On 10/26/2016 01:58 AM, Stephen Boyd wrote:
> On 10/25, Archit Taneja wrote:
>> The DSI/HDMI PLLs in MSM require resources like interface clocks, power
>> domains to be enabled before we can access their registers.
>>
>> The clock framework doesn't have a mech
On 10/07/2016 12:32 PM, Andrzej Hajda wrote:
> This header adds definitions specific to MHL protocol.
queued to drm-misc.
Thanks,
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 10/07/2016 12:32 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0. It is controlled
> via I2C bus.
queued to drm-misc.
Thanks,
Archit
>
> Signed-off-by: Andrzej Hajda
> Acked-by: Rob Herring
> ---
> .../bindings/video/b
> filtering-out unsupported video modes, it exposes drm_bridge
> interface to perform this operation.
queued to drm-misc.
Thanks,
Archit
>
> Signed-off-by: Andrzej Hajda
> ---
> v5:
> - added static version of sii8620_write_seq_static,
> - use lowercase for i2c
terface clocks/power domains beforehand.
We set the CLK_IGNORE_UNUSED flag for PLL clocks for now. This needs to be
revisited, since bootloaders can enable display, and we would want to
disable the PLL clocks if there isn't a display driver using them.
Cc: Stephen Boyd
Signed-off-by: Archit Taneja
On 10/25/2016 02:29 PM, Chen-Yu Tsai wrote:
> On Tue, Oct 25, 2016 at 4:09 PM, Archit Taneja
> wrote:
>> Hi,
>>
>> On 10/20/2016 09:13 AM, Chen-Yu Tsai wrote:
>>>
>>> Some rgb-to-vga bridges have an enable GPIO, either directly tied to
>>
On 09/01/2016 02:00 AM, Laurent Pinchart wrote:
> Hi Archit,
>
> On Wednesday 31 Aug 2016 22:24:30 Archit Taneja wrote:
>> On 8/31/2016 9:23 PM, Laurent Pinchart wrote:
>>> On Wednesday 31 Aug 2016 16:22:09 Archit Taneja wrote:
>>>> ADV7533 requires supply
.
Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
drm/msm/hdmi: Clean up HDMI gpio DT bindings
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support
.../devicetree/bindings/display/msm/hdmi.txt | 11 +--
arch/arm/boot/dts/qcom
;t a panel node available.
While we're at it, use of_graph_get_endpoint_by_regs instead of
of_graph_get_next_endpoint to make it more explicit that the LVDS
output is at port 0.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 ---
1 file changed,
d a missing lpm gpio used on some platforms.
Make the necessary changes in the driver to incorporate these changes.
There hasn't been any upstream DT that uses the HDMI bindings, so it's
okay to change and move around these properties.
Cc: Rob Herring
Cc: devicetree at vger.kernel.or
vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +
1 file changed, 91 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 74a9b6c..b688fb6 100644
--- a/arch/arm/boot/dts/qcom
g
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2eeb090..3d
EG_CEC_I2C_ADDR,
> + main_i2c_addr - 2);
The adv7533.c part of the driver uses cec_i2c_addr to create a another
dummy i2c device for CEC. Could you update this patch to derive the
cec address from the main i2c address for the ADV7533 part too?
Thanks,
Archit
> +
>
On 8/31/2016 9:39 PM, Daniel Vetter wrote:
> We don't want to burry the bridge structures kerneldoc in drm_crtc.h.
>
> Cc: Archit Taneja
Reviewed-by: Archit Taneja
> Signed-off-by: Daniel Vetter
> ---
> Documentation/gpu/drm-kms-helpers.rst | 7 ++
> dr
you moved this down? I guess there is no harm, but people
might be printing plane type while debugging, and they'd assume
DRM_PLANE_TYPE_OVERLAY=0
Thanks,
Archit
> + /**
> + * @DRM_PLANE_TYPE_PRIMARY:
> + *
> + * Primary planes represent a "main" plane for
Hi,
On 8/30/2016 5:11 AM, John Stultz wrote:
> From: Andy Green
>
> Set the initial audio packet settings to allow the audio
> driver to work.
>
> Cc: David Airlie
> Cc: Archit Taneja
> Cc: Laurent Pinchart
> Cc: Wolfram Sang
> Cc: Srinivas Kandagatla
> C
esses at the fixed offsets (derived from the programming guide) from
> the main register map address instead...
Looks good now. Queued to topic/drm-misc after cleaning up the spacing
in the commit message.
Thanks,
Archit
>
> Signed-off-by: Sergei Shtylyov
>
> ---
> The p
> +{
> + struct dumb_vga *vga = drm_connector_to_dumb_vga(connector);
> +
> + return vga->bridge.encoder;
> +}
> +
> +static struct drm_connector_helper_funcs dumb_vga_con_helper_funcs = {
> + .get_modes = dumb_vga_get_modes,
> + .best_encoder = dumb_vga_best_encoder,
> +};
> +
> +static enum drm_connector_status
> +dumb_vga_connector_detect(struct drm_connector *connector, bool force)
> +{
> + struct dumb_vga *vga = drm_connector_to_dumb_vga(connector);
> +
> + /*
> + * Even if we have an I2C bus, we can't assume that the cable
> + * is disconnected if drm_probe_ddc. Some cables don't wire
s/if/in ?
> + * the DDC pins, or the I2C bus might be disfunctional.
s/disfunctional/not functional
Looks good otherwise.
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
Hi,
On 09/08/2016 05:02 AM, John Stultz wrote:
> Sort of tagging on to Archit's patchset here.
>
> Adds the core gpu, and dsi nodes for the apq8064 needed
> to get graphics working on the nexus7 and other devices.
>
> Feedback would be greatly appreciated!
>
> Cc: Arc
ne.c:84:5: warning: no previous
> prototype for 'mdp4_plane_set_property' [-Wmissing-prototypes]
>
> In fact, these functions are only used in the file in which they are
> declared and don't need a declaration, but can be made static.
> So this patch marks these functions wit
r as
> opposed to reading EDID. If a panel does need to read EDID, it should be
> responsible for ensuring it's in a state in which it can.
Looks fine to me. I'll queue it to drm-misc if there are no comments on
it in the next couple days.
Thanks,
Archit
>
> Signed-off-by: Se
On 9/12/2016 6:49 PM, Rob Herring wrote:
> On Thu, Sep 01, 2016 at 07:06:52PM +0530, Archit Taneja wrote:
>> Make the following changes in the HDMI gpio bindings:
>>
>> - Use "-gpios" as the suffix for all the gpio names
>> - Move all the gpios to optiona
On 9/13/2016 12:42 PM, Archit Taneja wrote:
>
>
> On 9/12/2016 6:49 PM, Rob Herring wrote:
>> On Thu, Sep 01, 2016 at 07:06:52PM +0530, Archit Taneja wrote:
>>> Make the following changes in the HDMI gpio bindings:
>>>
>>> - Use "-gpios" as
on HDMI gpio bindings as suggested by Rob H.
Archit Taneja (4):
drm/msm/mdp4: Fix issue with LCDC/LVDS port parsing
drm/msm/hdmi: Clean up HDMI gpio DT bindings
arm: dts: qcom: apq8064: Add display DT nodes
arm: dts: qcom: apq8064-ifc6410: Add HDMI support
.../devicetree/bindings/display
;t a panel node available.
While we're at it, use of_graph_get_endpoint_by_regs instead of
of_graph_get_next_endpoint to make it more explicit that the LVDS
output is at port 0.
Tested-by: John Stultz
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c | 23 +++
#x27;s
okay to change and move around these properties.
Cc: Rob Herring
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja
---
v3:
- Removed HDMI DDC clk/data gpios.
.../devicetree/bindings/display/msm/hdmi.txt| 9 -
drivers/gpu/drm/msm/hdmi/h
vger.kernel.org
Tested-by: John Stultz
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064.dtsi | 91 +
1 file changed, 91 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi
b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 74a9b6c..b688fb6 100644
g
Cc: devicetree at vger.kernel.org
Signed-off-by: Archit Taneja
---
arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 74 ++
1 file changed, 74 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2eeb090..3d
On 9/14/2016 3:14 AM, Stephen Boyd wrote:
> On 09/13/2016 08:21 AM, Archit Taneja wrote:
>> APQ8064 contains a MDP4 based display controller. It contains a HDMI, LVDS
>> and 2 DSI outputs.
>>
>> Add display DT nodes for MDP4, HDMI TX and HDMI PHY. MDP4 based display
&
On 09/19/2016 06:43 PM, Daniel Vetter wrote:
> On Fri, Sep 02, 2016 at 03:00:38PM +0530, Archit Taneja wrote:
>>
>>
>> On 8/31/2016 9:39 PM, Daniel Vetter wrote:
>>> Big thing is untangling and carefully documenting the different uapi
>>> types of pl
sprinkle at least some warning over them.
>
> Fixes: 532b36712ddf ("drm/doc: Polish for drm_plane.[hc]")
> Cc: Archit Taneja
> Cc: Sean Paul
> Signed-off-by: Daniel Vetter
Reviewed-by: Archit Taneja
> ---
> include/drm/drm_blend.h | 3 +++
> include/drm/d
: Archit Taneja
---
v2:
- Use regulator_bulk_* API to configure regulators as suggested by Laurent.
- Set up regulators for ADV7511 too.
drivers/gpu/drm/bridge/adv7511/adv7511.h | 4 ++
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c | 85 +---
2 files changed, 80
On 09/17/2016 04:47 AM, John Stultz wrote:
> This patch adds support to Audio for both adv7511 and adv7533
> bridge chips.
>
> This patch was originally from [1] by Lars-Peter Clausen
> and was adapted by Archit Taneja and
> Srinivas Kandagatla .
>
> Then I heavily rew
On 09/17/2016 04:47 AM, John Stultz wrote:
> From: Srinivas Kandagatla
>
> This patch enables the Audio Data and Clock pads to the adv7533 bridge.
> Without this patch audio can not be played.
>
> Cc: David Airlie
> Cc: Archit Taneja
> Cc: Laurent Pinchart
> Cc: W
Hi,
On 9/14/2016 2:03 PM, Andrzej Hajda wrote:
> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
> It is controlled via I2C bus. Its interaction with other
> devices in video pipeline is performed mainly on HW level.
> The only interaction it does on device driver level is
> filtering-o
On 9/25/2016 11:05 PM, Laurent Pinchart wrote:
> Hi Archit,
>
> Thank you for the patch.
>
> On Friday 23 Sep 2016 14:50:28 Archit Taneja wrote:
>> Maintain a table of regulator names expect by ADV7511 and ADV7533.
>> Use regulator_bulk_* api to configure these.
>
Hi Peter,
On 09/26/2016 01:57 PM, Peter Senna Tschudin wrote:
> Patch 1/4 is already on linux-next, but what about this one? Ping?
I'd posted some queries a couple of times which you didn't answer to.
Could you please respond to them before we try to get this merged?
Archit
&
On 09/26/2016 03:06 PM, Andrzej Hajda wrote:
> Hi,
>
> Thanks for review.
>
>
> On 25.09.2016 19:01, Archit Taneja wrote:
>> Hi,
>>
>> On 9/14/2016 2:03 PM, Andrzej Hajda wrote:
>>> SiI8620 transmitter converts eTMDS/HDMI signal to MHL 3.0.
>>&
On 09/26/2016 05:01 PM, Archit Taneja wrote:
>
>
> On 09/26/2016 03:06 PM, Andrzej Hajda wrote:
>> Hi,
>>
>> Thanks for review.
>>
>>
>> On 25.09.2016 19:01, Archit Taneja wrote:
>>> Hi,
>>>
>>> On 9/14/2016 2:03 PM, Andrzej
or_helper_funcs);
> +
> + ret = drm_connector_init(bridge->dev, connector,
> + &ge_b850v3_lvds_dp_connector_funcs,
> + DRM_MODE_CONNECTOR_DisplayPort);
> + if (ret) {
> + DRM_ERROR("Failed to initialize connector with drm\n");
> + return ret;
> + }
> +
> + drm_connector_register(connector);
Connectors shouldn't be registered in the bridge driver, they should
be registered by the kms driver after drm_dev_register is called.
The drm_connector_register_all() API is used for that.
> + ret = drm_mode_connector_attach_encoder(connector, bridge->encoder);
> + if (ret)
> + return ret;
> +
> + drm_bridge_enable(bridge);
This drm_bridge_enable() doesn't seem to serve any purpose here. It also
doesn't seem to make much sense to call drm_bridge_() funcs within a
bridge op itself.
> + if (ge_b850v3_lvds_dp_i2c->irq) {
> + drm_helper_hpd_irq_event(connector->dev);
> +
> + ret = devm_request_threaded_irq(&ge_b850v3_lvds_dp_i2c->dev,
> + ge_b850v3_lvds_dp_i2c->irq, NULL,
> + ge_b850v3_lvds_dp_irq_handler,
> + IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
> + "ge-b850v3-lvds-dp", ptn_bridge);
Is there a reason why we register the interrupt handler here and not in
probe?
Thanks,
Archit
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
On 09/26/2016 05:24 PM, Peter Senna Tschudin wrote:
>
> On Monday, September 26, 2016 12:29 CEST, Archit Taneja codeaurora.org> wrote:
>
>> Hi,
>>
>> Some comments.
>
> Thank you for the review!
>
>>
>> On 08/09/2016 10:11 PM, Peter S
Hi,
On 09/26/2016 02:28 PM, Peter Senna Tschudin wrote:
> Hi Archit,
>
> On Monday, September 26, 2016 10:31 CEST, Archit Taneja codeaurora.org> wrote:
>
>> Hi Peter,
>>
>> On 09/26/2016 01:57 PM, Peter Senna Tschudin wrote:
>>> Patch 1/4 is already on
ver level is
> filtering-out unsupported video modes, it exposes drm_bridge
> interface to perform this operation.
The patchset looks good to me. Is the MHL header patch
accepted? I was wondering how we pull this in.
+Daniel
Thanks,
Archit
>
> Signed-off-by: Andrzej Hajda
> ---
ldoc tends to be long).
>
> Also some minor drive-by polish where it makes sense, I read a lot
> of docs ...
>
> Cc: Archit Taneja
> Cc: Jani Nikula
> Cc: Chris Wilson
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_bridge.c | 27 +++
Hi Sekhar,
On 1/2/2017 4:38 PM, Sekhar Nori wrote:
> Hi Archit,
>
> On Wednesday 14 December 2016 10:35 AM, Archit Taneja wrote:
>>
>>
>> On 12/13/2016 03:39 PM, Bartosz Golaszewski wrote:
>>> THS8135 is a configurable video DAC, but no configuration is ac
gt; Video output
>
> Cc: Martyn Welch
> Cc: Martin Donnelly
> Cc: Daniel Vetter
> Cc: Enric Balletbo i Serra
> Cc: Philipp Zabel
> Cc: Rob Herring
> Cc: Fabio Estevam
> CC: David Airlie
> CC: Thierry Reding
> CC: Thierry Reding
> CC: Archit Taneja
> Re
Add DSI PHY 14nm domains for DSI PHY common, DSI PHY lane and
DSI PLL registers. Used in MSM8996.
Signed-off-by: Archit Taneja
---
rnndb/dsi/dsi.xml | 128 ++
1 file changed, 128 insertions(+)
diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi
(single DSI)
on DB820c.
Archit Taneja (6):
drm/msm/dsi: Don't error if a DSI host doesn't have a device connected
drm/msm/dsi: Add 8x96 info in dsi_cfg
drm/msm/dsi: Add a PHY op that initializes version specific stuff
drm/msm/dsi: Reset both PHYs before clock operation for dual
ng the DSI device
even if it doesn't have a bridge/panel connected to it.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c
b/drivers/gpu/drm/msm/dsi/dsi
rnings.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 25 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu/drm/msm/dsi/dsi_cfg.c
index 63436d8..a5d75c9 10064
Create an init() op for dsi_phy which sets up things specific to
a given DSI PHY.
The dsi_phy driver probe expects every DSI version to get a
"dsi_phy_regulator" mmio base. This isn't the case for 8x96.
Creating an init() op will allow us to accommodate such
differences.
Signed
From: Hai Li
For some new types of DSI PHY, more settings depend on
use cases controlled by DSI manager. This change allows
DSI manager to setup PHY with a use case.
Signed-off-by: Hai Li
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 8 +++
drivers/gpu/drm/msm
From: Hai Li
The DSI host is required to configure more timings calculated
in PHY. By introducing a shared structure, this change allows
more timing information passed from PHY to host.
Signed-off-by: Hai Li
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 13
From: Hai Li
Since DSI PHY has been a separate platform device, it should not
depend on the resources in host to be functional. This change is
to trigger PHY operations in manager, instead of host, so that
host and PHY can be completely separated.
Signed-off-by: Hai Li
Signed-off-by: Archit
From: Hai Li
The 14nm DSI PHY on 8x96 (called PHY v2 downstream) requires a different
set of calculations for computing D-PHY timing params. Create a
timing_calc_v2 func for the newer v2 PHYs.
Signed-off-by: Hai Li
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 117
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.xml.h | 252 ++
1 file changed, 252 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h
b/drivers/gpu/drm/msm/dsi/dsi.xml.h
index 4958594..234b3b3 100644
--- a/drivers/gpu/drm/msm/dsi
up
by Archit Taneja ]
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c| 25 +
drivers/gpu/drm/msm/dsi/dsi_manager.c | 32 +---
3 files changed, 43 insertions(+), 15 dele
ephen Boyd
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/Kconfig|7 +
drivers/gpu/drm/msm/Makefile |2 +
drivers/gpu/drm/msm/dsi/dsi.h |8 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c |2 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h |
that device is runtime active before doing any register access.
>> This ensures that the power domain, to which DP module belongs, is turned
>> on. While at it, also fix the unbalanced call to phy_power_on() in
>> analogix_dp_bind() function.
Pushed to drm-misc-fixes.
Thanks
set the encoder's bridge. That's now managed by the bridge
API.
Cc: Laurent Pinchart
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.c | 8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi.c b/drivers/gpu/drm/msm/dsi/d
n the binding docs.
- Update the driver to manage regulators for both ADV7511 and ADV7533.
- Have separate supply entries for AVDD, DVDD, PVDD, A2VDD pins.
- Use regulator_bulk_* API to configure regulators.
Archit Taneja (2):
dt-bindings: drm/bridge: adv7511: Add regulator bindings
drm/bridge: ad
Add the regulator supply properties needed by ADV7511 and ADV7533.
Acked-by: Laurent Pinchart
Acked-by: Rob Herring
Signed-off-by: Archit Taneja
---
v5:
- Bring back supplies for individual pins
- In v2, we had a v3p3-supply for DVDD_3V on ADV7511 and V3P3 pin
on ADV7533. We don't r
Maintain a table of regulator names expected by ADV7511 and ADV7533.
Use regulator_bulk_* api to configure these.
Initialize and enable the regulators during probe itself. Controlling
these dynamically is left for later.
Reviewed-by: Laurent Pinchart
Signed-off-by: Archit Taneja
---
drivers
would be appreciated!
Tested on DB410c on 4.10-rc3. Works well for me.
Thanks,
Archit
>
> thanks
> -john
>
> New in v3:
> * Addressed naming improvements and drm_kms_helper_hotplug_event
> usage corrections as suggested by Laurent.
>
> Cc: David Airlie
> Cc: Arc
e the
DSI mode flags and set the corresponding mode of operation.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.h | 1 +
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi_manager.c | 39 ++---
drivers/
e that the
encoder is configured only in video mode. Later, the same encoder
would be usable in both modes.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/dsi/dsi.c | 14 +-
drivers/gpu/drm/msm/dsi/dsi.h | 4 ++--
drivers/gpu/drm/msm/dsi/dsi_manage
Rename the mdp5_encoder_* ops for active displays to
mdp5_vid_encoder_* ops.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c | 31 ++---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 3 ++-
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h | 4
previously created LM # of CRTCs, which was a bit
unnecessary.
Changes in v2:
- Rebase over bridge API updates going in 4.11
- Fix issues seen when calling kms func's set_encoder_mode for
devices where the control/primary device is of the type
mipi_dsi_device
Archit Taneja (6):
drm/msm: Cons
Count can't be non-zero. Changing to uint will also prevent future
warnings.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
b/drivers/gpu/drm/msm/mdp
TCs we
have.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c | 39 -
1 file changed, 29 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
index 9794cad13
rface type. It can use the
the kms func op set_encoder_mode to change the mode of operation, which
in turn would configure the interface type for the INTF.
In mdp5_cmd_encoder.c, we remove the redundant code, and make the commmand
mode funcs as helpers that are used in mdp5_encoder.c
Signed-off-
d the fast path patch in the end as suggested by Maarten.
- Minor cleanups.
Archit Taneja (8):
drm/msm/mdp5: cfg: Add pipe_cursor block
drm/msm/mdp5: Prepare CRTC/LM for empty stages
drm/msm/mdp5: Use plane helpers to configure src/dst rectangles
drm/msm/mdp5: Configure COLOR3_OUT propagation
has to be staged at the topmost
blender of the LM, which can result in empty stages in between 2) In
the future, when we support multiple LMs per CRTC. We could have stages
which don't have any pipe assigned to them.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c | 2
#x27;t an update
on the crtc (which would de-stage the plane), we would still see the
plane in its last 'visible' configuration.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c | 57 ---
drivers/gpu/drm/msm/msm_atomic.c
Define the block in advance so that the generated mdp5.xml.h doesn't
break build.
Signed-off-by: Archit Taneja
---
drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_cfg.h
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