From: Andy Yan
The VOP interface mux, overlay, background delay cycle configuration
of different SOC are much different. Add platform specific callback
ops to let the core driver look cleaner and more refined.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Tested-by: Detlev
From: Andy Yan
This help avoid "exceeds 100 columns" warning from checkpatch
Signed-off-by: Andy Yan
---
(no changes since v1)
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8
drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 4 ++--
2 files changed, 6 insertions(+), 6
From: Andy Yan
In the upcoming VOP of rk3576, a Window cannot attach to all Video Ports,
so make sure all VP find it's suitable primary plane, then register the
remain windows as overlay plane will make code easier.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Test
From: Andy Yan
In the upcoming VOP for rk3576, every VP has it's own LAYER_SEL
register, and the configuration value of each VP for the same
window maybe different, so extend the layer_sel_id to array,
let it can descption the layer select configuration value for
different VP.
Signed-o
From: Andy Yan
Now these two function share the same logic, the can
be merged as one.
Signed-off-by: Andy Yan
---
(no changes since v1)
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 42 +---
1 file changed, 11 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm
field we're handling
can stay const.
Signed-off-by: Heiko Stuebner
Signed-off-by: Andy Yan
---
(no changes since v1)
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 66 +---
1 file changed, 31 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm
From: Andy Yan
There is a version number hardcoded in the VOP VERSION_INFO
register, and the version number increments sequentially based
on the production order of the SOC.
So using this version number to distinguish different VOP features
will simplify the code.
Signed-off-by: Andy Yan
From: Andy Yan
As more SoCs variants are introduced, each SoC brings its own
unique set of constraints, describe this constraints SoC by
SoC will make things easier for adding new variant.
Signed-off-by: Andy Yan
---
Changes in v12:
- Only change the description method for existing SoC
From: Andy Yan
The Cluster windows of upcoming VOP on rk3576 also support
linear YUV support, we need to set uv swap bit for it.
As the VOP2_WIN_UV_SWA register defined on rk3568/rk3588 is
0x, so this register will not be touched on these
two platforms.
Signed-off-by: Andy Yan
Tested
From: Andy Yan
Patches that have already been merged in drm-misc-next are dropped.
PATCH 1~9 are preparations for rk3576 support
PATCH 10~13 are real support for rk376
I test it with a 1080P/4K HDMI output with modetest and weston
output.
If there are some one want to have a try, I have a
From: Andy Yan
VOP2 on rk3576:
Three video ports:
VP0 Max 4096x2160
VP1 Max 2560x1600
VP2 Max 1920x1080
2 4K Cluster windows with AFBC/RFBC, line RGB and YUV
4 Esmart windows with line RGB/YUV support:
Esmart0/1: 4K
Esmart2/3: 2k, or worked together as a single 4K plane at shared
line buffer
From: Andy Yan
Propertie "rockchip,grf" is required for rk3566/8.
Signed-off-by: Andy Yan
---
Changes in v12:
- Split from patch 10/13
.../devicetree/bindings/display/rockchip/rockchip-vop2.yaml | 4
1 file changed, 4 insertions(+)
diff --git
a/Documentation/devicetre
From: Andy Yan
Add vop found on rk3576, the main difference between rk3576 and the
previous vop is that each VP has its own interrupt line.
Signed-off-by: Andy Yan
---
Changes in v12:
- Split from patch 10/13
Changes in v11:
- Remove redundant min/maxItems constraint
Changes in v10:
- Move
Hi Thomas,
At 2025-01-10 21:23:48, "Thomas Zimmermann" wrote:
>Hi
>
>
>Am 10.01.25 um 02:49 schrieb Andy Yan:
>> Hi Thomas,
>>
>> At 2025-01-09 22:56:56, "Thomas Zimmermann" wrote:
>>> Add drm_modes_size_dumb(), a helper to calcu
00 1a 00 00 00 fd 00 30 3c 43
43 8f 01 0a 20 20 20 20 20 20 00 00 00 fe 00 42
4f 45 20 48 46 0a 20 20 20 20 20 20 00 00 00 fe
00 4e 56 31 34 30 46 48 4d 2d 4e 34 5a 0a 00 35
Signed-off-by: Andy Yan
---
drivers/gpu/drm/panel/panel-edp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
Sorry, please don't merge this patch. after further testing,
I found that there are still some changce, it can't read edid.
At 2025-01-13 16:59:54, "Andy Yan" wrote:
>Add an eDP panel entry for BOE NV140FHM-N4Z.
>
>No datasheet found for this panel.
>
>edid
Hi All,
At 2025-01-13 18:17:38, "Andy Yan" wrote:
>
>Sorry, please don't merge this patch. after further testing,
>I found that there are still some changce, it can't read edid.
It turns out that we need set hpd-reliable-delay-ms = 120 in dts to ensure
the righ
From: Andy Yan
The VOP interface mux, overlay, background delay cycle configuration
of different SOC are much different. Add platform specific callback
ops to let the core driver look cleaner and more refined.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Tested-by: Detlev
From: Andy Yan
There is a version number hardcoded in the VOP VERSION_INFO
register, and the version number increments sequentially based
on the production order of the SOC.
So using this version number to distinguish different VOP features
will simplify the code.
Signed-off-by: Andy Yan
From: Andy Yan
In the upcoming VOP of rk3576, a window cannot attach to all Video
Ports, we introduce a possible_vp_mask for every window to indicate
which Video Ports this window can attach to.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Tested-by: Detlev Casanova
---
(no
From: Andy Yan
VOP2 on rk3576:
Three video ports:
VP0 Max 4096x2160
VP1 Max 2560x1600
VP2 Max 1920x1080
2 4K Cluster windows with AFBC/RFBC, line RGB and YUV
4 Esmart windows with line RGB/YUV support:
Esmart0/1: 4K
Esmart2/3: 2k, or worked together as a single 4K plane at shared
line buffer
From: Andy Yan
The Cluster windows of upcoming VOP on rk3576 also support
linear YUV support, we need to set uv swap bit for it.
As the VOP2_WIN_UV_SWA register defined on rk3568/rk3588 is
0x, so this register will not be touched on these
two platforms.
Signed-off-by: Andy Yan
Tested
From: Andy Yan
This is the only afbc format supported by the upcoming
VOP for rk3576.
Add support for it.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Tested-by: Detlev Casanova
---
(no changes since v2)
Changes in v2:
- split it from main patch add support for rk3576
From: Andy Yan
In the upcoming VOP for rk3576, every VP has it's own LAYER_SEL
register, and the configuration value of each VP for the same
window maybe different, so extend the layer_sel_id to array,
let it can descption the layer select configuration value for
different VP.
Signed-o
From: Andy Yan
Add vop found on rk3576, the main difference between rk3576 and the
previous vop is that each VP has its own interrupt line.
Signed-off-by: Andy Yan
---
Changes in v8:
- Fix dt_binding_check errors
- ordered by soc name
- Link to the previous version:
https
From: Andy Yan
In the upcoming VOP of rk3576, a Window cannot attach to all Video Ports,
so make sure all VP find it's suitable primary plane, then register the
remain windows as overlay plane will make code easier.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Test
From: Andy Yan
Here is the V8
Patches that have already been merged in V6 are dropped.
PATCH 1~7 are preparations for rk3576 support
PATCH 8~9 are real support for rk376
I test it with a 1080P/4K HDMI output with modetest and weston
output.
If there are some one want to have a try, I have a
Hi Krzysztof,
At 2024-12-31 16:23:39, "Krzysztof Kozlowski" wrote:
>On Sun, Dec 29, 2024 at 06:49:38PM +0800, Andy Yan wrote:
>>
>>
>> Hi Krzysztof,
>>
>> At 2024-12-29 18:13:39, "Krzysztof Kozlowski" wrote:
>> >On Sat, Dec 28,
From: Andy Yan
There are some control bits for IO and interrupts status scattered
across different GRF on differt SOC.
Add platform callback for this IO setting and interrupts status
handling.
Signed-off-by: Andy Yan
---
.../gpu/drm/rockchip/dw_hdmi_qp-rockchip.c| 81
From: Andy Yan
The HDMI on RK3576 shares the same IP block (PHY and Controller)
with rk3588.
However, there are some control bits scattered in different GRF.
Signed-off-by: Andy Yan
Signed-off-by: Detlev Casanova
Tested-by: Detlev Casanova
---
.../gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
From: Andy Yan
RK3576 HDMI TX Controller is very similar to that of RK3588, but with some
control bits for IO and interrupts status scattered across different GRF.
Signed-off-by: Andy Yan
---
.../bindings/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml| 1 +
1 file changed, 1 insertion
From: Andy Yan
RK3576 HDMI TX Controller is very similar to that of RK3588, but with
some control bits for IO and interrupts status scattered across different
GRF.
PATCH 1/3 is add platform ctrl callback for IO setting and interrupts
status handing.
PATCH 2/3 ~ 3/3 are add support for rk3576
Hi Doug,
在 2025-01-15 00:44:41，"Doug Anderson" 写道：
>Hi,
>
>On Tue, Jan 14, 2025 at 1:05 AM Andy Yan wrote:
>>
>>
>> Hi All,
>>
>> At 2025-01-13 18:17:38, "Andy Yan" wrote:
>> >
>> >Sorry, please don't merge th
Hi Doug,
在 2025-01-16 01:51:15，"Doug Anderson" 写道：
>Hi,
>
>On Wed, Jan 15, 2025 at 2:15 AM Andy Yan wrote:
>>
>>
>> Hi Doug,
>>
>> 在 2025-01-15 00:44:41，"Doug Anderson" 写道：
>> >Hi,
>> >
>> >On Tue, Jan 14, 2
Hi Krzysztof,
At 2025-01-12 18:46:28, "Andy Yan" wrote:
>
>Hi Krzysztof,
>
>At 2025-01-12 17:27:18, "Krzysztof Kozlowski" wrote:
>>On Sat, Jan 11, 2025 at 07:26:08PM +0800, Andy Yan wrote:
>>># See compatible-specific constraints below.
From: Andy Yan
Now these two function share the same logic, the can
be merged as one.
Signed-off-by: Andy Yan
---
(no changes since v1)
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 42 +---
1 file changed, 11 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm
From: Andy Yan
The VOP interface mux, overlay, background delay cycle configuration
of different SOC are much different. Add platform specific callback
ops to let the core driver look cleaner and more refined.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Tested-by: Detlev
From: Andy Yan
In the upcoming VOP of rk3576, a Window cannot attach to all Video Ports,
so make sure all VP find it's suitable primary plane, then register the
remain windows as overlay plane will make code easier.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Test
From: Andy Yan
There is a version number hardcoded in the VOP VERSION_INFO
register, and the version number increments sequentially based
on the production order of the SoC.
So using this version number to distinguish different VOP features
will simplify the code.
Signed-off-by: Andy Yan
From: Andy Yan
In the upcoming VOP for rk3576, every VP has it's own LAYER_SEL
register, and the configuration value of each VP for the same
window maybe different, so extend the layer_sel_id to array,
let it can descption the layer select configuration value for
different VP.
Signed-o
From: Andy Yan
Add vop found on rk3576, the main difference between rk3576 and the
previous vop is that each VP has its own interrupt line.
Signed-off-by: Andy Yan
---
Changes in v9:
- Drop 'vop-' prefix of interrupt-names.
- Add blank line between DT properties
- Remove list inter
From: Andy Yan
Here is the V9
Patches that have already been merged in drm-misc-next are dropped.
PATCH 1~9 are preparations for rk3576 support
PATCH 10~11 are real support for rk376
I test it with a 1080P/4K HDMI output with modetest and weston
output.
If there are some one want to have a
From: Andy Yan
This help avoid "exceeds 100 columns" warning from checkpatch
Signed-off-by: Andy Yan
---
(no changes since v1)
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 8
drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 4 ++--
2 files changed, 6 insertions(+), 6
From: Andy Yan
In the upcoming VOP of rk3576, a window cannot attach to all Video
Ports, we introduce a possible_vp_mask for every window to indicate
which Video Ports this window can attach to.
Signed-off-by: Andy Yan
Tested-by: Michael Riesch # on RK3568
Tested-by: Detlev Casanova
---
(no
field we're handling
can stay const.
Signed-off-by: Heiko Stuebner
Signed-off-by: Andy Yan
---
(no changes since v1)
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 66 +---
1 file changed, 31 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm
From: Andy Yan
VOP2 on rk3576:
Three video ports:
VP0 Max 4096x2160
VP1 Max 2560x1600
VP2 Max 1920x1080
2 4K Cluster windows with AFBC/RFBC, line RGB and YUV
4 Esmart windows with line RGB/YUV support:
Esmart0/1: 4K
Esmart2/3: 2k, or worked together as a single 4K plane at shared
line buffer
Hi Doug,
在 2025-01-15 00:44:41，"Doug Anderson" 写道：
>Hi,
>
>On Tue, Jan 14, 2025 at 1:05 AM Andy Yan wrote:
>>
>>
>> Hi All,
>>
>> At 2025-01-13 18:17:38, "Andy Yan" wrote:
>> >
>> >Sorry, please don't merge th
/20215121628440.pdf
Signed-off-by: Andy Yan
Reviewed-by: Thomas Zimmermann
---
Changes in v2:
- Fix typo in commit message NV140FHM-N4Z -> NV140FHM-NZ
- Reorder based on the product_id
- use delay_200_500_e50_po2e200 based on NV140FHM-N41
drivers/gpu/drm/panel/panel-edp.c | 1 +
1 file chan
Hi Heiko,
At 2025-02-12 18:59:50, "Heiko Stübner" wrote:
>Hi Andy,
>
>Am Mittwoch, 12. Februar 2025, 10:34:57 MEZ schrieb Andy Yan:
>> From: Andy Yan
>>
>> This help avoid "exceeds 100 columns" warning from checkpatch
>>
>> Sig
> > On Fri, Mar 14, 2025 at 09:59:36AM +0200, Dmitry Baryshkov wrote:
>> > > > On Fri, Mar 14, 2025 at 08:45:17AM +0100, Maxime Ripard wrote:
>> > > > > On Fri, Mar 14, 2025 at 07:52:35AM +0200, Dmitry Baryshkov wrote:
>> > > > > > O
From: Andy Yan
The helper functions drm_dp_link_power_up/down were moved to Tegra
DRM at 2019[0].
Now since more and more users are duplicating the same code in their
own drivers, it's time to make them as DRM DP common helpers again.
[0]https://patchwork.freedesktop.org/patch/336850/?s
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
---
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 74 +--
1 file changed, 2 insertions(+), 72 deletions(-)
diff --git a/drivers/gpu/drm/bridge/cadence/cdns
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
---
.../drm/bridge/analogix/analogix-anx78xx.c| 30 +--
1 file changed, 1 insertion(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
---
drivers/gpu/drm/bridge/ite-it6505.c | 46 +++--
1 file changed, 4 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/bridge/ite-it6505.c
b
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
---
.../drm/bridge/analogix/analogix-anx6345.c| 30 +--
1 file changed, 1 insertion(+), 29 deletions(-)
diff --git a/drivers/gpu/drm/bridge/analogix/analogix
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
.../drm/bridge/analogix/analogix-anx78xx.c| 30 +--
1 file changed, 1 insertion(+), 29 deletions
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
drivers/gpu/drm/bridge/ite-it6505.c | 46 +++--
1 file changed, 4 insertions(+), 42 deletions
From: Andy Yan
The helper functions drm_dp_link_power_up/down were moved to Tegra
DRM in commit 9a42c7c647a9 ("drm/tegra: Move drm_dp_link helpers to Tegra
DRM")".
Now since more and more users are duplicating the same code in their
own drivers, it's time to make them as D
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
.../drm/bridge/analogix/analogix-anx6345.c| 30 +--
1 file changed, 1 insertion(+), 29 deletions
From: Andy Yan
Use the common dp link power up/down helpers to avoid duplicating code.
Signed-off-by: Andy Yan
Reviewed-by: Dmitry Baryshkov
---
(no changes since v1)
.../drm/bridge/cadence/cdns-mhdp8546-core.c | 74 +--
1 file changed, 2 insertions(+), 72 deletions
From: Andy Yan
Because the layer/window enable/disable is take effect by vsync, if the
overlay configuration of these layers does not follow vsync and
takes effect immediately instead, when multiple layers are dynamically
enable/disable, inconsistent display contents may be seen on the screen
From: Andy Yan
Use cfg->ctrl_ops->io_init callback make it work for all platform.
And it's also gets rid of code duplication
Fixes: 3f60dbd40d3f ("drm/rockchip: dw_hdmi_qp: Add platform ctrl callback")
Signed-off-by: Andy Yan
Reviewed-by: Sebastian Reichel
---
Chang
From: Andy Yan
Use cfg->ctrl_ops->io_init callback make it work for all platform.
Fixes: 3f60dbd40d3f ("drm/rockchip: dw_hdmi_qp: Add platform ctrl callback")
Signed-off-by: Andy Yan
---
.../gpu/drm/rockchip/dw_hdmi_qp-rockchip.c| 23 +++
1 file chang
Hi Maxime，
At 2025-03-21 17:48:04, "Maxime Ripard" wrote:
>On Fri, Mar 21, 2025 at 04:53:38PM +0800, Andy Yan wrote:
>> From: Andy Yan
>>
>> In some application scenarios, we hope to get the corresponding
>> connector when the bridge's detect hook is
Gentle ping..
At 2025-03-27 20:54:37, "Dmitry Baryshkov"
wrote:
>On 27/03/2025 14:39, Andy Yan wrote:
>>
>> Hello Dmitry,
>> Could you take this series? If so, merging it earlier can avoid future
>> conflicts from other patches.
>> Besi
From: Andy Yan
The DP0 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY0 with USB 3.1
HOST0 controller.
Signed-off-by: Andy Yan
---
(no changes since v1)
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 +++
1 file changed, 30
From: Andy Yan
The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled
first before normal DDC communication can be carried out.
Therefore, both RK3036 and RK3128 HDMI require two identical clocks.
Signed-off-by: Andy Yan
Reviewed-by: Rob Herring (Arm)
---
(
From: Andy Yan
In some application scenarios, we hope to get the corresponding
connector when the bridge's detect hook is invoked.
For example, we may want to call drm_dp_read_sink_count_cap(which needs
a drm_connector) at the dp deteck hook, intel_dp and nouveau_dp do this
at it's c
From: Andy Yan
In some application scenarios, we hope to get the corresponding
connector when the bridge's detect hook is invoked.
In most cases, we can get the connector by drm_atomic_get_connector_for_encoder
if the encoder attached to the bridge is enabled, however there will
still be
Hi
At 2025-03-26 15:59:25, "Krzysztof Kozlowski" wrote:
>On Tue, Mar 25, 2025 at 09:29:36PM +0800, Andy Yan wrote:
>> From: Andy Yan
>>
>> HDMI on RK3036 use GRF control the HSYNC/VSYNC polarity, but this part
>> is missing when it first landing upstream.
gt; > > On Fri, Mar 14, 2025 at 08:45:17AM +0100, Maxime Ripard wrote:
>> > > > > > > On Fri, Mar 14, 2025 at 07:52:35AM +0200, Dmitry Baryshkov wrote:
>> > > > > > > > On Fri, Mar 14, 2025 at 08:50:29AM +0800, Andy Yan wrote:
>> > >
Hi Alex，
At 2025-04-03 01:24:22, "Alex Bee" wrote:
>
>Hi Andy,
>
>> From: Andy Yan
>>
>> Convert it to drm bridge driver, it will be convenient for us to
>> migrate the connector part to the display driver later.
>>
>> Signed-off-by
Hello Heiko,
Could you take this series ? They have already got the necessary R-B and
Ack.
I think Damon still has some patches for connector decoupling. With this series
have been merged earlier.
His new patches can have fewer dependencies.
At 2025-03-10 18:41:01, "Damon Ding" wrote
From: Andy Yan
It is not recommended for drivers to include UAPI header
directly.
Signed-off-by: Andy Yan
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge
From: Andy Yan
It is not recommended for drivers to include UAPI header
directly.
Signed-off-by: Andy Yan
Reviewed-by: Heiko Stuebner
---
Changes in v2:
- Collect R-b from Heiko.
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Hi
At 2025-04-18 17:43:19, "Daniel Stone" wrote:
>Hi Andy,
>
>On Fri, 18 Apr 2025 at 01:16, Andy Yan wrote:
>> I prefer the V1 version PATCH[0]. This is because we do not deal with
>> hardware-related
>> differences at this level. It involves a VOP-
;to make import_attach optional.
>
>Signed-off-by: Thomas Zimmermann
>Cc: Sandy Huang
>Cc: "Heiko Stübner"
>Cc: Andy Yan
>---
> drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gp
Hi all,
At 2025-03-21 17:48:04, "Maxime Ripard" wrote:
>On Fri, Mar 21, 2025 at 04:53:38PM +0800, Andy Yan wrote:
>> From: Andy Yan
>>
>> In some application scenarios, we hope to get the corresponding
>> connector when the bridge's detect hook is inv
From: Andy Yan
HDMI on RK3036 use GRF control the HSYNC/VSYNC polarity, but this part
is missing when it first landing upstream.
Document that it is mandatory for RK3036 HDMI.
Signed-off-by: Andy Yan
Reviewed-by: Krzysztof Kozlowski
---
(no changes since v2)
Changes in v2:
- First
From: Andy Yan
Convert it to drm bridge driver, it will be convenient for us to
migrate the connector part to the display driver later.
Signed-off-by: Andy Yan
---
Changes in v4:
- Do not store colorimetry within inno_hdmi struct
Changes in v3:
- First included in v3
drivers/gpu/drm
From: Andy Yan
This reverts commit 1580ccb6ed9dc76b8ff3e2d8912e8215c8b0fa6d.
The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF.
Without the polarity configuration in GRF, it can be observed from
the HDMI protocol analyzer that the H/V front/back timing output
by RK3036 HDMI are
From: Andy Yan
The HSYNC/VSYNC polarity of rk3036 HDMI are controlled by GRF.
Without the polarity configuration in GRF, it can be observed
from the HDMI protocol analyzer that the H/V front/back timing
output by RK3036 HDMI are currently not in line with the specifications.
Signed-off-by: Andy
From: Andy Yan
The RK3036 HDMI DDC bus requires it's PHY's reference clock to be
enabled first before normal DDC communication can be carried out.
Signed-off-by: Andy Yan
---
(no changes since v1)
arch/arm/boot/dts/rockchip/rk3036.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2
From: Andy Yan
When preparing to convert the current inno hdmi driver into a
bridge driver, I found that there are several issues currently
existing with it:
1. When the system starts up, the first time it reads the EDID, it
will fail. This is because RK3036 HDMI DDC bus requires it's
From: Andy Yan
The RK3036 HDMI DDC bus requires it's PHY's reference clock to be enabled
first before normal DDC communication can be carried out.
Therefore, both RK3036 and RK3128 HDMI require two identical clocks.
Signed-off-by: Andy Yan
Reviewed-by: Rob Herring (Arm)
---
(
From: Andy Yan
Use dev_err_probe simplify the error handle.
Signed-off-by: Andy Yan
---
(no changes since v2)
Changes in v2:
- First included in this series
drivers/gpu/drm/rockchip/inno_hdmi.c | 19 ++-
1 file changed, 6 insertions(+), 13 deletions(-)
diff --git a
Hi Konstantin，
the Subject should be: drm/rockchip:
At 2025-04-14 17:53:31, "Konstantin Shabanov" wrote:
>As it isn't supported by hardware. At least, RK3399 doesn't support
>it. From the datasheet[1]
>("1.2.10 Video IN/OUT", "Display Interface", p. 17):
>
> Support AFBC function
ALOGIX_DP [=y]
>>
>> Rockchip platforms all depend on OF anyway, so add the dependency here
>> for compile testing.
>>
>> Fixes: d7b4936b2bc0 ("drm/rockchip: analogix_dp: Add support to get panel
>> from the DP AUX bus")
>> Signed-off-by: Arnd Berg
Hi Thomas，
在 2025-04-15 14:54:21，"Thomas Zimmermann" 写道：
>Hi
>
>Am 15.04.25 um 06:00 schrieb Andy Yan:
>>
>> Hi Thomas，
>>
>> At 2025-04-14 21:48:12, "Thomas Zimmermann" wrote:
>>> Instead of testing import_attach for imported GEM
Hi,
在 2025-04-15 15:51:31，"Thomas Zimmermann" 写道：
>Hi
>
>Am 15.04.25 um 09:15 schrieb Andy Yan:
>> Hi Thomas，
>>
>> 在 2025-04-15 14:54:21，"Thomas Zimmermann" 写道：
>>> Hi
>>>
>>> Am 15.04.25 um 06:00 schrieb Andy Yan:
&g
Hi,
At 2025-04-25 02:59:10, "Luca Ceresoli" wrote:
>This is the new API for allocating DRM bridges.
>
>Signed-off-by: Luca Ceresoli
Reviewed-by: Andy Yan
>
>---
>
>Cc: "Uwe Kleine-König"
>Cc: Andy Yan
>Cc: Dmitry Baryshkov
>Cc: Jani
if (!C)
> -return ERR_PTR(-ENOMEM);
> +C = devm_drm_bridge_alloc(DEV, T, BR, FUNCS);
> +if (IS_ERR(C))
> + return PTR_ERR(C);
> )
> ...
> -C->BR.funcs = FUNCS;
>
>Signed-off-by: Luca Ceresoli
>
>---
>
>Cc: Adam Ford
>Cc: Adrien Grassein
From: Andy Yan
Convert it to drm bridge driver, it will be convenient for us to
migrate the connector part to the display driver later.
Note: I don't have the hardware to test this driver, so for now
I can only do the compilation test.
Signed-off-by: Andy Yan
---
drivers/gpu/drm/roc
switching works correctly in sway
>
>Signed-off-by: Konstantin Shabanov
>Cc: Daniel Stone
>Cc: Andy Yan
>Reported-by: Dan Callaghan
>Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7968
>
>[1]:
>https://opensource.rock-chips.com/images/d/d7/Rockchip_RK3399_Data
From: Andy Yan
The all video ports of rk3568/rk3588 share the same OVL_LAYER_SEL
and OVL_PORT_SEL registers, and the configuration of these two registers
can be set to take effect when the vsync signal arrives at a certain Video
Port.
If two threads for two display output choose to update these
Let the user know what went wrong in drm_gem_fb_afbc_init
failure paths.
Signed-off-by: Andy Yan
---
drivers/gpu/drm/drm_gem_framebuffer_helper.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_gem_framebuffer_helper.c
b/drivers/gpu/drm
From: Andy Yan
VOP2 on rk3576:
Three video ports:
VP0 Max 4096x2160
VP1 Max 2560x1600
VP2 Max 1920x1080
2 4K Cluster windows with AFBC/RFBC, line RGB and YUV
4 Esmart windows with line RGB/YUV support:
Esmart0/1: 4K
Esmart2/3: 2k, or worked together as a single 4K plane at shared
line buffer
From: Andy Yan
The Cluster windows of upcoming VOP on rk3576 also support
linear YUV support, we need to set uv swap bit for it.
As the VOP2_WIN_UV_SWA register defined on rk3568/rk3588 is
0x, so this register will not be touched on these
two platforms.
Signed-off-by: Andy Yan
Tested
From: Andy Yan
Now these two function share the same logic, they can
be merged as one.
Signed-off-by: Andy Yan
---
Changes in v15:
- Fix nr_regs arguments for smart windows register.
drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 42 +---
1 file changed, 11 insertions
From: Andy Yan
Add vop found on rk3576, the main difference between rk3576 and the
previous vop is that each VP has its own interrupt line.
Signed-off-by: Andy Yan
Reviewed-by: Krzysztof Kozlowski
---
(no changes since v13)
Changes in v13:
- Use maxItems constraint for clocks in allOf
701 - 800 of 984 matches
Mail list logo
