The item which have the mediatek,mt8192-disp-ccorr const compatible already
exist above. Remove duplicated fallback.
Fixes: 137272ef1b0f ("dt-bindings: display: mediatek: Fix the fallback for
mediatek,mt8186-disp-ccorr")
Signed-off-by: Alexandre Mergnat
---
Fix MTK color correction bi
The item which have the mediatek,mt8192-disp-ccorr const compatible already
exist above. Remove duplicated fallback.
Fixes: 137272ef1b0f ("dt-bindings: display: mediatek: Fix the fallback for
mediatek,mt8186-disp-ccorr")
Signed-off-by: Alexandre Mergnat
---
Fix MTK color correcti
The item which have the mediatek,mt8192-disp-ccorr const compatible already
exist above. Remove duplicated fallback.
Fixes: 137272ef1b0f ("dt-bindings: display: mediatek: Fix the fallback for
mediatek,mt8186-disp-ccorr")
Signed-off-by: Alexandre Mergnat
---
Fix MTK color correction bi
The item which have the mediatek,mt8192-disp-ccorr as const compatible
already exist above. Merge all compatibles which have the same fallback
under the same item.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Alexandre Mergnat
---
Fix MTK color correction binding
The fallback compatible has
Hi Angelo
Le mar. 7 mars 2023 à 11:17, AngeloGioacchino Del Regno
a écrit :
>
> Il 07/03/23 11:07, Alexandre Mergnat ha scritto:
> > The item which have the mediatek,mt8192-disp-ccorr as const compatible
> > already exist above. Merge all compatibles which have the same fall
Hi Jason,
Can you give me the based git tree/branch for this series please ?
I want to do a non-regression test for mt8365-evk board.
Feedback below:
On 05/04/2023 16:51, Jason-JH.Lin wrote:
1. Move output drm connector from each ddp_path array to connector array.
2. Add dynamic select availab
- mediatek,mt8365-mipi-tx
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795: similarly to
MT8173, this SoC has the gamma LUT registers in DISP_AAL.
Signed-off-by: AngeloGioacchino Del
Regno
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 12/04/2023 15:03, AngeloGioacchino Del Regno wrote:
Il 12/04/23 14:59, Alexandre Mergnat ha scritto:
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for MediaTek Helio X10 MT6795: this SoC uses
the same DSI PHY as MT8173.
Signed-off-by: AngeloGioacchino Del
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote:
Add a compatible string for the MediaTek Helio X10 MT6795 SoC, using
the same parameters as MT8183.
Signed-off-by: AngeloGioacchino Del
Regno
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 12/04/2023 08:46, Yang Li wrote:
Remove variable 'res' and convert platform_get_resource(),
devm_ioremap_resource() to a single call to
devm_platform_ioremap_resource(), as this is exactly what this function
does.
Signed-off-by: Yang Li
Reviewed-by: Alexandre Mergnat
On 12/04/2023 08:46, Yang Li wrote:
Remove variable 'res' and convert platform_get_resource(),
devm_ioremap_resource() to a single call to
devm_platform_ioremap_resource(), as this is exactly what this function
does.
Signed-off-by: Yang Li
Reviewed-by: Alexandre Mergnat
On 12/04/2023 08:46, Yang Li wrote:
Remove variable 'res' and convert platform_get_resource(),
devm_ioremap_resource() to a single call to
devm_platform_ioremap_resource(), as this is exactly what this function
does.
Signed-off-by: Yang Li
Reviewed-by: Alexandre Mergnat
The item which have the mediatek,mt8192-disp-ccorr as const compatible
already exist above. Merge all compatibles which have the same fallback
under the same item.
Acked-by: Krzysztof Kozlowski
Reviewed-by: AngeloGioacchino Del Regno
Reviewed-by: Rob Herring
Signed-off-by: Alexandre Mergnat
: linux-ker...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-...@vger.kernel.org
Cc: Fabien Parent
Cc: Guillaume La Roque
Cc: Neil Armstrong
Signed-off-by: Alexandre Mergnat
---
Alexandre Mergnat (16):
dt-bindings: display: mediatek: aal: add binding for MT8365 SoC
Display Color Correction for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation
Display Adaptive Ambient Light for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation
Display Serial Interface for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
.../bindings/display/mediatek/mediatek,dsi.yaml | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git
From: Fabien Parent
DPI is part of the display / multimedia block in MediaTek SoCs, and
always have a power-domain (at least in the upstream device-trees).
Add the power-domains property to the binding documentation.
Signed-off-by: Fabien Parent
Signed-off-by: Alexandre Mergnat
Display Color for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree
From: Fabien Parent
DPI for MT8365 is compatible with MT8192 but requires an additional
clock. Modify the documentation to requires this clock only on MT8365 SoCs.
Signed-off-by: Fabien Parent
Signed-off-by: Alexandre Mergnat
---
.../bindings/display/mediatek/mediatek,dpi.yaml| 48
Display Overlay for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8192 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree
Display GAMMA for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree
Display PWM for MT8365 is compatible with MT8183. Then, add MT8365 binding
along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/pwm/mediatek
Display Dither for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation/devicetree
According to the Mediatek datasheet, the display PWM block has a power
domain.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/pwm/mediatek,pwm-disp.yaml | 8
1 file changed, 8 insertions(+)
diff --git a/Documentation/devicetree/bindings/pwm/mediatek,pwm
The Startek KD070FHFID015 is a 7-inch TFT LCD display with a resolution
of 1024 x 600 pixels.
Signed-off-by: Alexandre Mergnat
---
.../display/panel/startek,kd070fhfid015.yaml | 55 ++
1 file changed, 55 insertions(+)
diff --git
a/Documentation/devicetree/bindings
Display Data Path Read DMA for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
a/Documentation
;ite,it66121" HDMI bridge support, driven by I2C1.
- Setup the Display Parallel Interface.
Signed-off-by: Alexandre Mergnat
---
arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 204
1 file changed, 204 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365-
.
Signed-off-by: Alexandre Mergnat
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 3b7d13028fb6..35c36cc05c04 100644
--- a/drivers/gpu/drm/mediatek/mtk_dsi.c
+++ b/drivers/gpu/drm
According to the mtk-mutex.c driver and the SoC DTS, the clock isn't
required to work properly for some of MTK SoC. Improve the clock
requirement by adding a condition which is function to the compatible.
Signed-off-by: Alexandre Mergnat
---
.../bindings/soc/mediatek/mediatek,mutex
From: Fabien Parent
Add DRM support for MT8365 SoC.
Signed-off-by: Fabien Parent
Signed-off-by: Alexandre Mergnat
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 35 ++
1 file changed, 35 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
b
Add compatible for the MT8365 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,mutex.yaml
b/Documentation/devicetree/bindings
From: Fabien Parent
MT8365 requires an additional clock for DPI. Add support for that
additional clock.
Signed-off-by: Fabien Parent
Signed-off-by: Alexandre Mergnat
---
drivers/gpu/drm/mediatek/mtk_dpi.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a
)
Signed-off-by: Alexandre Mergnat
---
arch/arm64/boot/dts/mediatek/mt8365.dtsi | 147 +++
1 file changed, 147 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi
b/arch/arm64/boot/dts/mediatek/mt8365.dtsi
index 1034b652dd0f..49d8bf145933 100644
--- a/arch
From: Guillaume La Roque
This driver support the Startek KD070FHFID015, which is a 7-inch TFT LCD
display using MIPI DSI interface.
Signed-off-by: Guillaume La Roque
Signed-off-by: Alexandre Mergnat
---
drivers/gpu/drm/panel/Kconfig | 12 +
drivers/gpu/drm/panel
Le ven. 10 mars 2023 à 09:39, Krzysztof Kozlowski
a écrit :
>
> On 09/03/2023 15:23, Alexandre Mergnat wrote:
> > Add compatible for the MT8365 SoC.
> >
> > Signed-off-by: Alexandre Mergnat
> > ---
> > Documentation/devicetree/bindings/soc/mediatek/mediatek,
Maybe "oneOf" should be added at least ?
compatible:
oneOf:
- enum:
Regards,
Alex
Le mer. 15 mars 2023 à 09:01, Alexandre Mergnat
a écrit :
>
> Le ven. 10 mars 2023 à 09:39, Krzysztof Kozlowski
> a écrit :
> >
> > On 09/03/2023 15:23, Alexandre Merg
Hi Chun-Kuang,
Le lun. 13 mars 2023 à 16:17, Chun-Kuang Hu a écrit :
>
> Hi, Alexandre:
>
> Alexandre Mergnat 於 2023年3月9日 週四 下午10:23寫道:
> >
> > From: Fabien Parent
> >
> > DPI for MT8365 is compatible with MT8192 but requires an additional
> > clock.
Le lun. 13 mars 2023 à 16:21, Chun-Kuang Hu a écrit :
>
> >
> > + dpi->dpi_clk = devm_clk_get_optional(dev, "dpi");
>
> For MT8365, DPI clock is not optional, so make sure that MT8365 DPI
> should have this clock.
This should be check and notified at build time thanks to the
device-tree bin
Hi Neil,
Le jeu. 9 mars 2023 à 15:51, Neil Armstrong
a écrit :
> > +
> > +#include
>
> Is this include needed ?
Seems not, I remove it.
> > + struct gpio_desc *enable_gpio;
> > + struct gpio_desc *reset_gpio;
> > + struct gpio_desc *dcdc_en_gpio;
>
> Isn't this "DCDC" a regulator ?
Hi Matthias,
This version is outdated.
Here the last one:
https://lore.kernel.org/all/20230306-ccorr-binding-fix-v5-0-6c56aaecc...@baylibre.com/
Regards,
Alex
Le ven. 17 mars 2023 à 12:25, Matthias Brugger
a écrit :
>
>
>
> On 06/03/2023 17:15, Alexandre Mergnat wrote:
> > T
On 08/06/2023 12:12, AngeloGioacchino Del Regno wrote:
Instead of open coding calls to platform_get_resource() followed by
devm_ioremap_resource(), perform a single call to the helper
devm_platform_get_and_ioremap_resource().
This commit brings no functional changes.
Reviewed-by: Alexandre
On 08/06/2023 12:12, AngeloGioacchino Del Regno wrote:
Convert all instances of dev_err() -> return to dev_err_probe() and
where it makes sense to, change instances of `return ret` at the end
of probe functions to `return 0`, as errors are returned earlier.
Reviewed-by: Alexandre Merg
On 08/06/2023 12:12, AngeloGioacchino Del Regno wrote:
Simplify the error path of return functions and drop the call to
pm_runtime_disable() in remove functions by switching to
devm_pm_runtime_enable() where possible.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 21/06/2023 12:22, Jason-JH.Lin wrote:
Fixing the coverity issue of:
mtk_drm_cmdq_pkt_destroy frees address of mtk_crtc->cmdq_handle
So remove the free function.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
terminator.
So change cnt to unsigned int and check its max value.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 21/06/2023 12:22, Jason-JH.Lin wrote:
1. Add casting before assign to avoid the unintentional integer
overflow or unintended sign extension.
2. Add a int varriable for multiplier calculation instead of calculating
different types multiplier with dma_addr_t varriable directly.
Fixes
.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
PI_DSI_MODE_NO_EOT_PACKET ? 2 : 0;
+ delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 0 : 2;
horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp;
horizontal_front_back_byte = horizontal_frontporch_byte +
horizontal_backporch_byte;
Sounds logic
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 23/06/2023 11:49, AngeloGioacchino Del Regno wrote:
This series changes MediaTek CMDQ support to use the mtk-cmdq-helper
functions, removing duplicated cmdq setup code in mtk-drm and also
removing all instances of `#if IS_REACHABLE(CONFIG_MTK_CMDQ)` while
keeping compatibility with both CON
Reviewed-by: Alexandre Mergnat
On 20/07/2023 10:26, Shuijing Li wrote:
The audio packet arrangement function is to only arrange audio.
packets into the Hblanking area. In order to align with the HW
default setting of mt8195, this function needs to be turned off.
--
Regards,
Alexandre
DIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_4(6 << 8)
#define AUDIO_M_CODE_MULT_DIV_SEL_DP_ENC0_P0_DIV_8(7 << 8)
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote:
Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
On 20/07/2023 10:26, Shuijing Li wrote:
Due to the difference of HW, different dividers need to be set.
Signed-off-by: Shuijing Li
Signed-off-by: Jitao Shi
---
Changes in v3
On 20/07/2023 14:08, AngeloGioacchino Del Regno wrote:
Il 20/07/23 14:07, Alexandre Mergnat ha scritto:
On 20/07/2023 13:54, AngeloGioacchino Del Regno wrote:
Il 20/07/23 12:14, Alexandre Mergnat ha scritto:
On 20/07/2023 10:26, Shuijing Li wrote:
Due to the difference of HW
IRQ_NOAUTOEN flag before requesting
it at probe time and manage the enablement of the ISR in the .attach()
and .detach() handlers for the DP bridge.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
ported` is true.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
In preparation for adding support for eDP, move the PHY registration
code to a new mtk_dp_register_phy() function for better readability.
This commit brings no functional changes.
--
Regards,
Alexandre
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
For the eDP case we can support using aux-bus on MediaTek DP: this
gives us the possibility to declare our panel as generic "panel-edp"
which will automatically configure the timings and available
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
In order to support usecases in which the panel regulator can be
switched on and off to save power, and usecases in which the panel
regulator is off at boot, add a .wait_hpd_asserted() callback for
the AUX
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
The interrupt handler for HPD is useful only if a display is actually
supposed to be hotpluggable, as that manages the machinery to perform
cable (un)plug detection, debouncing and setup for re-training
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
If reading the RX capabilities fails the training pattern will be set
wrongly: add error checking for drm_dp_read_dpcd_caps() and return if
anything went wrong with it.
While at it, also add a less critical
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
Everytime we run bridge detection and/or EDID read we run a poweron
and poweroff sequence for both the AUX and the panel; moreover, this
is also done when enabling the bridge in the .atomic_enable() callback
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
Change logging from drm_{err,info}() to dev_{err,info}() in functions
mtk_dp_aux_transfer() and mtk_dp_aux_do_transfer(): this will be
essential to avoid getting NULL pointer kernel panics if any kind
of
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
In preparation for adding support for aux-bus, which will add a code
path that may fail after the drm_bridge_add() call, change that to
devm_drm_bridge_add() to simplify failure paths later.
--
Regards
Reviewed-by: Alexandre Mergnat
On 17/07/2023 16:14, AngeloGioacchino Del Regno wrote:
Move the register write to MTK_DP_AUX_P0_3690 to set the AUX reply mode
to function mtk_dp_initialize_aux_settings(), as this is effectively
part of the DPTX AUX setup sequence.
--
Regards,
Alexandre
On 19/07/2023 09:41, AngeloGioacchino Del Regno wrote:
Il 23/06/23 14:49, Alexandre Mergnat ha scritto:
On 23/06/2023 11:49, AngeloGioacchino Del Regno wrote:
This series changes MediaTek CMDQ support to use the mtk-cmdq-helper
functions, removing duplicated cmdq setup code in mtk-drm and
Hi Angelo !
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Add support for 12-bit gamma lookup tables and introduce the first
user for it: MT8195.
While at it, also reorder the variables in mtk_gamma_set_common()
and rename `lut_base` to `lut0_base` to improve readability.
Signed-off-by
Hi Angelo
On 27/07/2023 15:06, AngeloGioacchino Del Regno wrote:
+/* For 10 bit LUT layout, R/G/B are in the same register */
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20)
#define DISP_GAMMA_LUT_10BIT_G GENMASK(19, 10)
#define DISP_GAMMA_LUT_10BIT_B GENMAS
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
From: "Jason-JH.Lin"
Adjust the parameters in mtk_drm_gamma_set_common()
- add (struct device *dev) to get lut_diff from gamma's driver data
- remove (bool lut_diff) and use false as d
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Invert the check for state->gamma_lut and move it at the beginning
of the function to reduce indentation: this prepares the code for
keeping readability on later additions.
This commit brings no functio
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Newer SoCs support a bigger Gamma LUT table: wire up a callback
to retrieve the correct LUT size for each different Gamma IP.
--
Regards,
Alexandre
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Use drm_color_lut_extract() to avoid open-coding the bits reduction
calculations for each color channel and use a struct drm_color_lut
to temporarily store the information instead of an array of u32.
Also
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Move the write to DISP_GAMMA_CFG to enable the Gamma LUT to after
programming the actual table to avoid potential visual glitches during
table modification.
Note:
GAMMA should get enabled in between vblanks
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Make the code more robust and improve readability by using bitfield
macros instead of open coding bit operations.
While at it, also add a definition for LUT_BITS_DEFAULT.
--
Regards,
Alexandre
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
New SoCs, like MT8195, not only may support bigger lookup tables, but
have got a different register layout to support bigger precision:
support specifying the number of `lut_bits` for each SoC and use it
in
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Newer Gamma IP have got multiple LUT banks: support specifying the
size of the LUT banks and handle bank-switching before programming
the LUT in mtk_gamma_set_common() in preparation for adding support
for
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
Disable relay mode at the end of LUT programming to make sure that the
processed image goes through.
--
Regards,
Alexandre
Reviewed-by: Alexandre Mergnat
On 27/07/2023 11:46, AngeloGioacchino Del Regno wrote:
All of the SoCs that don't have dithering control in the gamma IP
have got a GAMMA_LUT_TYPE bit that tells to the IP if the LUT is
"descending" (bit set) or "rising" (bit clea
On 31/07/2023 12:27, AngeloGioacchino Del Regno wrote:
Il 28/07/23 14:58, Alexandre Mergnat ha scritto:
Hi Angelo
On 27/07/2023 15:06, AngeloGioacchino Del Regno wrote:
+/* For 10 bit LUT layout, R/G/B are in the same register */
#define DISP_GAMMA_LUT_10BIT_R GENMASK(29, 20
https://lore.kernel.org/all/20230220-display-v1-0-45cbc68e1...@baylibre.com/
Signed-off-by: Alexandre Mergnat
---
Changes in v3:
- Remove spurious line.
- Remove useless ops (enable and disable).
- Remove brightness value init because it is set right after
using mipi_dsi_dcs_get_display_brigh
Build Startek KD070FHFID015 panel driver. This MIPI-DSI display
can be used for the mt8365-evk board for example.
Signed-off-by: Alexandre Mergnat
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
The Startek KD070FHFID015 is a 7-inch TFT LCD display with a resolution
of 1024 x 600 pixels.
Reviewed-by: Conor Dooley
Signed-off-by: Alexandre Mergnat
---
.../display/panel/startek,kd070fhfid015.yaml | 69 ++
1 file changed, 69 insertions(+)
diff --git
a
https://lore.kernel.org/all/20230220-display-v1-0-45cbc68e1...@baylibre.com/
Signed-off-by: Alexandre Mergnat
---
Changes in v4:
- Remove useless function: stk_panel_shutdown.
- Align parenthesis for readability.
- Link to v3:
https://lore.kernel.org/r/20230711-startek_display-v3-0-dc84
Build Startek KD070FHFID015 panel driver. This MIPI-DSI display
can be used for the mt8365-evk board for example.
Signed-off-by: Alexandre Mergnat
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
The Startek KD070FHFID015 is a 7-inch TFT LCD display with a resolution
of 1024 x 600 pixels.
Reviewed-by: Conor Dooley
Signed-off-by: Alexandre Mergnat
---
.../display/panel/startek,kd070fhfid015.yaml | 69 ++
1 file changed, 69 insertions(+)
diff --git
a
Hi Jason,
You forgot to put the Reviewed-by got from the V3 in your commit message.
On 07/08/2023 03:51, Jason-JH.Lin wrote:
The plane_state of drm_atomic_state is not sync to the mtk_plane_state
stored in mtk_crtc during crtc enabling.
So we need to update the mtk_plane_state stored in mtk_c
On 26/06/2023 20:58, Sui Jingfeng wrote:
Also return -ENOMEM if such a failure happens, the implement should take
responsibility for the error handling.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
y macro to increase the readability.
- Link to parent serie: [1]
[1]:
https://lore.kernel.org/all/20230220-display-v1-0-45cbc68e1...@baylibre.com/
Signed-off-by: Alexandre Mergnat
---
Alexandre Mergnat (2):
dt-bindings: display: panel: add startek kd070fhfid015 support
arm64: defconf
The Startek KD070FHFID015 is a 7-inch TFT LCD display with a resolution
of 1024 x 600 pixels.
Signed-off-by: Alexandre Mergnat
---
.../display/panel/startek,kd070fhfid015.yaml | 51 ++
1 file changed, 51 insertions(+)
diff --git
a/Documentation/devicetree/bindings
Build Startek KD070FHFID015 panel driver. This MIPI-DSI display
can be used for the mt8365-evk board for example.
Signed-off-by: Alexandre Mergnat
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
Hi Krzysztof,
Thanks for your review
On 12/07/2023 07:32, Krzysztof Kozlowski wrote:
On 11/07/2023 17:36, Alexandre Mergnat wrote:
The Startek KD070FHFID015 is a 7-inch TFT LCD display with a resolution
snip
+
+ dcdc-gpios: true
From where does this come? Which schema defines it
avoid using the old FB which could be freed.
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
On 10/07/2023 11:32, Jason-JH.Lin wrote:
OVL layer should not be enabled before crtc is enabled.
The plane_state of drm_atomic_state is not sync to
the plane_state stored in mtk_crtc during crtc enabling,
so just set all planes to disabled.
Reviewed-by: Alexandre Mergnat
--
Regards
d src.y1 are
'int'. That means 'unsigned int' offset will be very big when src.x1 or
src.y1 is negative.
So I just use 'int' for offset here.
Ok
Reviewed-by: Alexandre Mergnat
--
Regards,
Alexandre
The Startek KD070FHFID015 is a 7-inch TFT LCD display with a resolution
of 1024 x 600 pixels.
Reviewed-by: Conor Dooley
Signed-off-by: Alexandre Mergnat
---
.../display/panel/startek,kd070fhfid015.yaml | 69 ++
1 file changed, 69 insertions(+)
diff --git
a
c68e1...@baylibre.com/
Signed-off-by: Alexandre Mergnat
---
Changes in v2:
- Replace "dcdc-gpio" by "enable-gpio" because this pin enable the
Power IC supply. Also, this property come from panel-common.
- Remove height-mm and width-mm since they are useless here.
- Re-order
Build Startek KD070FHFID015 panel driver. This MIPI-DSI display
can be used for the mt8365-evk board for example.
Signed-off-by: Alexandre Mergnat
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
Sorry, I'm gonna send a V8 to fix this ASAP
On 03/09/2024 19:14, Mark Brown wrote:
On Mon, Jul 22, 2024 at 08:53:41AM +0200, amerg...@baylibre.com wrote:
From: Nicolas Belin
Add the support of MT6357 PMIC audio codec.
This breaks the build:
/build/stage/linux/sound/soc/codecs/mt6357.c: In
Reviewed-by: Alexandre Mergnat
On 22/08/2023 15:26, Jason-JH.Lin wrote:
Add spinlock protection to avoid race condition on vblank event
between mtk_drm_crtc_atomic_begin() and mtk_drm_finish_page_flip().
--
Regards,
Alexandre
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