t; On Sun, Apr 20, 2025 at 09:19:43PM +0900, Alexandre Courbot wrote:
>>
>> +#[repr(u8)]
>> +#[derive(Debug, Default, Copy, Clone)]
>> +pub(crate) enum FalconSecurityModel {
>> +#[default]
>> +None = 0,
>> +Light = 2,
>> +Heavy = 3,
>&
On Thu May 1, 2025 at 3:16 AM JST, Danilo Krummrich wrote:
> On Wed, Apr 30, 2025 at 10:38:11AM -0400, Joel Fernandes wrote:
>> On 4/30/2025 9:25 AM, Alexandre Courbot wrote:
>> > On Tue Apr 22, 2025 at 11:44 PM JST, Danilo Krummrich wrote:
>>
>> >>> +///
These properties are very useful to have and should be accessible.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 14 ++
1 file changed, 14 insertions(+)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index
605e01e35715667f93297fd9ec49d8e7032e0910
We will extend the firmware methods, so move it to its own module
instead to keep gpu.rs focused.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 46 +--
drivers/gpu/nova-core/gpu.rs | 35 +++--
2 files
We will need to perform things like allocating DMA memory during device
creation, so make sure to take the device context that will allow us to
perform these actions.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 5 -
1 file changed, 4 insertions(+), 1 deletion
proper error as needed.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 3 +--
drivers/gpu/nova-core/nova_core.rs | 18 ++
drivers/gpu/nova-core/regs/macros.rs | 1 +
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core
Functions that take a &Devres as argument might need to print error
messages related on behalf the device. Providing the reference here
removes the need for drivers to store their own for that sole purpose.
Signed-off-by: Alexandre Courbot
---
rust/kernel/devres.rs | 6 ++
1 file change
x27;s fields]
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs| 3 -
drivers/gpu/nova-core/firmware.rs | 18 ++
drivers/gpu/nova-core/firmware/fwsec.rs | 360
drivers/gpu/nova-core/gpu.rs| 20 +-
drivers/gpu/nova
From: Joel Fernandes
This will be used in the nova-core driver where we need to upward-align
the image size to get to the next image in the VBIOS ROM.
[acour...@nvidia.com: handled conflicts due to removal of patch creating
num.rs]
Signed-off-by: Joel Fernandes
Signed-off-by: Alexandre
On Thu May 1, 2025 at 9:22 AM JST, Joel Fernandes wrote:
> Hi Alex,
>
> On 4/30/2025 8:09 PM, Alexandre Courbot wrote:
>>>> I am just not seeing the benefits of not using dyn for
>>>> this use case and only drawbacks. IMHO, we should try to not be doing the
>>
On Thu May 1, 2025 at 10:52 PM JST, Joel Fernandes wrote:
> Hello Alex,
>
> On Thu, May 01, 2025 at 09:58:33PM +0900, Alexandre Courbot wrote:
>> Add the common Falcon code and HAL for Ampere GPUs, and instantiate the
>> GSP and SEC2 Falcons that will be required to boot the G
A page of system memory is reserved so sysmembar can perform a read on
it if a system write occurred since the last flush. Do this early as it
can be required to e.g. reset the GPU falcons.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 51
`read_poll_timeout` [1] once it
is available.
[1]
https://lore.kernel.org/lkml/20250220070611.214262-8-fujita.tomon...@gmail.com/
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/util.rs | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/nova
accessors.
Suggested-by: Danilo Krummrich
Signed-off-by: Alexandre Courbot
---
Documentation/gpu/nova/core/todo.rst | 6 +
drivers/gpu/nova-core/gpu.rs | 10 +-
drivers/gpu/nova-core/regs.rs| 61 ++
drivers/gpu/nova-core/regs/macros.rs | 379
linux-firmware contains a directory for GA100, and it is a defined
chipset in Nouveau.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index
at a different
location than the rest of its bits.
Redefine the register layout to match its actual definition as provided
by OpenRM and expose the fully-constructed "architecture" field through
our own "Architecture" type. The "chipset" pseudo-field is also u
7.199712-1-fujita.tomon...@gmail.com/
Signed-off-by: Alexandre Courbot
---
Changes in v2:
- Rebased on latest nova-next.
- Fixed all clippy warnings.
- Added `count` and `size` methods to `CoherentAllocation`.
- Added method to obtain a reference to the `Device` from a `Devres`
(this is super convenient
We will commonly need to compare chipset versions, so derive the
ordering traits to make that possible. Also derive Copy and Clone since
passing Chipset by value will be more efficient than by reference.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 2 +-
1 file changed, 1
We will use this error in the nova-core driver.
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
3dee3139fcd4379b94748c0ba1965f4e1865b633..083c7b068cf4e185100de96e520c54437898ee72
FWSEC-FRTS is run with the desired address of the FRTS region as
parameter, which we need to compute depending on some hardware
parameters.
Do this in a `FbLayout` structure, that will be later extended to
describe more memory regions used to boot the GSP.
Signed-off-by: Alexandre Courbot
]
[applied changes related to code reorg, prints etc from Danilo Krummrich]
[acour...@nvidia.com: fix clippy warnings]
Cc: Alexandre Courbot
Cc: John Hubbard
Cc: Shirish Baskaran
Cc: Alistair Popple
Cc: Timur Tabi
Cc: Ben Skeggs
Signed-off-by: Joel Fernandes
Signed-off-by: Alexandre Courbot
Add the common Falcon code and HAL for Ampere GPUs, and instantiate the
GSP and SEC2 Falcons that will be required to boot the GSP.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 546 ++
drivers/gpu/nova-core/falcon/gsp.rs
FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
order to initiate the GSP boot process. Introduce the structure that
describes it.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 43 +++
1 file changed, 43
Since we will need to allocate lots of distinct memory chunks to be
shared between GPU and CPU, introduce a type dedicated to that. It is a
light wrapper around CoherentAllocation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs | 60
Upon reset, the GPU executes the GFW_BOOT firmware in order to
initialize its base parameters such as clocks. The driver must ensure
that this step is completed before using the hardware.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/devinit.rs | 43
With all the required pieces in place, load FWSEC-FRTS onto the GSP
falcon, run it, and check that it completed successfully by carving out
the WPR2 region out of framebuffer memory.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 3 ---
drivers/gpu/nova-core/gpu.rs
On Thu Apr 24, 2025 at 12:06 PM JST, Joel Fernandes wrote:
> On April 24, 2025, 1:18 a.m. UTC
> Alexandre Courbot wrote:
>> Since this just renames fields, would you be ok if I squashed this one
>> into the relevant patch of my series, alongside a
>>
>> [joelagn...
On Wed Apr 23, 2025 at 1:23 AM JST, Joel Fernandes wrote:
>
>
> On 4/20/2025 8:19 AM, Alexandre Courbot wrote:
>> We will commonly need to compare chipset versions, so derive the
>> ordering traits to make that possible. Also derive Copy and Clone since
>> passing Ch
Since this just renames fields, would you be ok if I squashed this one
into the relevant patch of my series, alongside a
[joelagn...@nvidia.com: give better names to FalconAppifHdrV1's fields]
?
On Thu Apr 24, 2025 at 7:54 AM JST, Joel Fernandes wrote:
> Signed-off-by: Joel Fernandes
> ---
> d
Hi Danilo,
On Tue Apr 22, 2025 at 7:29 PM JST, Danilo Krummrich wrote:
> On Sun, Apr 20, 2025 at 09:19:38PM +0900, Alexandre Courbot wrote:
>> Add the register!() macro, which defines a given register's layout and
>> provide bit-field accessors with a way to convert them to a
On Tue Apr 22, 2025 at 8:36 PM JST, Danilo Krummrich wrote:
> On Sun, Apr 20, 2025 at 09:19:40PM +0900, Alexandre Courbot wrote:
>> Upon reset, the GPU executes the GFW_BOOT firmware in order to
>> initialize its base parameters such as clocks. The driver must ensure
>> that t
On Tue Apr 22, 2025 at 9:07 PM JST, Danilo Krummrich wrote:
> On Sun, Apr 20, 2025 at 09:19:42PM +0900, Alexandre Courbot wrote:
>> Add a timer that works with GPU time and provides the ability to wait on
>> a condition with a specific timeout.
>
> What can this timer do for
On Sat May 3, 2025 at 4:59 AM JST, Joel Fernandes wrote:
> Hello, Alex,
>
> On 5/2/2025 12:57 AM, Alexandre Courbot wrote:
>> On Thu May 1, 2025 at 9:58 PM JST, Alexandre Courbot wrote:
>>> From: Joel Fernandes
>>>
>>> This will be used in the nova
On Sat May 3, 2025 at 12:02 PM JST, Joel Fernandes wrote:
>
>
> On 5/2/2025 9:59 PM, Alexandre Courbot wrote:
>>> pub trait AlignUp {
>>> fn align_up(self, alignment: Self) -> Self;
>>> }
>>>
>>> macro_rules! align_up_impl {
>>>
On Fri May 2, 2025 at 12:19 AM JST, Timur Tabi wrote:
> On Thu, 2025-05-01 at 21:58 +0900, Alexandre Courbot wrote:
>
>
>> +impl UsizeAlign for usize {
>> + fn align_up(mut self, align: usize) -> usize {
>> + self = (self + align - 1) &a
On Thu May 1, 2025 at 9:58 PM JST, Alexandre Courbot wrote:
> From: Joel Fernandes
>
> This will be used in the nova-core driver where we need to upward-align
> the image size to get to the next image in the VBIOS ROM.
>
> [acour...@nvidia.com: handled conflicts due to removal
On Sat May 3, 2025 at 12:02 PM JST, Joel Fernandes wrote:
>
>
> On 5/2/2025 9:59 PM, Alexandre Courbot wrote:
>>> pub trait AlignUp {
>>> fn align_up(self, alignment: Self) -> Self;
>>> }
>>>
>>> macro_rules! align_up_impl {
>>>
Since we will need to allocate lots of distinct memory chunks to be
shared between GPU and CPU, introduce a type dedicated to that. It is a
light wrapper around CoherentAllocation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs | 60
On Tue May 6, 2025 at 12:25 AM JST, Joel Fernandes wrote:
>> Actually it may be a good idea to move this into its own patch/series so
>> it gets more attention as this is starting to look like the `num` or
>> `num_integer` crates and we might be well-advised to take more
>> inspiration from them in
On Sat May 3, 2025 at 6:14 AM JST, Timur Tabi wrote:
> On Thu, 2025-05-01 at 21:58 +0900, Alexandre Courbot wrote:
>> +pub(crate) const FIRMWARE_VERSION: &str = "535.113.01";
>
> This needs to change to 570.144. You can find images to use here:
>
> https://githu
These properties are very useful to have and should be accessible.
Signed-off-by: Alexandre Courbot
---
rust/kernel/dma.rs | 14 ++
1 file changed, 14 insertions(+)
diff --git a/rust/kernel/dma.rs b/rust/kernel/dma.rs
index
605e01e35715667f93297fd9ec49d8e7032e0910
We will commonly need to compare chipset versions, so derive the
ordering traits to make that possible. Also derive Copy and Clone since
passing Chipset by value will be more efficient than by reference.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 2 +-
1 file changed, 1
order for a smooth review.
[1]
https://lore.kernel.org/rust-for-linux/20250503040802.1411285-1-joelagn...@nvidia.com/
Signed-off-by: Alexandre Courbot
---
Changes in v3:
- Rebased on top of latest nova-next.
- Use the new Devres::access() and remove the now unneeded with_bar!()
macro.
- Dro
We will need to perform things like allocating DMA memory during device
creation, so make sure to take the device context that will allow us to
perform these actions. This also allows us to use Devres::access to
obtain the BAR without holding a RCU lock.
Signed-off-by: Alexandre Courbot
FWSEC-FRTS is run with the desired address of the FRTS region as
parameter, which we need to compute depending on some hardware
parameters.
Do this in a `FbLayout` structure, that will be later extended to
describe more memory regions used to boot the GSP.
Signed-off-by: Alexandre Courbot
Add the common Falcon code and HAL for Ampere GPUs, and instantiate the
GSP and SEC2 Falcons that will be required to boot the GSP.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 540 ++
drivers/gpu/nova-core/falcon/gsp.rs
With all the required pieces in place, load FWSEC-FRTS onto the GSP
falcon, run it, and check that it successfully carved out the WPR2
region out of framebuffer memory.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 3 ---
drivers/gpu/nova-core/gpu.rs| 57
From: Joel Fernandes
This will be used in the nova-core driver where we need to upward-align
the image size to get to the next image in the VBIOS ROM.
[acour...@nvidia.com: handled conflicts due to removal of patch creating
num.rs]
Signed-off-by: Joel Fernandes
Signed-off-by: Alexandre
We will use this error in the nova-core driver.
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
3dee3139fcd4379b94748c0ba1965f4e1865b633..083c7b068cf4e185100de96e520c54437898ee72
x27;s fields]
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs| 3 -
drivers/gpu/nova-core/firmware.rs | 18 ++
drivers/gpu/nova-core/firmware/fwsec.rs | 359
drivers/gpu/nova-core/gpu.rs| 20 +-
drivers/gpu/nova
accessors.
Suggested-by: Danilo Krummrich
Signed-off-by: Alexandre Courbot
---
Documentation/gpu/nova/core/todo.rst | 6 +
drivers/gpu/nova-core/gpu.rs | 10 +-
drivers/gpu/nova-core/regs.rs| 61 ++
drivers/gpu/nova-core/regs/macros.rs | 380
We will extend the firmware methods, so move it to its own module
instead to keep gpu.rs focused.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 46 +--
drivers/gpu/nova-core/gpu.rs | 35 +++--
2 files
Upon reset, the GPU executes the GFW_BOOT firmware in order to
initialize its base parameters such as clocks. The driver must ensure
that this step is completed before using the hardware.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/devinit.rs | 38
A page of system memory is reserved so sysmembar can perform a read on
it if a system write occurred since the last flush. Do this early as it
can be required to e.g. reset the GPU falcons.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 45
`read_poll_timeout` [1] once it
is available.
[1]
https://lore.kernel.org/lkml/20250220070611.214262-8-fujita.tomon...@gmail.com/
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/util.rs | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/nova
at a different
location than the rest of its bits.
Redefine the register layout to match its actual definition as provided
by OpenRM and expose the fully-constructed "architecture" field through
our own "Architecture" type. The "chipset" pseudo-field is also u
FWSEC-FRTS is the first firmware we need to run on the GSP falcon in
order to initiate the GSP boot process. Introduce the structure that
describes it.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/firmware.rs | 43 +++
1 file changed, 43
will be extended with other useful
operations, and similar extension traits implemented for other types.
Signed-off-by: Alexandre Courbot
---
rust/kernel/lib.rs | 1 +
rust/kernel/num.rs | 32
2 files changed, 33 insertions(+)
diff --git a/rust/kernel/lib.rs b
in the current code), but they seem to be monomorphized as well.
Calling extra functions could work better, but looks also less elegant
to me, so I am really open to suggestions here.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs| 4 +-
drivers/gpu/nova-core/gp
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
f6ecf09cb65f4ebe9b88da68b3830ae79aa4f182..8858eb13b3df674b54572d2a371b8ec1303492dd
100644
--- a/rust/kernel/error.rs
+++ b/rust/kernel
eful for other
drivers as well. The last patch is the naive implementation of the timer
device. I don't expect it to stay this way at all, so please point out
all the deficiencies in this very early code! :)
[1] https://lore.kernel.org/nouveau/20250209173048.17398-1-d...@kernel.org/
Si
On Wed Feb 19, 2025 at 5:51 AM JST, Timur Tabi wrote:
> On Tue, 2025-02-18 at 22:16 +0900, Alexandre Courbot wrote:
>> > A proper struct with `high` and `low` might be more verbose, but
>> > it rules out this issue.
>>
>> Mmm indeed, so we would have clien
Hi Daniel!
On Tue Feb 18, 2025 at 6:10 AM JST, Daniel Almeida wrote:
> Hi Alex,
>
>> On 17 Feb 2025, at 11:04, Alexandre Courbot wrote:
>>
>> It is common to build a u64 from its high and low parts obtained from
>> two 32-bit registers. Conversely, it is also com
On Tue Feb 18, 2025 at 5:07 PM JST, Greg KH wrote:
> On Mon, Feb 17, 2025 at 04:48:13PM +0100, Simona Vetter wrote:
>> On Mon, Feb 17, 2025 at 11:04:45PM +0900, Alexandre Courbot wrote:
>> > Hi everyone,
>> >
>> > This short RFC is based on top of Danilo'
Hi Danilo,
On Tue Feb 18, 2025 at 6:33 AM JST, Danilo Krummrich wrote:
> Hi Alex,
>
> On Mon, Feb 17, 2025 at 11:04:45PM +0900, Alexandre Courbot wrote:
>> Hi everyone,
>>
>> This short RFC is based on top of Danilo's initial driver stub series
>> [1] and ha
On Tue Feb 18, 2025 at 7:07 PM JST, Dirk Behme wrote:
> On 17/02/2025 15:04, Alexandre Courbot wrote:
>> It is common to build a u64 from its high and low parts obtained from
>> two 32-bit registers. Conversely, it is also common to split a u64 into
>> two u32s to write them i
Hi Dave,
On Tue Feb 18, 2025 at 10:42 AM JST, Dave Airlie wrote:
> On Tue, 18 Feb 2025 at 00:04, Alexandre Courbot wrote:
>>
>> Hi everyone,
>>
>> This short RFC is based on top of Danilo's initial driver stub series
>> [1] and has for goal to initiate
On Wed Feb 19, 2025 at 12:24 PM JST, John Hubbard wrote:
> On 2/18/25 5:21 PM, Alexandre Courbot wrote:
>> On Wed Feb 19, 2025 at 5:51 AM JST, Timur Tabi wrote:
>>> On Tue, 2025-02-18 at 22:16 +0900, Alexandre Courbot wrote:
> ...
>> More likely this would be something l
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
1e510181432cceae46219f7ed3597a88b85ebe0a..475d14a4830774aa7717d3b5e70c7ff9de203dc2
100644
--- a/rust/kernel/error.rs
+++ b/rust/kernel
will be extended with other useful
operations, and similar extension traits implemented for other types.
Signed-off-by: Alexandre Courbot
---
rust/kernel/lib.rs | 1 +
rust/kernel/num.rs | 43 +++
2 files changed, 44 insertions(+)
diff --git a/rust/kernel
cause of an invalid value.
The ending string at the end of each line is optional, and expands to
doc comments for the type itself, or each of the field accessors.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 2 +-
drivers/gpu/nova-core/regs.rs | 195 +++
in the current code), but they seem to be monomorphized as well.
Calling extra functions could work better, but looks also less elegant
to me, so I am really open to suggestions here.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs| 4 +-
drivers/gpu/nova-core/gpu
This is still very preliminary work, and is mostly designed to show how
register fields can be turned into safe types that force us to handle
invalid values.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs| 2 +-
drivers/gpu/nova-core/falcon.rs| 124
Hi Danilo,
On Thu Feb 27, 2025 at 2:55 AM JST, Danilo Krummrich wrote:
> Add the initial nova-core driver stub.
>
> nova-core is intended to serve as a common base for nova-drm (the
> corresponding DRM driver) and the vGPU manager VFIO driver, serving as a
> hard- and firmware abstraction layer fo
ation to define more registers and
exercise the register definition macro.
- Link to v1:
https://lore.kernel.org/r/20250217-nova_timer-v1-0-78c5ace2d...@nvidia.com
---
Alexandre Courbot (5):
rust: add useful ops for u64
rust: make ETIMEDOUT error available
gpu: nova-core: add regis
rastructure.
>
> Signed-off-by: Danilo Krummrich
Reviewed-by: Alexandre Courbot
Thanks for this - the todo list in particular is super helpful to
understand which components outside of the driver we need to include or
drive to completion.
gmx28B3BQ?si=sBdSEer4tAPKGpOs [3]
> Signed-off-by: Danilo Krummrich
A couple of nits inline below, but feel free to add my
Reviewed-by: Alexandre Courbot
> ---
> MAINTAINERS| 10 ++
> drivers/gpu/Makefile | 1 +
> drivers/gpu/nova-core/K
On Thu Feb 20, 2025 at 9:14 AM JST, John Hubbard wrote:
> On 2/19/25 3:13 PM, Daniel Almeida wrote:
>>> On 19 Feb 2025, at 17:23, Dave Airlie wrote:
>>> On Thu, 20 Feb 2025 at 06:22, John Hubbard wrote:
>>>> On 2/19/25 4:51 AM, Alexandre Courbot wrote:
>>&
On Tue Feb 18, 2025 at 10:46 AM JST, Dave Airlie wrote:
>> 1. How to avoid unnecessary calls to try_access().
>>
>> This is why I made Boot0.read() take a &RevocableGuard<'_, Bar0> as
>> argument. I
>> think we can just call try_access() once and then propage the guard through
>> the
>> callchain
On Mon Feb 24, 2025 at 9:07 PM JST, Danilo Krummrich wrote:
> CC: Gary
>
> On Mon, Feb 24, 2025 at 10:40:00AM +0900, Alexandre Courbot wrote:
>> This inability to sleep while we are accessing registers seems very
>> constraining to me, if not dangerous. It is pretty common
On Wed Feb 26, 2025 at 12:06 AM JST, Danilo Krummrich wrote:
> On Tue, Feb 25, 2025 at 11:11:07PM +0900, Alexandre Courbot wrote:
>> On Mon Feb 24, 2025 at 9:07 PM JST, Danilo Krummrich wrote:
>> > CC: Gary
>> >
>> > On Mon, Feb 24, 2025 at 10:40:00AM +0900,
Use the register!() macro to define the layout for the Boot0 register
and use its accessors through the use of the convenience with_bar!()
macro, which uses Revocable::try_access() and converts its returned
Option into the proper error as needed.
Signed-off-by: Alexandre Courbot
---
drivers/gpu
On Sat Mar 22, 2025 at 1:20 AM JST, Daniel Brooks wrote:
> "Alexandre Courbot" writes:
>
>> Hi Boqun,
>>
>> On Fri Mar 21, 2025 at 3:17 AM JST, Boqun Feng wrote:
>>> Also an Instant type has been proposed and reviewed for a while:
>>>
linux-firmware contains a directory for GA100, and it is a defined
chipset in Nouveau.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gpu.rs | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs
index
]
[applied changes related to code reorg, prints etc from Danilo Krummrich]
[acour...@nvidia.com: fix clippy warnings]
[acour...@nvidia.com: remove now-unneeded Devres acquisition]
[acour...@nvidia.com: fix read_more to read `len` bytes, not u32s]
Cc: Alexandre Courbot
Cc: John Hubbard
Cc: Shirish
On Tue May 13, 2025 at 11:07 PM JST, Danilo Krummrich wrote:
> On Wed, May 07, 2025 at 10:52:36PM +0900, Alexandre Courbot wrote:
>> Upon reset, the GPU executes the GFW_BOOT firmware in order to
>> initialize its base parameters such as clocks. The driver must ensure
>&
On Wed May 14, 2025 at 1:19 AM JST, Danilo Krummrich wrote:
>> +util::wait_on(Duration::from_millis(20), || {
>> +let r = regs::NV_PFALCON_FALCON_HWCFG2::read(bar, E::BASE);
>> +if r.mem_scrubbing() {
>> +Some(())
>> +} else {
>> +
On Wed May 14, 2025 at 1:41 AM JST, Danilo Krummrich wrote:
>> diff --git a/drivers/gpu/nova-core/gsp/fb.rs
>> b/drivers/gpu/nova-core/gsp/fb.rs
>> new file mode 100644
>> index
>> ..f28ded59469d52daf39e5d19c09efd7bf08fee92
>> --- /dev/null
>> +++ b/driver
The Turing+ register address space spans over that range, so increase it
as future patches will access more registers.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/driver.rs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/nova-core/driver.rs b
Since we will need to allocate lots of distinct memory chunks to be
shared between GPU and CPU, introduce a type dedicated to that. It is a
light wrapper around CoherentAllocation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/dma.rs | 61
Upon reset, the GPU executes the GFW (GPU Firmware) in order to
initialize its base parameters such as clocks. The driver must ensure
that this step is completed before using the hardware.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/gfw.rs | 37
This macro is pretty complex, and most rules are just helper, so add a
delimiter to indicate when users only interested in using it can stop
reading.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/nova
Fix the paths that were not absolute to prevent a potential local module
from being picked up.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b
, and with different fields and documentation.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/regs/macros.rs | 40 ++--
1 file changed, 38 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/nova-core/regs/macros.rs
b/drivers/gpu/nova-core/regs/macr
a.com/
Signed-off-by: Alexandre Courbot
---
Changes in v4:
- Improve documentation of falcon security modes (thanks Joel!)
- Add the definition of the size of CoherentAllocation as one of its
invariants.
- Better document GFW boot progress, registers and use wait_on() helper,
and move it to `gfw` m
Although we want to access registers using the provided methods, it is
sometimes needed to use their raw offset, for instance when working with
a register array.
Expose the offset of each register using a type constant to avoid
resorting to hardcoded values.
Signed-off-by: Alexandre Courbot
nova-core will need to use SZ_1M, so make the remaining constants
available.
Signed-off-by: Alexandre Courbot
---
rust/kernel/sizes.rs | 24
1 file changed, 24 insertions(+)
diff --git a/rust/kernel/sizes.rs b/rust/kernel/sizes.rs
index
We will use this error in the nova-core driver.
Signed-off-by: Alexandre Courbot
---
rust/kernel/error.rs | 1 +
1 file changed, 1 insertion(+)
diff --git a/rust/kernel/error.rs b/rust/kernel/error.rs
index
3dee3139fcd4379b94748c0ba1965f4e1865b633..083c7b068cf4e185100de96e520c54437898ee72
Add the common Falcon code and HAL for Ampere GPUs, and instantiate the
GSP and SEC2 Falcons that will be required to boot the GSP.
Signed-off-by: Alexandre Courbot
---
drivers/gpu/nova-core/falcon.rs | 560 ++
drivers/gpu/nova-core/falcon/gsp.rs
dropped as we need to use
wrapping operations, which are not provided by any trait.
Co-developed-by: Joel Fernandes
Signed-off-by: Joel Fernandes
Signed-off-by: Alexandre Courbot
---
rust/kernel/lib.rs | 1 +
rust/kernel/num.rs | 82 ++
2 files
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