Hi Sam,
On Mon, 11 Oct 2021 22:29:30 +0200, Sam Ravnborg wrote:
> > VCC needs to be enabled before releasing the enable GPIO.
> >
> > Signed-off-by: Alexander Stein
> > ---
> > drivers/gpu/drm/bridge/ti-sn65dsi83.c | 15 ++-
> > 1 file c
From: Laurent Pinchart
The SN65DSI8x EN signal may be tied to VCC, or otherwise controlled by
means not available to the kernel. Make the GPIO optional.
Signed-off-by: Laurent Pinchart
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 1
Add a VCC regulator which needs to be enabled before the EN pin is
released.
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings
Changes in V2 of this set:
* Add patch from Laurent for fixing the binding regarding optional GPIO
* Reorder patches so bindings are changed beforehand
* Add small fixes from Sam's review
Alexander Stein (3):
drm/bridge: ti-sn65dsi83: Make enable GPIO optional
dt-bindings: drm/bridg
The enable signal may not be controllable by the kernel. Make it
optional.
This is a similar to commit bbda1704fc15 ("drm/bridge: ti-sn65dsi86: Make
enable GPIO optional")
Reviewed-by: Laurent Pinchart
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
drivers/gpu/drm
VCC needs to be enabled before releasing the enable GPIO.
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu
Hello Laurent,
On Tue, Oct 12, 2021 at 10:43 +0200, Laurent Pinchart wrote:
> On Tue, Oct 12, 2021 at 08:48:43AM +0200, Alexander Stein wrote:
> > VCC needs to be enabled before releasing the enable GPIO.
> >
> > Reviewed-by: Sam Ravnborg
> > Signed-off-by: Alexander
patches so bindings are changed beforehand
* Add small fixes from Sam's review
Alexander Stein (3):
drm/bridge: ti-sn65dsi83: Make enable GPIO optional
dt-bindings: drm/bridge: ti-sn65dsi83: Add vcc supply bindings
drm/bridge: ti-sn65dsi83: Add vcc supply regulator support
Laurent Pin
VCC needs to be enabled before releasing the enable GPIO.
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu/drm/bridge
The enable signal may not be controllable by the kernel. Make it
optional.
This is a similar to commit bbda1704fc15 ("drm/bridge: ti-sn65dsi86: Make
enable GPIO optional")
Reviewed-by: Laurent Pinchart
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
drivers/gpu/drm
From: Laurent Pinchart
The SN65DSI8x EN signal may be tied to VCC, or otherwise controlled by
means not available to the kernel. Make the GPIO optional.
Signed-off-by: Laurent Pinchart
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 1
Add a VCC regulator which needs to be enabled before the EN pin is
released.
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings
VCC needs to be enabled before releasing the enable GPIO.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
Add a VCC regulator which needs to be enabled before the EN pin is
released.
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83
ings/display/bridge/ti,sn65dsi83.yaml
> +++ b/Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml
> @@ -93,7 +93,6 @@ properties:
> required:
>- compatible
>- reg
> - - enable-gpios
>- ports
>
> allOf:
>
> base-commit: 1e39445
On Wed, Oct 6, 2021 at 3:21 PM Rob Herring
wrote:
> On Wed, Oct 6, 2021 at 2:47 AM Alexander Stein
> wrote:
> >
> > Add a VCC regulator which needs to be enabled before the EN pin is
> > released.
> >
> > Signed-off-by: Alexander Stein
> > ---
>
The enable signal may not be controllable by the kernel. Make it
optional.
This is a similar to commit bbda1704fc15 ("drm/bridge: ti-sn65dsi86: Make
enable GPIO optional")
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 2 +-
1 file changed, 1 insertion(+),
Use the dev_err_probe() helper, instead of open-coding the same
operation. This also adds a nice hint in
/sys/kernel/debug/devices_deferred.
Signed-off-by: Alexander Stein
---
Based on next-20220120
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff
Do not deference the NULL pointer if the bridge does not return a
bridge state. Assume a fixed format instead.
Fixes: commit b776b0f00f24 ("drm: mxsfb: Use bus_format from the nearest bridge
if present")
Signed-off-by: Alexander Stein
---
This can happen if a "ti,sn75lvds83&
Am Freitag, 21. Januar 2022, 14:14:01 CET schrieb Marek Vasut:
> On 1/21/22 14:12, Alexander Stein wrote:
> > Do not deference the NULL pointer if the bridge does not return a
> > bridge state. Assume a fixed format instead.
> >
> > Fixes: commit b776b0f00f24 ("drm
/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220121131238.507567-1-alexander.st...@ew.tq-group.com/
Alexander Stein (2):
drm: mxsfb: Use dev_err_probe() helper
drm: mxsfb: Fix NULL pointer dereference
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 3 +--
drivers/gpu/drm/mxsfb
Use the dev_err_probe() helper, instead of open-coding the same
operation. This also adds a nice hint in
/sys/kernel/debug/devices_deferred.
Reviewed-by: Marek Vasut
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions
mxsfb should not never dereference the NULL pointer which
drm_atomic_get_new_bridge_state is allowed to return.
Assume a fixed format instead.
Fixes: commit b776b0f00f24 ("drm: mxsfb: Use bus_format from the nearest bridge
if present")
Signed-off-by: Alexander Stein
---
drivers/gpu
Am Mittwoch, 2. Februar 2022, 09:29:20 CET schrieb Marek Vasut:
> On 2/2/22 09:17, Alexander Stein wrote:
> > Use the dev_err_probe() helper, instead of open-coding the same
> > operation. This also adds a nice hint in
> > /sys/kernel/debug/devices_deferred.
> >
&
Am Mittwoch, 2. Februar 2022, 09:30:38 CET schrieb Marek Vasut:
> On 2/2/22 09:17, Alexander Stein wrote:
> > mxsfb should not never dereference the NULL pointer which
>
> ... not ever ... but that's really a nitpick.
Doh, I just copied it from my mail...
You want me to
forehand
* Add small fixes from Sam's review
Alexander Stein (3):
drm/bridge: ti-sn65dsi83: Make enable GPIO optional
dt-bindings: drm/bridge: ti-sn65dsi83: Add vcc supply bindings
drm/bridge: ti-sn65dsi83: Add vcc supply regulator support
Laurent Pinchart (1):
dt-bindings: display
VCC needs to be enabled before releasing the enable GPIO.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu/drm/bridge/ti-sn65dsi83.c
index
The enable signal may not be controllable by the kernel. Make it
optional.
This is a similar to commit bbda1704fc15 ("drm/bridge: ti-sn65dsi86: Make
enable GPIO optional")
Reviewed-by: Laurent Pinchart
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
drivers/gpu/drm
Add a VCC regulator which needs to be enabled before the EN pin is
released.
Reviewed-by: Sam Ravnborg
Acked-by: Rob Herring
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation
From: Laurent Pinchart
The SN65DSI8x EN signal may be tied to VCC, or otherwise controlled by
means not available to the kernel. Make the GPIO optional.
Signed-off-by: Laurent Pinchart
Acked-by: Rob Herring
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti
Am Donnerstag, dem 09.12.2021 um 12:37 +0530 schrieb Jagan Teki:
> On Thu, Nov 18, 2021 at 2:50 PM Alexander Stein
> <
> alexander.st...@ew.tq-group.com
> > wrote:
> > From: Laurent Pinchart <
> > laurent.pinch...@ideasonboard.com
> > >
> >
&g
enable/disable to sn65dsi83_atomic_pre_enable and
sn65dsi83_atomic_disable
Changes in V2 of this set:
* Add patch from Laurent for fixing the binding regarding optional GPIO
* Reorder patches so bindings are changed beforehand
* Add small fixes from Sam's review
Alexander Stein (3):
drm/bridge: ti-sn65dsi83: Ma
From: Laurent Pinchart
The SN65DSI8x EN signal may be tied to VCC, or otherwise controlled by
means not available to the kernel. Make the GPIO optional.
Signed-off-by: Laurent Pinchart
Acked-by: Rob Herring
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti
The enable signal may not be controllable by the kernel. Make it
optional.
This is a similar to commit bbda1704fc15 ("drm/bridge: ti-sn65dsi86: Make
enable GPIO optional")
Reviewed-by: Laurent Pinchart
Reviewed-by: Sam Ravnborg
Signed-off-by: Alexander Stein
---
drivers/gpu/drm
Add a VCC regulator which needs to be enabled before the EN pin is
released.
Reviewed-by: Sam Ravnborg
Acked-by: Rob Herring
Reviewed-by: Jagan Teki
Signed-off-by: Alexander Stein
---
.../devicetree/bindings/display/bridge/ti,sn65dsi83.yaml | 4
1 file changed, 4 insertions
VCC needs to be enabled before releasing the enable GPIO.
Reviewed-by: Laurent Pinchart
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c
b/drivers/gpu/drm
Am Donnerstag, 9. Juni 2022, 08:49:26 CEST schrieb Liu Ying:
> This patch adds a helper to support LDB drm bridge drivers for
> i.MX SoCs. Helper functions supported by this helper should
> implement common logics for all LDB modules embedded in i.MX SoCs.
>
> Tested-by: Marcel Ziswiler # Colibr
Hi,
Am Freitag, 10. Juni 2022, 05:01:21 CEST schrieb Liu Ying:
> > reading this I got reminded of fsl-ldb [1], which is accepted
> > already. At a
> > first glance reading the RM the LDB peripheral are similar, although
> > not
> > identical. Is it worth merging them into one driver (at some point
Add more warning/debug messages during probe. E.g. a single -EPROBE_DEFER
might have several causes, these messages help finding the origin.
Signed-off-by: Alexander Stein
---
* New in v2
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
There is no need to require non-sleeping GPIO access. Silence the
WARN_ON() if GPIO is using e.g. I2C expanders.
Signed-off-by: Alexander Stein
---
Change in v2:
* None
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm
: Could not find backlight
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/panel/panel-simple.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index 4a2e580a2f7b..8fb1c563c96a 100644
--- a
Hi Laurent,
Am Donnerstag, 3. Februar 2022, 00:45:59 CET schrieb Laurent Pinchart:
> [...]
> You're right that there's an issue, but a revert isn't the right option.
> The commit you're reverting never made it in a stable release, because
> it was deemed to not be a good enough option.
>
> First
sn65dsi83_host_attach is called from probe, so silence message upon
deferred probe. This can happen, e.g. if the bridge driver is built-in, but
the host is built as module.
Signed-off-by: Alexander Stein
---
This might look a bit weird in the first place, but the real benefit is
usage of
There is no need to require non-sleeping GPIO access. Silence the
WARN_ON() if GPIO is using e.g. I2C expanders.
Signed-off-by: Alexander Stein
---
If the GPIO is from an expander on I2C, this warning will rise
obviously. Straight forward fix.
drivers/gpu/drm/bridge/ti-sn65dsi83.c | 4 ++--
1
_get_sync()/pm_runtime_put_sync() calls in .atomic_enable
> and .atomic_disable callbacks turn the clock ON and OFF at the right
> time.
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Lucas Stach
> Cc: Peng Fan
> Cc: Robby Cai
>
Hello Jagan,
thanks for the second version of this patchset.
Am Mittwoch, 4. Mai 2022, 13:40:09 CEST schrieb Jagan Teki:
> This series supports common bridge support for Samsung MIPI DSIM
> which is used in Exynos and i.MX8MM SoC's.
>
> Previous v1 can be available here [1].
>
> The final bridg
Hello Jagan,
thanks for the quick response.
Am Donnerstag, 5. Mai 2022, 09:38:48 CEST schrieb Jagan Teki:
> On Thu, May 5, 2022 at 12:57 PM Alexander Stein
>
> wrote:
> > Hello Jagan,
> >
> > thanks for the second version of this patchset.
> >
> >
Am Donnerstag, 5. Mai 2022, 09:38:48 CEST schrieb Jagan Teki:
> On Thu, May 5, 2022 at 12:57 PM Alexander Stein
>
> wrote:
> > Hello Jagan,
> >
> > thanks for the second version of this patchset.
> >
> > Am Mittwoch, 4. Mai 2022, 13:40:09 CEST schrieb
a0e ("drm: lcdif: Add support for i.MX8MP LCDIF variant")
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Lucas Stach
> Cc: Marek Vasut
> Cc: Martyn Welch
> Cc: Peng Fan
> Cc: Robby Cai
> Cc: Sam Ravnborg
Sam Ravnborg
> Reviewed-by: Liu Ying
> Reported-by: Liu Ying
> Tested-by: Martyn Welch
> Fixes: 9db35bb349a0e ("drm: lcdif: Add support for i.MX8MP LCDIF variant")
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Liu Ying
> C
sted-by: Martyn Welch
> Fixes: 9db35bb349a0e ("drm: lcdif: Add support for i.MX8MP LCDIF variant")
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Liu Ying
> Cc: Lucas Stach
> Cc: Marek Vasut
> Cc: Martyn Welch
> Cc: Peng Fa
Hi Marek,
Am Freitag, 6. Mai 2022, 10:57:05 CEST schrieb Marek Szyprowski:
> Hi Alexander,
>
> On 05.05.2022 13:55, Alexander Stein wrote:
> > Am Donnerstag, 5. Mai 2022, 09:38:48 CEST schrieb Jagan Teki:
> >> On Thu, May 5, 2022 at 12:57 PM Alexander Stein
> >>
Hi Lucas,
Am Freitag, 6. Mai 2022, 20:10:25 CEST schrieb Lucas Stach:
> second round of the i.MX8MP HDMI work. Still not split up into proper
> parts for merging through the various trees this needs to go into, but
> should make it easy for people to test.
>
> I've worked in the feedback I got fr
ous LCDIF
> variants. The new LCDIFv3 also supports 36bit address space.
>
> Add a separate driver which is really a fork of MXSFB driver with the
> i.MX8MP LCDIF variant handling filled in.
>
> Signed-off-by: Marek Vasut
> Cc: Alexander Stein
> Cc: Laurent Pinchart
> Cc: Luca
Am Dienstag, 24. Mai 2022, 09:29:43 CEST schrieb Marek Vasut:
> On 5/24/22 09:09, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> > Am Donnerstag, 19. Mai 2022, 13:48:49 CEST schrieb Marek Vasut:
> >> Add support for i.MX8MP LCDIF variant. This is called LCDIFv3
Hi Marek,
Am Dienstag, 24. Mai 2022, 09:29:43 CEST schrieb Marek Vasut:
> On 5/24/22 09:09, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> > Am Donnerstag, 19. Mai 2022, 13:48:49 CEST schrieb Marek Vasut:
> >> Add support for i.MX8MP LCDIF varia
Hi Marco,
Am Montag, 30. Mai 2022, 17:05:48 CEST schrieb Marco Felsch:
> The bridge device can now also be enabled/disabled by an external reset
> controller. So the device now supports either enable/disable by simple
> GPIO or by an Reset-Controller.
>
> Signed-off-by: Marco Felsch
> ---
> ...
Hi Lucas,
Am Mittwoch, 6. April 2022, 18:01:22 CEST schrieb Lucas Stach:
> This adds the DT nodes for all the peripherals that make up the
> HDMI display pipeline.
>
> Signed-off-by: Lucas Stach
> ---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 80 +++
> 1 file changed, 80
ariants. The new LCDIFv3 also supports 36bit address space.
>
> Add a separate driver which is really a fork of MXSFB driver with the
> i.MX8MP LCDIF variant handling filled in.
>
> Tested-by: Alexander Stein
> Tested-by: Martyn Welch
> Signed-off-by: Marek Vasut
> Cc: Ale
Am Mittwoch, 6. April 2022, 11:29:29 CEST schrieb Marek Vasut:
> In case the MXSFB is connected to a bridge, attempt to obtain bus flags
> from that bridge state too. The bus flags may specify e.g. the DE signal
> polarity.
>
> Signed-off-by: Marek Vasut
> Cc: Alexander St
Hi Jagan,
thanks for picking this up again and sending a new version.
Am Freitag, 8. April 2022, 18:20:57 CEST schrieb Jagan Teki:
> This series supports common bridge support for Samsung MIPI DSIM
> which is used in Exynos and i.MX8MM SoC's.
>
> Previous RFC can be available here [1].
>
> The
Hello Lucas,
Am Mittwoch, 6. April 2022, 18:01:13 CEST schrieb Lucas Stach:
> Hi all,
>
> this adds support for the HDMI output pipeline on the i.MX8MP.
> It currently depends on the i.MX8MP HDMI power domain series [1]
> and support for the new LCDIF [2] in the i.MX8MP. I guess the
> implementat
,imx8mm-mipi-dsim
>
> Patch 0013: add i.MX8MM DSIM support
>
> Tested in Engicam i.Core MX8M Mini SoM.
>
> Anyone interested, please have a look on this repo [2]
>
> [2] https://github.com/openedev/kernel/tree/imx8mm-dsi-v2
I suspect you meant https://github.com/openede
quot;)
Signed-off-by: Markus Niebel
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/panel/panel-simple.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b/drivers/gpu/drm/panel/panel-simple.c
index 065f378bba9d..fbccaf1cb6f2 100644
--- a/drivers
Hi Rasmus,
Am Montag, 30. Januar 2023, 13:45:38 CET schrieb Rasmus Villemoes:
> On 27/01/2023 12.30, Marek Vasut wrote:
> > On 1/27/23 12:04, Jagan Teki wrote:
> >>> Thanks, but that's exactly what I'm doing, and I don't see any
> >>> modification of imx8mp.dtsi in that branch. I'm basically looki
Hi,
any feedback on this?
Best regards
Alexander
Am Dienstag, 17. Januar 2023, 12:08:01 CET schrieb Alexander Stein:
> From: Matthias Schiffer
>
> The PIXCLK needs to be enabled in SCFG before accessing certain DCU
> registers, or the access will hang.
>
> Signed-off-by:
Hi,
any feedback on this series?
Best regards,
Alexander
Am Dienstag, 17. Januar 2023, 12:08:00 CET schrieb Alexander Stein:
> fsl_dcu_drm_modeset_init can return -EPROBE_DEFER, so use dev_err_probe
> to remove an invalid error message and add it to deferral description.
>
> S
> - if (!bus_format)
> + if (bus_format == MEDIA_BUS_FMT_FIXED) {
> + dev_warn_once(drm->dev,
> + "Bridge does not provide bus format,
assuming
> MEDIA_BUS_FMT_RGB888_1X24.\n" + "Please fix
bri
Hi Liu,
thanks for the update.
Am Montag, 13. Februar 2023, 09:56:09 CET schrieb Liu Ying:
> Instead of determining LCDIF output bus format and bus flags in
> ->atomic_enable(), do that in ->atomic_check(). This is a
> preparation for the upcoming patch to check consistent bus format
> and bus f
Hi Liu,
thanks for the update.
Am Montag, 13. Februar 2023, 09:56:07 CET schrieb Liu Ying:
> There is one LCDIF embedded in i.MX93 SoC to connect with
> MIPI DSI controller through LCDIF cross line pattern(controlled
> by mediamix blk-ctrl) or connect with LVDS display bridge(LDB)
> directly or c
Hi Liu,
thanks for the update.
Am Montag, 13. Februar 2023, 09:56:11 CET schrieb Liu Ying:
> The single LCDIF embedded in i.MX93 SoC may drive multiple displays
> simultaneously. Look at LCDIF output port's remote port parents to
> find all enabled first bridges. Add an encoder for each found b
lcdif_driver = {
>
> static const struct of_device_id lcdif_dt_ids[] = {
> { .compatible = "fsl,imx8mp-lcdif" },
> + { .compatible = "fsl,imx93-lcdif" },
> { /* sentinel */ }
> };
> MODULE_DEVICE_TABLE(of, lcdif_dt_ids);
Reviewed-by: Alexa
Hi Liu,
thanks for the update.
Am Montag, 13. Februar 2023, 09:56:10 CET schrieb Liu Ying:
> The single LCDIF embedded in i.MX93 SoC may drive multiple displays
> simultaneously. Check bus format and flags across first bridges in
> ->atomic_check() to ensure they are consistent. This is a prepa
Hi Liu,
Am Mittwoch, 15. Februar 2023, 04:44:15 CET schrieb Liu Ying:
> On Tue, 2023-02-14 at 15:12 +0100, Alexander Stein wrote:
> > Hi Liu,
>
> Hi Alexander,
>
> > thanks for the update.
>
> Thanks for your review.
>
> > Am Montag, 13. Febr
Hi Liu,
Am Mittwoch, 15. Februar 2023, 08:49:56 CET schrieb Liu Ying:
> On Wed, 2023-02-15 at 08:26 +0100, Alexander Stein wrote:
> > Hi Liu,
>
> Hi Alexander,
>
> > thanks for the update.
>
> Thanks for the review.
>
> > Am Montag, 13. Februar 2023, 09:
ormat
> and bus flags across all first downstream bridges in ->atomic_check().
> New lcdif_crtc_state structure is introduced to cache bus format
> and bus flags states in ->atomic_check() so that they can be read
> in ->atomic_enable().
>
> Signed-off-by: Liu Ying
Loo
. This is a preparation
> for adding i.MX93 LCDIF support.
>
> Signed-off-by: Liu Ying
Acked-by: Alexander Stein
> ---
> v3->v4:
> * No change.
>
> v2->v3:
> * No change.
>
> v1->v2:
> * Split from patch 2/2 in v1. (Marek, Alexand
for each found bridge
> and attach the bridge to the encoder. This is a preparation for
> adding i.MX93 LCDIF support.
>
> Signed-off-by: Liu Ying
Acked-by: Alexander Stein
> ---
> v3->v4:
> * Improve warning message when ignoring invalid LCDIF OF endpoint ids.
>
ched, so no DSI or parallel display. Hence I could not
test the bus format and flags checks, but they look okay.
So you can add
Tested-by: Alexander Stein
to the whole series as well.
One thing I noticed is that, sometimes it seems that before probing lcdif my
system completely freezes. Adding som
Am Freitag, 17. Februar 2023, 09:55:22 CET schrieb Rasmus Villemoes:
> On 14/02/2023 12.09, Fabio Estevam wrote:
> > Hi Rasmus,
> >
> > On Tue, Feb 14, 2023 at 7:55 AM Rasmus Villemoes
> >
> > wrote:
> >> Well, the data sheet for the dsi86 says up to 750MHz DSI HS clock, and
> >> if the value sp
Hi Liu,
Am Freitag, 17. Februar 2023, 09:59:14 CET schrieb Liu Ying:
> On Fri, 2023-02-17 at 09:18 +0100, Alexander Stein wrote:
> > Hi Liu,
>
> Hi Alexander,
>
> > Am Freitag, 17. Februar 2023, 07:54:01 CET schrieb Liu Ying:
> > > Hi,
> > >
>
Hi Liu,
Am Montag, 20. Februar 2023, 09:55:19 CET schrieb Alexander Stein:
> Hi Liu,
>
> Am Freitag, 17. Februar 2023, 09:59:14 CET schrieb Liu Ying:
> > On Fri, 2023-02-17 at 09:18 +0100, Alexander Stein wrote:
> > > Hi Liu,
> >
> > Hi Alexander,
> >
Hi,
a gentle ping
Best regards,
Alexander
Am Mittwoch, 25. Januar 2023, 15:52:15 CET schrieb Alexander Stein:
> From: Markus Niebel
>
> The DE signal is active high on this display, fill in the missing
> bus_flags. This aligns panel_desc with its display_timing.
>
> Fixes:
At least the pixelclock has a range which can vary. Convert fixed mode
into display timings so they can be overwritten in DT if necessary.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/panel/panel-simple.c | 24
1 file changed, 12 insertions(+), 12 deletions
This helps figuring out why the device probe is deferred.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/bridge/sii902x.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/bridge/sii902x.c b/drivers/gpu/drm/bridge/sii902x.c
index d212ff7f7a87
fsl_dcu_drm_modeset_init can return -EPROBE_DEFER, so use dev_err_probe
to remove an invalid error message and add it to deferral description.
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a
From: Matthias Schiffer
The PIXCLK needs to be enabled in SCFG before accessing certain DCU
registers, or the access will hang.
Signed-off-by: Matthias Schiffer
Signed-off-by: Alexander Stein
---
drivers/gpu/drm/fsl-dcu/Kconfig | 1 +
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 14
Hi everyone,
Am Donnerstag, 8. Dezember 2022, 07:55:38 CET schrieb Alexander Stein:
> The LDB clock needs to be exactly 7-times the pixel clock used by the
> display.
Any feedback on this?
Thanks
Alexander
> Signed-off-by: Alexander Stein
> ---
> i.MX8MP has a dedicated
Hi,
Am Dienstag, 24. Januar 2023, 08:59:39 CET schrieb Liu Ying:
> On Mon, 2023-01-23 at 16:57 +0100, Marek Vasut wrote:
> > On 1/23/23 08:23, Liu Ying wrote:
> > > The LCDIF embedded in i.MX93 SoC is essentially the same to those
> > > in i.MX8mp SoC. However, i.MX93 LCDIF may connect with MIPI
0008: input_bus_flags
>
> Patch 0009: document fsl,imx8mm-mipi-dsim
>
> Patch 0010: add i.MX8MM DSIM support
>
> Tested in Engicam i.Core MX8M Mini SoM.
Thanks for working on this!
This works on TQMa8MQML + MBa8Mx (imx8mm) using a SN65DSI83 DSI-LVDS-Bridge.
Tested-b
Hello Sandor,
thanks for the updated series.
Am Montag, 21. November 2022, 08:23:50 CET schrieb Sandor Yu:
> The patch set initial support for Cadence MHDP(HDMI/DP) DRM bridge
> drivers and Cadence HDP-TX PHY(HDMI/DP) drivers for iMX8MQ.
>
> The patch set compose of DRM bridge drivers and PHY dr
,
>
> /* Deassert reset */
> gpiod_set_value_cansleep(ctx->enable_gpio, 1);
> - usleep_range(1000, 1100);
> + usleep_range(1, 11000);
>
> /* Get the LVDS format from the bridge state. */
> bridge_state = drm_atomic_get_new_bridge_state(state, bridge);
How about using fsleep?
Either way:
Reviewed-by: Alexander Stein
Hello Thomas,
Am Donnerstag, 27. Oktober 2022, 13:57:06 CEST schrieb Thomas Zimmermann:
> Properties of 32-bit integers are returned from the OF device tree
> as type __be32. Cast PCI vendor and device IDs from __be32 to u32
> before comparing them to constants. Fixes sparse warnings shown below.
Hi Thomas,
Am Donnerstag, 27. Oktober 2022, 16:04:34 CEST schrieb Thomas Zimmermann:
> * PGP Signed: 10/27/2022 at 04:04:34 PM
>
> Hi
>
> Am 27.10.22 um 15:07 schrieb Alexander Stein:
> > Hello Thomas,
> >
> > Am Donnerstag, 27. Oktober 2022, 13:57:
Hello,
thanks for working on this and the updated version.
Am Freitag, 4. November 2022, 07:44:56 CET schrieb Sandor Yu:
> Add a new DRM HDMI bridge driver for Candence MHDP used in i.MX8MQ
> SOC. MHDP IP could support HDMI or DisplayPort standards according
> embedded Firmware running in the uCP
Hi Sandor,
Am Mittwoch, 9. November 2022, 14:26:14 CET schrieb Sandor Yu:
> Thanks for your comments.
>
>
> > -Original Message-
> > From: Alexander Stein
> > Sent: 2022年11月8日 21:17
> > To: jo...@kwiboo.se; Sandor Yu
> > Cc: dri-devel@lists.free
i.MX8MP uses 3 clocks, so soften the restrictions for clocks & clock-names.
Fixes: f5419cb0743f ("dt-bindings: lcdif: Add compatible for i.MX8MP")
Signed-off-by: Alexander Stein
---
Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 4 +++-
1 file changed, 3 insertions(
i.MX8MP requires a power-domain for this peripheral to use. Add it as
an optional property.
Signed-off-by: Alexander Stein
---
Documentation/devicetree/bindings/display/fsl,lcdif.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/fsl,lcdif.yaml
Am Mittwoch, 7. Dezember 2022, 17:00:22 CET schrieb Marek Vasut:
> On 12/7/22 16:14, Alexander Stein wrote:
> > i.MX8MP requires a power-domain for this peripheral to use. Add it as
> > an optional property.
> >
> > Signed-off-by: Alexander Stein
> > ---
&g
Hello Marek,
Am Mittwoch, 7. Dezember 2022, 16:59:50 CET schrieb Marek Vasut:
> On 12/7/22 16:13, Alexander Stein wrote:
> > i.MX8MP uses 3 clocks, so soften the restrictions for clocks &
> > clock-names.
> >
> > Fixes: f5419cb0743f ("dt-bindings: lcdif: Add
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