From: Jerome Glisse
GPU reset need to be exclusive, one happening at a time. For this
add a rw semaphore so that any path that trigger GPU activities
have to take the semaphore as a reader thus allowing concurency.
The GPU reset path take the semaphore as a writer ensuring that
no concurrent res
From: Jerome Glisse
Retry label was at wrong place in function leading to memory
leak.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_object.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_object.c
b/drivers/gpu/drm
From: Jerome Glisse
To have kernel behave like VGA/DVI we need to retrain link
on hotplug. For this to happen with need to report that
we need to link training to happen if we fail to get link
status and we need to force link training to happen by
setting connector dpms to off before asking it on
From: Jerome Glisse
We want to print link status query failed only if it's
an unexepected fail. If we query to see if we need
link training it might be because there is nothing
connected and thus link status query have the right
to fail in that case.
To avoid printing failure when it's expected,
From: Jerome Glisse
We should not turn off the connector neither try to retrain DP link
if a passive DP adaptor is connected to a DP port.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_connectors.c | 22 --
1 file changed, 20 insertions(+), 2 deletio
From: Jerome Glisse
The external encoder need to be setup again before enabling the
transmiter. This seems to be only needed on some trinity/aruba
to fix dpms on.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atombios_encoders.c |6 --
1 file changed, 4 insertions(+), 2
From: Jerome Glisse
The external encoder need to be setup again before enabling the
transmiter. This seems to be only needed on some trinity/aruba
to fix dpms on.
v2: Add comment, only setup again on dce6 ie aruba or newer.
Cc:
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atombios
From: Jerome Glisse
When we change start address of vram for the GPU memory controller
we need to make sure that nothing in the GPU still use the old vram
address. This patch cleanup and fix crtc address.
However there is still someissue somewhere if we reenable the crtc
after updating the addre
So first patch is a fix in itself, smallest possible and should go to
stable. Second patch is an improvement as a first step to flicker free
boot.
I have yet extensively tested second patch, especialy not on AGP but
so far on few GPU/motherboard it looks good. It can probably wait 3.7.
Will test i
From: Jerome Glisse
It seems we can not update the crtc scanout address. After disabling
crtc, update to base address do not take effect after crtc being
reenable leading to at least frame being scanout from the old crtc
base address. Disabling crtc display request lead to same behavior.
So afte
From: Jerome Glisse
It seems we can't move the VRAM GPU address without disabling CRTC.
Thus if we want to support flicker free boot from UEFI to X, we need
to keep the VRAM GPU address UEFI programmed. So far on all UEFI
checked this address was something sane.
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
Lock/unlock mutex in proper order to avoid deadlock in case
of GPU reset triggered from VM code path.
Cc: sta...@vger.kernel.org [3.5]
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon_gart.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
Signed-off-by: Jerome Glisse
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
This version is for stable 3.5
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
Kernel 3.5/3.4 need a similar patch but adapted for difference in mutex locking.
v2: For to update pagetable when unbindi
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
v3: Fix compilation warnings
T
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
Kernel 3.5/3.4 need a similar patch but adapted for difference in mutex locking.
v2: For to update pagetable when unbindi
From: Jerome Glisse
Virtual address need to be fenced to know when we can safely remove it.
This patch also properly clear the pagetable. Previously it was
serouisly broken.
v2: For to update pagetable when unbinding bo (don't bailout if
bo_va->valid is true).
v3: Fix compilation warnings
v4
From: Jerome Glisse
Use the ttm bo delayed destruction queue so that we don't block
userspace when destroying bo. The virtual address destruction
will happen at same time as the real bo destruction when everythings
using the bo is done.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/r
From: Jerome Glisse
Limit printing bad edid information at one time per connector.
Connector that are connected to a bad monitor/kvm will likely
stay connected to the same bad monitor/kvm and it makes no
sense to keep printing the bad edid message.
Signed-off-by: Jerome Glisse
---
drivers/gpu/
From: Jerome Glisse
We need to take reference on the sync object while holding the
fence spinlock but at the same time we don't want to allocate
memory while holding the spinlock. This patch make sure we
enforce both of this constraint.
Fix https://bugzilla.redhat.com/show_bug.cgi?id=906296
Sig
From: Jerome Glisse
We need to take reference on the sync object while holding the
fence spinlock but at the same time we don't want to allocate
memory while holding the spinlock. This patch make sure we
enforce both of this constraint.
v2: actually test build it
Fix https://bugzilla.redhat.com
From: Jerome Glisse
In some rare case were packet is big enough to go over page boundary
we might not have copied yet the userspace data into the local copy
resulting in kernel reading garbage data.
Without this patch kernel might submit unprocessed/unrelocated cmd
to the GPU which might lead to
From: Jerome Glisse
When ever parsing cmd buffer supplied by userspace we need to use
radeon_get_ib_value rather than directly accessing the ib as the user
cmd might not yet be copied into the ib thus the parser might read
value that does not correspond to what user is sending and possibly
allowi
From: Jerome Glisse
This patch print a warning message when trying to reserve same buffer
twice in same cs ioctl (because the buffer is known by userspace under
2 different handle). It does not try to fix the issue like :
https://patchwork.kernel.org/patch/1812991/
Just to make this case easier
From: Jerome Glisse
This patch print a warning message when trying to reserve same buffer
twice in same cs ioctl (because the buffer is known by userspace under
2 different handle). It does not try to fix the issue like :
https://patchwork.kernel.org/patch/1812991/
Just to make this case easier
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61 +
radeon/radeon_surface.c | 663 +++
radeon/radeon_surface.h | 30 +++
3 files changed, 709 insertions(+), 45 deletions(-)
diff --git a/include/drm/radeon_drm
From: Jerome Glisse
Allow userspace to query for the tile mode array so userspace can properly
compute surface pitch and alignment requirement depending on tiling.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h | 1 +
drivers/gpu/drm/radeon/radeon_drv.c | 3 +-
driver
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61 +
radeon/radeon_surface.c | 664 +++
radeon/radeon_surface.h | 31 +++
3 files changed, 711 insertions(+), 4
From: Jerome Glisse
Allow userspace to query for the tile mode array so userspace can properly
compute surface pitch and alignment requirement depending on tiling.
v2: Make strict aliasing safer by casting to char when copying
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/radeon.h
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61 +
radeon/radeon_surface.c | 658 +++
radeon/radeon_surface.h | 31 +
From: Jerome Glisse
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 61
1 file changed, 61 insertions(+)
diff --git a/include/drm/radeon_drm.h b/include/drm/radeon_drm.h
index 00d66b3..ff3ce3a 100644
--- a/include/drm/radeon_drm.h
++
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
Signed-off-by: Jerome Glisse
---
radeon/radeon_surface.c | 658
radeon/radeon_surface.h
From: Jerome Glisse
v2: sync with radeon-next tree for 3.10
http://cgit.freedesktop.org/~agd5f/linux/log/?h=drm-next-3.10-wip
Signed-off-by: Jerome Glisse
---
include/drm/radeon_drm.h | 81
1 file changed, 81 insertions(+)
diff --git a/include
From: Jerome Glisse
v2: Only writte tile index if flags for it is set
v3: Remove useless allow2d scanout flags
v4: Split radeon_drm.h update to its own patch
v5: update against lastest next tree for radeon
Signed-off-by: Jerome Glisse
---
radeon/radeon_surface.c | 658 +
From: Jerome Glisse
This is to allow debugging of userspace program not freeing buffer
after, which is basicly a memory leak. This print the list of all
gem object along with their size and placement (VRAM,GTT,CPU) and
with the pid of the task that created them.
Signed-off-by: Jerome Glisse
---
From: Jerome Glisse
If a buffer is never bind to a virtual memory pagetable than don't try
to unbind it. Only drawback is that we don't update the pagetable when
unbinding the ib pool buffer which is fine because it only happens at
suspend or module unload/shutdown.
Cc: sta...@kernel.org
Signed-
From: Jerome Glisse
UVD ring can't use scratch thus it does need writeback buffer to keep
a valid address or radeon_ring_backup will trigger a kernel fault.
It's ok to not unpin the write back buffer on suspend as it leave in
gtt and thus does not need eviction.
Reported and tracked by Wojtek
From: Jerome Glisse
There might be issue with lockup detection when scheduling on an
empty ring that have been sitting idle for a while. Thus update
the lockup tracking data when scheduling new work in an empty ring.
Signed-off-by: Jerome Glisse
Tested-by: Andy Lutomirski
Cc: sta...@vger.kerne
From: Jerome Glisse
Avoid creating temporary platform device that will lead to issue
when several radeon gpu are in same computer. Instead directly use
the radeon device for requesting firmware.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/cik.c| 25 +++--
From: Jerome Glisse
ib pool weren't free for various newer asic on module unload.
This doesn't cause much arm but still could be candidate for
stable.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |1 +
drivers/gpu/drm/radeon/ni.c|1 +
drivers/gpu/drm/rade
From: Jerome Glisse
atombios functuion DIG*EncoderControl works more reliably (100% link training
success vs 30% link training success on some monitor like HP ZR22w) for DP link
training than DPEncoderService for DCE3 display block.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/atomb
From: Jerome Glisse
DPEncoderService newer than 1.1 can't properly program the DP (display port)
link training. When facing such version use the DIGxEncoderControl method
instead. Fix DP link training on some R7XX.
Signed-off-by: Jerome Glisse
Reviewed-by: Alex Deucher
Cc: sta...@kernel.org
--
From: Jerome Glisse
Some CP interrupt were left enabled when disabling interrupt.
Signed-off-by: Jerome Glisse
---
drivers/gpu/drm/radeon/evergreen.c |2 +-
drivers/gpu/drm/radeon/r600.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/radeon/e
From: Ben Skeggs
This was true for new TTM_PL_SYSTEM and new TTM_PL_TT cases, but wasn't
the case on TTM_PL_SYSTEM<->TTM_PL_TT moves, which causes trouble on some
paths as nouveau's move_notify() hook requires that the dma addresses be
valid at this point.
Signed-off-by: Ben Skeggs
Reviewed-by:
From: Jerome Glisse
For some reason SPI block is in broken state after module
unloading. This lead to broken rendering after reloading
module. Fix this by reseting SPI block in CP resume function
Signed-off-by: Jerome Glisse http://lists.freedesktop.org/mailman/listinfo/dri-devel
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