On Wed, Jul 23, 2025 at 03:54:24PM +0300, Nicusor Huhulea wrote:
> From: Imre Deak
>
> Add a helper to reschedule drm_mode_config::output_poll_work after
> polling has been enabled for a connector (and needing a reschedule,
> since previously polling was disabled for all connectors and hence
> ou
On 7/23/2025 7:30 PM, Raag Jadav wrote:
On Tue, Jul 15, 2025 at 04:17:24PM +0530, Riana Tauro wrote:
The patches in these series refactor the boot survivability code to
allow adding runtime survivability
Refactor existing code to separate both the modes
Punctuations please!
This patch ren
On 23-07-25, 11:49, Tomi Valkeinen wrote:
> Hi Vinod,
>
> (I accidentally sent my mail only to you. List added here).
>
> On 23/07/2025 10:36, Tomi Valkeinen wrote:
> > Hi Vinod,
> >
> > On 27/06/2025 02:32, Vinod Koul wrote:
> >> On 18-06-25, 12:59, Tomi Valkeinen wrote:
> >>> The code in cdns-
From: Leon Romanovsky
Make sure that all VFIO PCI devices have peer-to-peer capabilities
enables, so we would be able to export their MMIO memory through DMABUF,
Signed-off-by: Leon Romanovsky
---
drivers/vfio/pci/vfio_pci_core.c | 4
include/linux/vfio_pci_core.h| 1 +
2 files change
From: Leon Romanovsky
Move the struct phys_vec definition from block/blk-mq-dma.c to
include/linux/types.h to make it available for use across the kernel.
The phys_vec structure represents a physical address range with a
length, which is used by the new physical address-based DMA mapping
API. Th
From: Leon Romanovsky
Remove the bus_off field from pci_p2pdma_map_state since it duplicates
information already available in the pgmap structure. The bus_offset
is only used in one location (pci_p2pdma_bus_addr_map) and is always
identical to pgmap->bus_offset.
Signed-off-by: Jason Gunthorpe
S
From: Leon Romanovsky
---
Based on blk and DMA patches which will be sent during coming merge window.
---
This series extends the VFIO PCI subsystem to
From: Leon Romanovsky
Update the pci_p2pdma_bus_addr_map() function to take a direct pointer
to the p2pdma_provider structure instead of the pci_p2pdma_map_state.
This simplifies the API by removing the need for callers to extract
the provider from the state structure.
The change updates all cal
From: Leon Romanovsky
Extract the core P2PDMA provider information (device owner and bus
offset) from the dev_pagemap into a dedicated p2pdma_provider structure.
This creates a cleaner separation between the memory management layer and
the P2PDMA functionality.
The new p2pdma_provider structure
From: Leon Romanovsky
Refactor the PCI P2PDMA subsystem to separate the core peer-to-peer DMA
functionality from the optional memory allocation layer. This creates a
two-tier architecture:
The core layer provides P2P mapping functionality for physical addresses
based on PCI device MMIO BARs and
From: Leon Romanovsky
Export the pci_p2pdma_map_type() function to allow external modules
and subsystems to determine the appropriate mapping type for P2PDMA
transfers between a provider and target device.
The function determines whether peer-to-peer DMA transfers can be
done directly through PC
From: Leon Romanovsky
Add support for exporting PCI device MMIO regions through dma-buf,
enabling safe sharing of non-struct page memory with controlled
lifetime management. This allows RDMA and other subsystems to import
dma-buf FDs and build them into memory regions for PCI P2P operations.
The
From: Vivek Kasireddy
These helpers are useful for managing additional references taken
on the device from other associated VFIO modules.
Signed-off-by: Jason Gunthorpe
Signed-off-by: Vivek Kasireddy
Signed-off-by: Leon Romanovsky
---
drivers/vfio/vfio_main.c | 2 ++
include/linux/vfio.h
From: Vivek Kasireddy
There is no need to share the main device pointer (struct vfio_device *)
with all the feature functions as they only need the core device
pointer. Therefore, extract the core device pointer once in the
caller (vfio_pci_core_ioctl_feature) and share it instead.
Signed-off-by
On Wed, Jul 23, 2025 at 02:54:04PM +0200, Luca Weiss wrote:
> On Sun Jul 6, 2025 at 1:01 PM CEST, Dmitry Baryshkov wrote:
> > After the commit 45a2974157d2 ("drm/msm: Use the central UBWC config
> > database") the MDSS driver errors out if UBWC database didn't provide it
> > with the UBWC configura
On Mon, 2025-06-16 at 22:17 -0600, Alex Hung wrote:
> From: Harry Wentland
>
> Not all HW will be able to do bypass on all color
> operations. Introduce an 32 bits 'flags' for all colorop
> init functions and DRM_COLOROP_FLAG_ALLOW_BYPASS for creating
> the BYPASS property when it's true.
>
> Si
On Tue, Jul 15, 2025 at 04:17:24PM +0530, Riana Tauro wrote:
> The patches in these series refactor the boot survivability code to
> allow adding runtime survivability
> Refactor existing code to separate both the modes
Punctuations please!
> This patch renames the functions and separates init an
Hi Mark,
On Wednesday, 23 July 2025 06:40:13 EDT Mark Brown wrote:
> On Tue, Jul 22, 2025 at 03:54:36PM -0400, Detlev Casanova wrote:
> > When disconnected, the ELD data cannot be read by the display driver, so
> > it just sets the data to 0.
>
> Please don't put patches for different subsystems i
It's entirely valid and correct for compositors to include disabled
planes in the atomic commit, and doing that should not prevent async
flips from working. To fix that, this commit skips the async checks
if the plane was and still is not visible.
Fixes: fd40a63c drm/atomic: Let drivers decide whi
On Tue Jul 22, 2025 at 10:20 AM MDT, Doug Anderson wrote:
> On Mon, Jul 21, 2025 at 6:53 PM Brigham Campbell
> wrote:
> add/remove: 0/0 grow/shrink: 0/4 up/down: 0/-8754 (-8754)
> Function old new delta
> elish_csot_init_sequence.d 758
On Sat, 19 Jul 2025 13:58:13 +0300, Dmitry Baryshkov wrote:
> The bridge used in drm_bridge_connector_init() for CEC init does not
> correctly point to the required HDMI CEC bridge, which can lead to
> errors during CEC initialization.
>
>
Applied to drm-misc-next, thanks!
[1/1] drm/display: br
Hi Dmitry
On Wednesday, 23 July 2025 07:41:43 EDT Dmitry Baryshkov wrote:
> On Tue, Jul 22, 2025 at 03:54:35PM -0400, Detlev Casanova wrote:
> > To configure audio registers, the clock of the video port in use must be
> > enabled.
> > As those clocks are managed by the VOP driver, they can't be ena
I reviewed the KWin implementation for this
(https://invent.kde.org/plasma/kwin/-/merge_requests/7689), and the
uAPI looks good to me.
- Xaver
On 7/23/25 18:50, Matt Coster wrote:
> On 23/07/2025 17:26, Michal Wilczynski wrote:
>> On 7/23/25 11:45, Matt Coster wrote:
>>> On 25/06/2025 15:41, Krzysztof Kozlowski wrote:
On 25/06/2025 16:18, Michal Wilczynski wrote:
>
>
> On 6/25/25 15:55, Krzysztof Kozlowski wrote:
>
Hi,
On Wed, Jul 23, 2025 at 12:25 AM Langyan Ye
wrote:
>
> Add 50ms disable delay for NV116WHM-N49, NV122WUM-N41, and MNC207QS1-1
> to satisfy T9+T10 timing. Add 50ms disable delay for MNE007JA1-2
> as well, since MNE007JA1-2 copies the timing of MNC207QS1-1.
>
> Specifically, it should be noted
Apologies for the second email.
I am resending this message as the formatting in the previous version
was incorrect
On Tue, Jul 22, 2025 at 11:57 PM Maxime Ripard wrote:
>
> On Tue, Jul 22, 2025 at 03:41:14PM -0500, Chenyuan Yang wrote:
> > drm_atomic_get_new_connector_for_encoder and
> > drm_ato
On Sun Jul 6, 2025 at 1:01 PM CEST, Dmitry Baryshkov wrote:
> After the commit 45a2974157d2 ("drm/msm: Use the central UBWC config
> database") the MDSS driver errors out if UBWC database didn't provide it
> with the UBWC configuration. Make UBWC database return zero data for
> MSM8916 / APQ8016, M
On 7/23/25 11:45, Matt Coster wrote:
> On 25/06/2025 15:41, Krzysztof Kozlowski wrote:
>> On 25/06/2025 16:18, Michal Wilczynski wrote:
>>>
>>>
>>> On 6/25/25 15:55, Krzysztof Kozlowski wrote:
On 25/06/2025 14:45, Michal Wilczynski wrote:
>
>
> On 6/24/25 15:53, Matt Coster wrot
On 7/23/25 3:23 PM, Dmitry Baryshkov wrote:
> After the commit 45a2974157d2 ("drm/msm: Use the central UBWC config
> database") the MDSS driver errors out if UBWC database didn't provide it
> with the UBWC configuration. Make UBWC database return zero data for
> MSM8916 / APQ8016, MSM8974 / APQ8074
Hello,
On Tue, 2025-07-22 at 13:05 -0700, James wrote:
> On Mon, Jul 21, 2025, at 1:16 AM, Philipp Stanner wrote:
> > On Mon, 2025-07-21 at 09:52 +0200, Philipp Stanner wrote:
> > > +Cc Tvrtko, who's currently reworking FIFO and RR.
> > >
> > > On Sun, 2025-07-20 at 16:56 -0700, James Flowers wro
On 7/23/2025 7:38 PM, Raag Jadav wrote:
On Tue, Jul 15, 2025 at 04:17:25PM +0530, Riana Tauro wrote:
Certain runtime firmware errors can cause the device to be in a unusable
state requiring a firmware flash to restore normal operation.
Runtime Survivability Mode indicates firmware flash is ne
On Wed, Jul 23, 2025 at 03:26:51PM +0200, Konrad Dybcio wrote:
> On 7/23/25 3:23 PM, Dmitry Baryshkov wrote:
> > After the commit 45a2974157d2 ("drm/msm: Use the central UBWC config
> > database") the MDSS driver errors out if UBWC database didn't provide it
> > with the UBWC configuration. Make UB
/msm tree.
---
Changes in v3:
- Just picked up all R-B tags from v1 (forgot those in v2)
- Link to v2:
https://lore.kernel.org/r/20250723-ubwc-no-ubwc-v2-1-825e1ee54...@oss.qualcomm.com
Changes in v2:
- Added APQ8026 to the list (Luca Weiss)
- Link to v1:
https://lore.kernel.org/r/20250706-ub
On Tue, Jul 15, 2025 at 04:17:26PM +0530, Riana Tauro wrote:
> Add documentation for vendor specific device wedged recovery method
> and runtime survivability.
...
> diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
> index bd81ebd370cb..d28c92f8b80c 100644
> --- a/driv
On Tue, Jul 22, 2025 at 10:26:11AM -0300, Lucas De Marchi wrote:
On Mon, Jul 21, 2025 at 10:50:29PM -0700, Randy Dunlap wrote:
Hi,
On 7/21/25 6:38 PM, Lucas De Marchi wrote:
On Mon, Jul 21, 2025 at 01:17:33PM -0700, Randy Dunlap wrote:
On 7/21/25 12:41 AM, Stephen Rothwell wrote:
Hi all,
On Tue, Jul 22, 2025 at 23:57 Maxime Ripard wrote:
> On Tue, Jul 22, 2025 at 03:41:14PM -0500, Chenyuan Yang wrote:
> > drm_atomic_get_new_connector_for_encoder and
> > drm_atomic_get_new_connector_state could return Null.
>
> They can, but not in that scenario. atomic_enable will never be called
On Wed, Jul 23, 2025 at 3:19 AM Konrad Dybcio
wrote:
>
> On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> > CP_ALWAYS_ON counter falls under GX domain which is collapsed during
> > IFPC. So switch to GMU_ALWAYS_ON counter for any CPU reads since it is
> > not impacted by IFPC. Both counters are clocked
After the commit 45a2974157d2 ("drm/msm: Use the central UBWC config
database") the MDSS driver errors out if UBWC database didn't provide it
with the UBWC configuration. Make UBWC database return zero data for
MSM8916 / APQ8016, MSM8974 / APQ8074, MSM8226 and MSM8939.
Fixes: 1924272b9ce1 ("soc: q
On Tue, Jul 15, 2025 at 04:17:25PM +0530, Riana Tauro wrote:
> Certain runtime firmware errors can cause the device to be in a unusable
> state requiring a firmware flash to restore normal operation.
> Runtime Survivability Mode indicates firmware flash is necessary by
> wedging the device and expo
On 23/07/2025 17:26, Michal Wilczynski wrote:
> On 7/23/25 11:45, Matt Coster wrote:
>> On 25/06/2025 15:41, Krzysztof Kozlowski wrote:
>>> On 25/06/2025 16:18, Michal Wilczynski wrote:
On 6/25/25 15:55, Krzysztof Kozlowski wrote:
> On 25/06/2025 14:45, Michal Wilczynski wrote:
>
On Tue, Jul 15, 2025 at 09:44:02PM +0800, WangYuli wrote:
> There is a spelling mistake of 'notifer' in the comment which
> should be 'notifier'.
>
> Link:
> https://lore.kernel.org/all/b3c019b63c93846f+20250715071245.398846-1-wangy...@uniontech.com/
> Signed-off-by: WangYuli
Reviewed-by: Matth
On Tue, Jul 22, 2025 at 04:17:40PM -0500, Chenyuan Yang wrote:
> The drm_atomic_get_new_connector_state() can return NULL if the
> connector is not part of the atomic state. Add a check to prevent
> a NULL pointer dereference.
>
> This follows the same pattern used in dpu_encoder_update_topology()
submit_unpin_objects() should come before we unlock the objects. This
fixes the splat:
WARNING: CPU: 2 PID: 2171 at drivers/gpu/drm/msm/msm_gem.h:395
msm_gem_unpin_locked+0x8c/0xd8 [msm]
Modules linked in: uinput snd_seq_dummy snd_hrtimer aes_ce_ccm
snd_soc_wsa884x regmap_sdw q6prm_clocks
If we hit an error path in GEM obj creation before msm_gem_new_handle()
updates obj->resv to point to the gpuvm resv object, then obj->resv
still points to &obj->_resv. In this case we don't want to decrement
the refcount of the object being freed (since the refcnt is already
zero). This fixes th
For reasons unknown to me, systemd-udev recently started limiting
max-files to 64k (at least in f42), which exposed some problematic
allocation related error paths.
Rob Clark (2):
drm/msm: Fix refcnt underflow in error path
drm/msm: Fix submit error path cleanup
drivers/gpu/drm/msm/msm_gem.c
On Wed, Jul 23, 2025 at 08:27:37AM +0200, Jiri Slaby (SUSE) wrote:
> irq_domain_create_simple() takes fwnode as the first argument. It can be
> extracted from the struct device using dev_fwnode() helper instead of
> using of_node with of_fwnode_handle().
>
> So use the dev_fwnode() helper.
>
> Si
On 25/06/2025 15:41, Krzysztof Kozlowski wrote:
> On 25/06/2025 16:18, Michal Wilczynski wrote:
>>
>>
>> On 6/25/25 15:55, Krzysztof Kozlowski wrote:
>>> On 25/06/2025 14:45, Michal Wilczynski wrote:
On 6/24/25 15:53, Matt Coster wrote:
> On 23/06/2025 12:42, Michal Wilczynski wr
This series adds drm_bridge_get/put() calls for DRM bridges used when
looping over bridges in an encoder chain.
This is part of the work towards removal of bridges from a still existing
DRM pipeline without use-after-free. The grand plan was discussed in [1].
Here's the work breakdown (➜ marks the
Currently drm_bridge_connector_init() reuses the 'bridge' variable, first
as a loop variable in the long drm_for_each_bridge_in_chain() and then in
the HDMI-specific code as a shortcut to bridge_connector->bridge_cec.
We are about to remove the 'bridge' loop variable for
drm_for_each_bridge_in_cha
The 'bridge' pointer started being assigned and used within this 'if' scope
in commit 0beba3f9d366 ("drm/bridge: connector: add support for HDMI codec
framework").
After that, commit 5d04b4188959 ("drm/bridge: split HDMI Audio from
DRM_BRIDGE_OP_HDMI") removed the code dereferencing it from the sa
Add variant of drm_for_each_bridge_in_chain() that gets/puts the bridge
reference at the beginning/end of each iteration, and puts it if breaking
ot of the loop.
Note that this requires adding a new drm_bridge_get_next_bridge_and_put()
function because, unlike similar functions as __of_get_next_ch
Use drm_for_each_bridge_in_chain_scoped() instead of
drm_for_each_bridge_in_chain() to ensure the bridge being looped on is
refcounted.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/display/drm_bridge_connector.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drive
Use drm_for_each_bridge_in_chain_scoped() instead of
drm_for_each_bridge_in_chain() to ensure the bridge being looped on is
refcounted.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/drm_atomic.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic.c
All users have been replaced by drm_for_each_bridge_in_chain_scoped().
Signed-off-by: Luca Ceresoli
---
.clang-format| 1 -
include/drm/drm_bridge.h | 14 --
2 files changed, 15 deletions(-)
diff --git a/.clang-format b/.clang-format
index
1cac7d4976644c8f083f801e98f61
Add variant of drm_for_each_bridge_in_chain_scoped() that iterates on the
encoder bridge from a given bridge until the end of the chain.
Signed-off-by: Luca Ceresoli
---
include/drm/drm_bridge.h | 19 +++
1 file changed, 19 insertions(+)
diff --git a/include/drm/drm_bridge.h b/i
Use drm_for_each_bridge_in_chain_scoped() instead of
drm_for_each_bridge_in_chain() to ensure the bridge being looped on is
refcounted.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/drm_bridge.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_bridge.c
Hi Marius,
On Fri, 27 Jun 2025 at 14:18, Marius Vlad wrote:
> Manually setting/forcing the connector status in sysfs does not
> propagate the CONNECTOR ID. For drivers that use polling, including
> manually setting it up with sysfs this would similarly to the HDP IRQ
> path which can pass it thro
Use drm_for_each_bridge_in_chain_from _scoped() instead of an open-coded
loop based on drm_bridge_get_next_bridge() to ensure the bridge being
looped on is refcounted and simplify the driver code.
Signed-off-by: Luca Ceresoli
---
drivers/gpu/drm/omapdrm/omap_encoder.c | 4 +---
1 file changed, 1
On 07/23/2025, Shengjiu Wang wrote:
> On Tue, Jul 22, 2025 at 3:16 PM Liu Ying wrote:
>>
>> Hi Shengjiu,
>>
>> On 07/18/2025, Shengjiu Wang wrote:
>>> Add binding for the i.MX8MP HDMI parallel Audio interface block.
>>> As this port is linked to imx8mp-hdmi-tx, add port@2 in
>>> fsl,imx8mp-hdmi-tx
On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> When IFPC is supported, devfreq idling is redundant and adds
> unnecessary pm suspend/wake latency. So skip it when IFPC is
> supported.
>
> Signed-off-by: Akhil P Oommen
> ---
> drivers/gpu/drm/msm/msm_gpu_devfreq.c | 6 ++
> 1 file changed, 6 ins
On 7/22/25 11:37 PM, Akhil P Oommen wrote:
> On 7/22/2025 7:25 PM, Dmitry Baryshkov wrote:
>> On Sun, Jul 20, 2025 at 05:46:17PM +0530, Akhil P Oommen wrote:
>>> Add the IFPC restore register list and enable IFPC support on Adreno
>>> X1-85 gpu.
>>
>> Nit: GPU
>>
>> I can't stop but notice that KGS
On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> Now with IFPC, GX domain can collapse as soon as GPU becomes IDLE. So
> add gx_is_on check before accessing any GX registers during crashstate
> capture and recovery.
>
> Signed-off-by: Akhil P Oommen
> ---
[...]
> + /*
> + * This is true onl
On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> Add a new quirk to denote IFPC (Inter-Frame Power Collapse) support
> for a gpu. Based on this flag send the feature ctrl hfi message to
> GMU to enable IFPC support.
>
> Signed-off-by: Akhil P Oommen
> ---
[...]
> +static int a6xx_hfi_enable_ifpc(str
On 7/22/25 9:47 PM, Akhil P Oommen wrote:
> On 7/22/2025 8:00 PM, Konrad Dybcio wrote:
>> On 7/20/25 2:16 PM, Akhil P Oommen wrote:
>>> A minor refactor to combine the subroutines for legacy a6xx GMUs under
>>> a single check. This helps to avoid an unnecessary check and return
>>> early from the s
On 26/06/2025 10:33, Michal Wilczynski wrote:
> Update the Imagination PVR DRM driver to leverage the pwrseq framework
> for managing the complex power sequence of the GPU on the T-HEAD TH1520
> SoC.
>
> To cleanly separate platform specific logic from the generic driver,
> this patch introduces a
On Wed, Jul 23, 2025 at 07:55:12AM +0200, Jiri Slaby (SUSE) wrote:
> irq_domain_create_simple() takes fwnode as the first argument. It can be
> extracted from the struct device using dev_fwnode() helper instead of
> using of_node with of_fwnode_handle().
>
> So use the dev_fwnode() helper.
>
> Si
On Tue, Jul 22, 2025 at 03:54:35PM -0400, Detlev Casanova wrote:
> To configure audio registers, the clock of the video port in use must be
> enabled.
> As those clocks are managed by the VOP driver, they can't be enabled here
> to write the registers even when the HDMI cable is disconnected.
>
>
On 7/19/2025 3:14 PM, Dmitry Baryshkov wrote:
> On Wed, Jul 09, 2025 at 11:13:49AM +0530, Ekansh Gupta wrote:
>>
>> On 6/12/2025 3:54 PM, Dmitry Baryshkov wrote:
>>> On Thu, Jun 12, 2025 at 03:02:52PM +0530, Ekansh Gupta wrote:
On 6/12/2025 1:35 PM, Dmitry Baryshkov wrote:
> On Thu, Jun
Hey,
It's reverting time!
Lots of reverts thsi time around, and some small fixes.
Best regards,
~Maarten
drm-misc-fixes-2025-07-23:
drm-misc-fixes for v6.16-rc8/final?:
- Revert all uses of drm_gem_object->dmabuf to
drm_gem_object->import_attach->dmabuf.
- Fix amdgpu returning BIOS cluttered V
Applied to drm-misc-next
On 7/22/2025 12:04 PM, Jacek Lawrynowicz wrote:
> Add Karol as a new intel_vpu maintainer.
>
> Signed-off-by: Jacek Lawrynowicz
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 7e7515a412e9d..22dc118f43d89 1
Add 50ms disable delay for NV116WHM-N49, NV122WUM-N41, and MNC207QS1-1
to satisfy T9+T10 timing. Add 50ms disable delay for MNE007JA1-2
as well, since MNE007JA1-2 copies the timing of MNC207QS1-1.
Specifically, it should be noted that the MNE007JA1-2 panel was added
by someone who did not have the
On Wed, Jul 23, 2025 at 08:51:22AM +0200, Neil Armstrong wrote:
> On 22/07/2025 15:48, Rui Miguel Silva wrote:
> > On Tue Jul 22, 2025 at 2:01 PM WEST, Neil Armstrong wrote:
> >> On 10/07/2025 12:07, Johan Hovold wrote:
> >>> Neil, do you have the OLED version now?
> >>
> >> I'm not sure, how do I
On Wed, Jul 23, 2025 at 09:03:40AM +0200, Neil Armstrong wrote:
> On 11/04/2025 13:49, Johan Hovold wrote:
> > On Wed, Apr 02, 2025 at 03:36:32PM +0100, Christopher Obbard wrote:
> >> Add edp_hpd_active pinctrl to the X1E80100 device tree.
> >
> > Please squash this one with the patch adding the u
On 23/07/2025 09:27, Johan Hovold wrote:
On Wed, Jul 23, 2025 at 08:51:22AM +0200, Neil Armstrong wrote:
On 22/07/2025 15:48, Rui Miguel Silva wrote:
On Tue Jul 22, 2025 at 2:01 PM WEST, Neil Armstrong wrote:
On 10/07/2025 12:07, Johan Hovold wrote:
Neil, do you have the OLED version now?
Hi Maxime,
On Wed, Jul 23, 2025 at 09:00:28AM +0200, Maxime Ripard wrote:
> Hi,
>
> On Tue, Jul 22, 2025 at 04:41:12PM +0200, Otto Pflüger wrote:
> > Enable the DPU and DSI clocks specified in the device tree.
> > Disable the DSI clock when it is not needed.
> >
> > Signed-off-by: Otto Pflüger
On Wed, Jul 23, 2025 at 01:03:47AM -0300, Jason Gunthorpe wrote:
> On Mon, Jul 21, 2025 at 09:49:04AM +0300, Leon Romanovsky wrote:
> > > In fact, hmm_range_fault doesn't have information about the destination
> > > device that will perform the DMA mapping.
> >
> > So probably you need to teach HM
Hi Vinod,
(I accidentally sent my mail only to you. List added here).
On 23/07/2025 10:36, Tomi Valkeinen wrote:
> Hi Vinod,
>
> On 27/06/2025 02:32, Vinod Koul wrote:
>> On 18-06-25, 12:59, Tomi Valkeinen wrote:
>>> The code in cdns-dphy has probably been part of a DSI driver in the
>>> past. R
On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> CP_ALWAYS_ON counter falls under GX domain which is collapsed during
> IFPC. So switch to GMU_ALWAYS_ON counter for any CPU reads since it is
> not impacted by IFPC. Both counters are clocked by same xo clock source.
>
> Signed-off-by: Akhil P Oommen
>
On 7/22/25 11:27 PM, Akhil P Oommen wrote:
> On 7/22/2025 7:19 PM, Dmitry Baryshkov wrote:
>> On Sun, Jul 20, 2025 at 05:46:12PM +0530, Akhil P Oommen wrote:
>>> Add a new quirk to denote IFPC (Inter-Frame Power Collapse) support
>>> for a gpu. Based on this flag send the feature ctrl hfi message t
On Tue, Jul 22, 2025 at 03:54:36PM -0400, Detlev Casanova wrote:
> When disconnected, the ELD data cannot be read by the display driver, so
> it just sets the data to 0.
Please don't put patches for different subsystems into the same series
if there's no dependencies, it just makes dependencies le
On Wed, Jul 23, 2025 at 02:54:59AM +0530, Akhil P Oommen wrote:
> On 7/22/2025 7:14 PM, Dmitry Baryshkov wrote:
> > On Sun, Jul 20, 2025 at 05:46:09PM +0530, Akhil P Oommen wrote:
> >> Set Keepalive votes at appropriate places to block IFPC power collapse
> >> until we access all the required regis
On Wed, Jul 23, 2025 at 01:22:20AM +0530, Akhil P Oommen wrote:
> On 7/22/2025 8:03 PM, Konrad Dybcio wrote:
> > On 7/20/25 2:16 PM, Akhil P Oommen wrote:
> >> Bitfield definition for REG_A6XX_GMU_SPTPRAC_PWR_CLK_STATUS register is
> >> different in A7XX family. Check the correct bits to see if GX
On Wed, 09 Jul 2025 17:59:36 +0200, Luca Ceresoli wrote:
> This series adds drm_bridge_get/put() calls for DRM bridges returned by
> drm_bridge_get_prev_bridge().
>
> This is part of the work towards removal of bridges from a still existing
> DRM pipeline without use-after-free. The grand plan w
On Wed, Jul 23, 2025 at 02:35:31AM +0530, Akhil P Oommen wrote:
> On 7/22/2025 10:56 PM, Rob Clark wrote:
> > On Tue, Jul 22, 2025 at 6:33 AM Dmitry Baryshkov
> > wrote:
> >>
> >> On Sun, Jul 20, 2025 at 05:46:06PM +0530, Akhil P Oommen wrote:
> >>> Since the PDC resides out of the GPU subsystem a
On Wed, Jul 23, 2025 at 09:13:34PM -0700, Matthew Brost wrote:
> On Wed, Jul 23, 2025 at 08:56:01AM +0200, Philipp Stanner wrote:
> > On Tue, 2025-07-22 at 01:45 -0700, Matthew Brost wrote:
> > > On Tue, Jul 22, 2025 at 01:07:29AM -0700, Matthew Brost wrote:
> > > > On Tue, Jul 22, 2025 at 09:37:11
Hi Leon,
> Subject: [PATCH 10/10] vfio/pci: Add dma-buf export support for MMIO
> regions
>
> From: Leon Romanovsky
>
> Add support for exporting PCI device MMIO regions through dma-buf,
> enabling safe sharing of non-struct page memory with controlled
> lifetime management. This allows RDMA an
The pull request you sent on Thu, 24 Jul 2025 10:40:08 +1000:
> https://gitlab.freedesktop.org/drm/kernel.git tags/drm-fixes-2025-07-24
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/25fae0b93d1d7ddb25958bcb90c3c0e5e0e202bd
Thank you!
--
Deet-doot-dot, I am a bot.
h
The function mod_hdcp_hdcp1_create_session() calls the function
get_first_active_display(), but does not check its return value.
The return value is a null pointer if the display list is empty.
This will lead to a null pointer dereference.
Add a null pointer check for get_first_active_display() an
On Tue, Jun 10, 2025 at 04:58:25PM -0700, Chia-I Wu wrote:
> Fix
>
> aarch64-linux-gnu-ld: drivers/gpu/drm/bridge/ite-it6505.o: in function
> `it6505_i2c_probe':
> ite-it6505.c:(.text+0x754): undefined reference to `__devm_regmap_init_i2c'
Fixes: b5c84a9edcd4 ("drm/bridge: add it6505 driver"
On Mon, Jul 21, 2025 at 3:13 PM Karunika Choo wrote:
>
> Mali-Gx15 introduces a new GPU_FEATURES register that provides
> information about GPU-wide supported features. The register value will
> be passed on to userspace via gpu_info.
>
> Additionally, Mali-Gx15 presents an 'Immortalis' naming var
On Mon, Jul 21, 2025 at 4:33 AM Karunika Choo wrote:
>
> This patch adds GPU model name and FW binary support for Mali-G710,
> Mali-G510, and Mali-G310.
>
> Signed-off-by: Karunika Choo
> ---
> drivers/gpu/drm/panthor/panthor_fw.c | 2 ++
> drivers/gpu/drm/panthor/panthor_hw.c | 6 ++
> 2 fi
On Thu, Jul 24, 2025 at 05:13:49AM +, Kasireddy, Vivek wrote:
> Hi Leon,
>
> > Subject: [PATCH 10/10] vfio/pci: Add dma-buf export support for MMIO
> > regions
> >
> > From: Leon Romanovsky
> >
> > Add support for exporting PCI device MMIO regions through dma-buf,
> > enabling safe sharing
On Wed, Jul 23, 2025 at 08:56:01AM +0200, Philipp Stanner wrote:
> On Tue, 2025-07-22 at 01:45 -0700, Matthew Brost wrote:
> > On Tue, Jul 22, 2025 at 01:07:29AM -0700, Matthew Brost wrote:
> > > On Tue, Jul 22, 2025 at 09:37:11AM +0200, Philipp Stanner wrote:
> > > > On Mon, 2025-07-21 at 11:07 -0
Hi Thomas,
>
> Hi
>
> Am 18.07.25 um 16:47 schrieb Andi Shyti:
> > Hi Nitin,
> >
> > On Fri, Jul 18, 2025 at 04:20:51PM +0530, Nitin Gote wrote:
> >> The current iosys_map_clear() implementation reads the potentially
> >> uninitialized 'is_iomem' boolean field to decide which union member
> >> t
On Mon, Jul 21, 2025 at 3:53 PM Karunika Choo wrote:
>
> This patch adds firmware binary and GPU model naming support for
> Mali-Gx20 and Mali-Gx25 GPUs.
>
> The GPU_COHERENCY_FEATURES macros are slightly reworked as the
> assumption that FEATURE = BIT(PROTOCOL) no longer holds with the
> introduc
On Mon, Jul 21, 2025 at 2:36 PM Karunika Choo wrote:
>
> This patch series introduces some minor refactoring to enable support
> for new Mali GPUs.
>
> Key changes:
> - Addition of cache maintenance via the FLUSH_CACHES GPU command for all
> supported GPUs in place of FLUSH_MEM and FLUSH_PT MMU_
Hi,
Here's this week drm-misc-next-fixes PR.
Maxime
drm-misc-next-fixes-2025-07-24:
Two more bridge conversions to devm_drm_bridge_alloc that address a
warning now reported by the bridge core code.
The following changes since commit fe69a391808404977b1f002a6e7447de3de7a88e:
drm/panthor: Fix U
HI,
> -Original Message-
> From: Rob Herring (Arm)
> Sent: Monday, July 21, 2025 6:53 AM
> To: Joseph Guo
> Cc: Robert Foss ; Maxime Ripard ;
> Thomas Zimmermann ; dri-
> de...@lists.freedesktop.org; Maarten Lankhorst
> ; Simona Vetter ;
> Laurent Pinchart ; Jonas Karlman
> ; David Air
On 7/23/2025 7:04 PM, Raag Jadav wrote:
On Tue, Jul 15, 2025 at 04:17:26PM +0530, Riana Tauro wrote:
Add documentation for vendor specific device wedged recovery method
and runtime survivability.
...
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index bd81eb
From: Bjorn Helgaas
Fix typos, most reported by "codespell drivers/gpu". Only touches
comments, no code changes.
Signed-off-by: Bjorn Helgaas
---
Documentation/gpu/amdgpu/driver-core.rst | 2 +-
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdg
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