On Fri, Jul 04, 2025 at 04:07:22PM -0300, André Almeida wrote:
> Task information
>
> +
>
LGTM, thanks!
Tested-by: Bagas Sanjaya
--
An old man doll... just what I always wanted! - Clara
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Stephen Rothwell reports multiple indentation warnings when merging
drm-msm tree:
Documentation/gpu/drm-mm:506: ./drivers/gpu/drm/drm_gpuvm.c:2445: ERROR:
Unexpected indentation. [docutils]
Documentation/gpu/drm-mm:506: ./drivers/gpu/drm/drm_gpuvm.c:2447: WARNING:
Block quote ends without a blan
On Fri, Jul 04, 2025 at 04:07:24PM -0300, André Almeida wrote:
> Remove the repetitive wording at the end of "Task information" section.
>
Looks good, thanks!
Reviewed-by: Bagas Sanjaya
--
An old man doll... just what I always wanted! - Clara
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On 7/8/2025 8:40 PM, Deucher, Alexander wrote:
> [Public]
>
>
> I seem to recall -ENOTSUPP being frowned upon for IOCTLs.
>
>
Going by documentation -
https://dri.freedesktop.org/docs/drm/gpu/drm-uapi.html
EOPNOTSUPP:
Feature (like PRIME, modesetting, GEM) is not supported by the driver.
"Not
On Tue, Jul 08, 2025 at 01:20:32PM +0100, Tvrtko Ursulin wrote:
> Currently the job free work item will lock sched->job_list_lock first time
> to see if there are any jobs, free a single job, and then lock again to
> decide whether to re-queue itself if there are more finished jobs.
>
> Since drm_
On 7/8/25 7:45 PM, Bagas Sanjaya wrote:
> Stephen Rothwell reports multiple indentation warnings when merging
> drm-msm tree:
>
> Documentation/gpu/drm-mm:506: ./drivers/gpu/drm/drm_gpuvm.c:2445: ERROR:
> Unexpected indentation. [docutils]
> Documentation/gpu/drm-mm:506: ./drivers/gpu/drm/drm_
On 7/8/25 23:37, David Hildenbrand wrote:
> On 06.03.25 05:42, Balbir Singh wrote:
>> Add routines to support allocation of large order zone device folios
>> and helper functions for zone device folios, to check if a folio is
>> device private and helpers for setting zone device data.
>>
>> When la
On 7/8/25 23:41, David Hildenbrand wrote:
> On 06.03.25 05:42, Balbir Singh wrote:
>> Add flags to mark zone device migration pages.
>>
>> MIGRATE_VMA_SELECT_COMPOUND will be used to select THP pages during
>> migrate_vma_setup() and MIGRATE_PFN_COMPOUND will make migrating
>> device pages as compo
On 6/12/2025 3:54 PM, Dmitry Baryshkov wrote:
> On Thu, Jun 12, 2025 at 03:02:52PM +0530, Ekansh Gupta wrote:
>>
>> On 6/12/2025 1:35 PM, Dmitry Baryshkov wrote:
>>> On Thu, Jun 12, 2025 at 10:50:10AM +0530, Ekansh Gupta wrote:
On 5/22/2025 5:43 PM, Dmitry Baryshkov wrote:
> On Thu, 22
On 7/4/25 12:07 PM, André Almeida wrote:
> Fix the following kernel doc warning:
>
> include/drm/drm_device.h:40: warning: Function parameter or struct member
> 'pid' not described in 'drm_wedge_task_info'
> include/drm/drm_device.h:40: warning: Function parameter or struct member
> 'comm' no
On 7/4/25 12:07 PM, André Almeida wrote:
> Fix the following warning:
>
> Documentation/gpu/drm-uapi.rst:450: WARNING: Title underline too short.
>
> Task information
> --- [docutils]
>
> Fixes: cd37124b4093 ("drm/doc: Add a section about "Task information" for the
> wedge API")
On 7/4/25 12:07 PM, André Almeida wrote:
> Remove the repetitive wording at the end of "Task information" section.
>
> Reviewed-by: Raag Jadav
> Signed-off-by: André Almeida
> ---
> Documentation/gpu/drm-uapi.rst | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Randy Du
The fastrpc driver has support for 5 types of remoteprocs. There are
some products which support GDSP remoteprocs. GDSP is General Purpose
DSP where tasks can be offloaded. This patch extends the driver to
support GDSP remoteprocs.
Signed-off-by: Ling Xu
---
drivers/misc/fastrpc.c | 6 +-
1
Currently the domain ids are added for each instance of domains, this is
totally not scalable approach. Clean this mess and create domain ids for
only domains not its instances.
Co-developed-by: Srinivas Kandagatla
Signed-off-by: Srinivas Kandagatla
Signed-off-by: Ling Xu
---
drivers/misc/fast
Add GDSP0 and GDSP1 fastrpc compute-cb nodes for sa8775p SoC.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Konrad Dybcio
Signed-off-by: Ling Xu
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa87
There are some products which support GDSP remoteprocs. GDSP is General
Purpose DSP where tasks can be offloaded. There are 2 GDSPs named gdsp0
and gdsp1. Add "gdsp0" and "gdsp1" as the new supported labels for GDSP
fastrpc domains.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Ling Xu
---
Docum
在 7/9/2025 1:47 PM, Ling Xu 写道:
> The fastrpc driver has support for 5 types of remoteprocs. There are
> some products which support GDSP remoteprocs. GDSP is General Purpose
> DSP where tasks can be offloaded. This patch extends the driver to
> support GDSP remoteprocs.
>
sorry, please ignore th
>fence);
goto no_fences;
} else {
---
base-commit: 58ba80c4740212c29a1cf9b48f588e60a7612209
change-id: 20250708-syncfile-enable-signaling-a993acff1860
On Fri, Jul 04, 2025 at 01:29:23PM +0300, Jani Nikula wrote:
>
> Hi Dave & Sima -
>
> Here's the second i915 feature pull request for v6.17, mostly just
> display changes.
>
> Rodrigo will handle the subsequent (likely just fixes) pull requests for
> v6.17, if any.
>
>
> BR,
> Jani.
>
>
> dr
On Sat, 28 Jun 2025 06:02:36 +0300, Dmitry Baryshkov wrote:
> Adreno A506 and A510 have one extra clock, alwayson. Describe it in the
> schema.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked
On Sat, 28 Jun 2025 06:02:35 +0300, Dmitry Baryshkov wrote:
> Handle two cases for Adreno 7xx:
> - Adreno 702 follows A610 and A619 example and has clocks in the GPU
> node.
> - Newer 7xx GPUs use a different pattern for the compatibles and did not
> match currently.
>
> Signed-off-by: Dmitr
Hi Philipp,
On 08/07/25 04:02, Philipp Stanner wrote:
On Mon, 2025-07-07 at 11:46 -0300, Maíra Canal wrote:
When the DRM scheduler times out, it's possible that the GPU isn't
hung;
instead, a job may still be running, and there may be no valid reason
to
reset the hardware. This can occur in two
On Sat, 28 Jun 2025 06:02:37 +0300, Dmitry Baryshkov wrote:
> Rather than having a single list with all possible clocks for A3xx-A5xx
> define individual Adreno GPU types and corresponding clock lists.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> .../devicetree/bindings/display/msm/gpu.yaml
On 08.07.25 11:51, Tvrtko Ursulin wrote:
> There is no reason to queue just a single job if scheduler can take more
> and re-queue the worker to queue more.
That's not correct. This was intentionally avoided.
If more than just the scheduler is using the single threaded workqeueu other
workers, e
On Mon, 07 Jul 2025 18:48:53 +0200, Heiko Stuebner wrote:
> This enables all the necesary bits and bindings to get display output
> on the dm-m10r800-v3s addon module for the Firefly roc-rk3576-pc board.
>
> A bit of cleanup of the ili9881c, because the driver was still trying
> to send dcs comm
Am Dienstag, 8. Juli 2025, 15:23:32 Mitteleuropäische Sommerzeit schrieb Rob
Herring (Arm):
>
> On Mon, 07 Jul 2025 18:48:53 +0200, Heiko Stuebner wrote:
> > This enables all the necesary bits and bindings to get display output
> > on the dm-m10r800-v3s addon module for the Firefly roc-rk3576-pc
On 06.03.25 05:42, Balbir Singh wrote:
Support splitting pages during THP zone device migration as needed.
The common case that arises is that after setup, during migrate
the destination might not be able to allocate MIGRATE_PFN_COMPOUND
pages.
Add a new routine migrate_vma_split_pages() to supp
On Tue, Jul 8, 2025 at 4:37 PM Mario Limonciello
wrote:
>
> On 7/8/2025 3:42 AM, Samuel Zhang wrote:
> > dev_pm_ops.thaw() is called in following cases:
> > * normal case: after hibernation image has been created.
> > * error case 1: creation of a hibernation image has failed.
> > * error case 2:
On 7/8/2025 3:42 AM, Samuel Zhang wrote:
For normal hibernation, GPU do not need to be resumed in thaw since it is
not involved in writing the hibernation image. Skip resume in this case
can reduce the hibernation time.
On VM with 8 * 192GB VRAM dGPUs, 98% VRAM usage and 1.7TB system memory,
thi
On 06.03.25 05:42, Balbir Singh wrote:
When the CPU touches a zone device THP entry, the data needs to
be migrated back to the CPU, call migrate_to_ram() on these pages
via do_huge_pmd_device_private() fault handling helper.
Signed-off-by: Balbir Singh
---
include/linux/huge_mm.h | 7 +++
On 08/07/2025 13:19, Philipp Stanner wrote:
On Tue, 2025-07-08 at 10:51 +0100, Tvrtko Ursulin wrote:
There is no reason to queue just a single job if scheduler can take
more
and re-queue the worker to queue more. We can simply feed the
hardware
with as much as it can take in one go and hopeful
On Sat, Jul 05, 2025 at 01:44:40PM -0700, Robin Clark wrote:
> Hi Dave, Simona,
>
> Pull for v6.17 as described below. A bit larger this time, bringing
> in VM_BIND support, x1-45 support, x1-85 speedbin support, and sm8750
> kms support.
>
> The following changes since commit f41830c57bb8e70e28
On 08/07/2025 12:31, Philipp Stanner wrote:
On Tue, 2025-07-08 at 10:51 +0100, Tvrtko Ursulin wrote:
Extract out two copies of the identical code to function epilogue to
make
it smaller and more readable.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Br
Among the scheduler's statuses, the only one that indicates an error is
DRM_GPU_SCHED_STAT_ENODEV. Any status other than DRM_GPU_SCHED_STAT_ENODEV
signifies that the operation succeeded and the GPU is in a nominal state.
However, to provide more information about the GPU's status, it is needed
to
When the DRM scheduler times out, it's possible that the GPU isn't hung;
instead, a job just took unusually long (longer than the timeout) but is
still running, and there is, thus, no reason to reset the hardware. This
can occur in two scenarios:
1. The job is taking longer than the timeout, but
TL;DR: The only two patches that are lacking R-b's are:
[PATCH 2/8] drm/sched: Allow drivers to skip the reset and keep on running
[PATCH 7/8] drm/xe: Use DRM_GPU_SCHED_STAT_NO_HANG to skip the reset
-> If Intel CI succeeds, it's Reviewed-by: Matthew Brost
For those two patches, it would be g
Xe can skip the reset if TDR has fired before the free job worker and can
also re-arm the timeout timer in some scenarios. Instead of manipulating
scheduler's internals, inform the scheduler that the job did not actually
timeout and no reset was performed through the new status code
DRM_GPU_SCHED_S
Panfrost can skip the reset if TDR has fired before the free-job worker.
Currently, since Panfrost doesn't take any action on these scenarios, the
job is being leaked, considering that `free_job()` won't be called.
To avoid such leaks, inform the scheduler that the job did not actually
timeout and
Add a test to submit a single job against a scheduler with the timeout
configured and verify that if the job is still running, the timeout
handler will skip the reset and allow the job to complete.
Signed-off-by: Maíra Canal
Reviewed-by: Tvrtko Ursulin
Reviewed-by: Philipp Stanner
---
drivers/
When a CL/CSD job times out, we check if the GPU has made any progress
since the last timeout. If so, instead of resetting the hardware, we skip
the reset and allow the timer to be rearmed. This gives long-running jobs
a chance to complete.
Instead of manipulating scheduler's internals, inform the
Etnaviv can skip a hardware reset in two situations:
1. TDR has fired before the free-job worker and the timeout is spurious.
2. The GPU is still making progress on the front-end and we can give
the job a chance to complete.
Instead of manipulating scheduler's internals, inform the sched
As more KUnit tests are introduced to evaluate the basic capabilities of
the `timedout_job()` hook, the test suite will continue to increase in
duration. To reduce the overall running time of the test suite, decrease
the scheduler's timeout for the timeout tests.
Before this commit:
[15:42:26] El
On Fri, 04 Jul 2025 19:31:55 +0300, Dmitry Baryshkov wrote:
> Describe the Mobile Display SubSystem (MDSS) unit as present on the
> SC8180X platform.
>
> Reported-by: Konrad Dybcio
> Signed-off-by: Dmitry Baryshkov
> ---
> .../bindings/display/msm/qcom,sc8180x-mdss.yaml| 359
> ++
On Fri, 04 Jul 2025 19:31:53 +0300, Dmitry Baryshkov wrote:
> Describe the SC8180X-specific compatible for the DSI controller persent
> on the SoC. While the current DT for SC8180X doesn't use this
> compatible, all other platforms were updated to have one. This change
> makes SC8180X follow the
On Mon, 21 Apr 2025 18:21:54 +0800, Andy Yan wrote:
> The all video ports of rk3568/rk3588 share the same OVL_LAYER_SEL
> and OVL_PORT_SEL registers, and the configuration of these two registers
> can be set to take effect when the vsync signal arrives at a certain Video
> Port.
>
> If two threa
On Tue, 10 Jun 2025 23:27:48 +0200, Heiko Stuebner wrote:
> Each window of a vop2 is usable by a specific set of video ports, so while
> binding the vop2, we look through the list of available windows trying to
> find one designated as primary-plane and usable by that specific port.
>
> The code
On Thu, 29 May 2025 15:13:34 +0800, Chaoyi Chen wrote:
> Convert it to drm bridge driver, it will be convenient for us to
> migrate the connector part to the display driver later.
> Considering that some code depend on the connector, the following
> changes have been made:
> - Only process edid i
On Mon, 12 May 2025 20:46:01 +0800, Andy Yan wrote:
> Convert it to drm bridge driver, it will be convenient for us to
> migrate the connector part to the display driver later.
>
> Patches that have already been merged in drm-misc-next are dropped.
>
> PATCH 1~8 are some cleanup and refactor.
>
On Thu, 15 May 2025 20:35:54 +0800, long.yunj...@zte.com.cn wrote:
> In the probe path, dev_err() can be replaced with dev_err_probe()
> which will check if error code is -EPROBE_DEFER and prints the
> error name. It also sets the defer probe reason which can be
> checked later through debugfs.
>
On Mon, 26 May 2025 09:58:34 +0800, Chaoyi Chen wrote:
> Convert it to drm bridge driver, it will be convenient for us to
> migrate the connector part to the display driver later.
>
>
Applied, thanks!
[1/1] drm/rockchip: lvds: Convert to drm bridge
commit: 40a382aae1d4a4ca07fe19b0d16b4f
This patch adds an ioctl to reassign the gem handle of a bo.
It was formerly the first patch of my CRIU with dmabuf patchset.
Would it be possible to merge this on its own? Internal deadlines
would prefer this to be in the next kernel release if possible.
The CRIU patches that are the current use
On Mon, Jul 07, 2025 at 01:38:23PM -0700, Juston Li wrote:
Add TRACE_GPU_MEM tracepoints for tracking global GPU memory usage.
These are required by VSR on Android 12+ for reporting GPU driver memory
allocations.
v5:
- Drop process_mem tracking
- Set the gpu_id field to dev->primary->index (Luc
On Tue, Jul 08, 2025 at 04:31:31PM +0100, Tvrtko Ursulin wrote:
>
> On 08/07/2025 14:02, Christian König wrote:
> > On 08.07.25 14:54, Tvrtko Ursulin wrote:
> > >
> > > On 08/07/2025 13:37, Christian König wrote:
> > > > On 08.07.25 11:51, Tvrtko Ursulin wrote:
> > > > > There is no reason to que
CRIU restore of drm buffer objects requires the ability to create
or import a buffer object with a specific gem handle.
Add new drm ioctl DRM_IOCTL_GEM_CHANGE_HANDLE, which takes
the gem handle of an object and moves that object to a
specified new gem handle.
This ioctl needs to call drm_prime_re
Rui Salvaterra wrote:
> Hi,
>
>
> The machine (Atom 330 CPU, ION chipset, GeForce 9400M graphics) works,
> but graphics are dead. Dmesg shows the following (Linux 6.16-rc5):
>
> [ 34.408331] BUG: kernel NULL pointer dereference, address:
> [ 34.408351] #PF: supervisor instruc
The fastrpc driver has support for 5 types of remoteprocs. There are
some products which support GDSP remoteprocs. GDSP is General Purpose
DSP where tasks can be offloaded. Add fastrpc nodes and task offload
support for GDSP. Also strict domain IDs for domain.
Patch [v5]:
https://lore.kernel.org/l
On Tue, Jul 08, 2025 at 04:10:55PM +0200, David Hildenbrand wrote:
> On 06.03.25 05:42, Balbir Singh wrote:
> > Make THP handling code in the mm subsystem for THP pages
> > aware of zone device pages. Although the code is
> > designed to be generic when it comes to handling splitting
> > of pages,
Dear Imre,
Thank you very much for your patch, and the detailed commit message.
Am 08.07.25 um 23:23 schrieb Imre Deak:
Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from
DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for
DPCD probing, since this results in link
On Tue, Jul 8, 2025 at 6:12 AM Felix Kuehling wrote:
>
> On 2025-07-05 04:05, Han Gao wrote:
> > KFD has been confirmed that can run on LoongArch systems.
> > It's necessary to support CONFIG_HSA_AMD on LoongArch.
> >
> > Signed-off-by: Han Gao
> > ---
> > drivers/gpu/drm/amd/amdkfd/Kconfig | 2
On 08.07.25 06:22, Geoffrey McRae wrote:
> Some kfd ioctls may not be available depending on the kernel version the
> user is running, as such we need to report -ENOTTY so userland can
> determine the cause of the ioctl failure.
In general sounds like a good idea, but ENOTTY is potentially a bit m
On 08/07/2025 07:54, Arunpravin Paneer Selvam wrote:
- Added a handler in DRM buddy manager to reset the cleared
flag for the blocks in the freelist.
- This is necessary because, upon resuming, the VRAM becomes
cluttered with BIOS data, yet the VRAM backend manager
believes that everyth
On Mon, 07 Jul 2025 18:49:01 +0200, Heiko Stuebner wrote:
> The rk3576 controller is based on the same newer Synopsis IP as the one
> found in the rk3588.
>
> Its external setting bits in the GRF are different though, so it needs
> its own distinct compatible.
>
> Signed-off-by: Heiko Stuebner
On Sun, Jun 22, 2025 at 11:32 PM Boris Brezillon
wrote:
>
> On Wed, 18 Jun 2025 07:55:49 -0700
> Chia-I Wu wrote:
>
> > It is unclear why fence errors were set only for CS_INHERIT_FAULT.
> > Downstream driver also does not treat CS_INHERIT_FAULT specially.
> > Remove the check.
> >
> > Signed-off
Move to using the new API devm_drm_panel_alloc() to allocate the
panel. In the call to the new API, avoid using explicit type and use
__typeof() for more type safety.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-startek-kd070fhfid015.c | 12 ++--
1 file changed, 6 inser
Move to using the new API devm_drm_panel_alloc() to allocate the
panel. In the call to the new API, avoid using explicit type and use
__typeof() for more type safety.
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c | 12 ++--
1 file changed, 6 insertion
* li...@treblig.org (li...@treblig.org) wrote:
> From: "Dr. David Alan Gilbert"
>
> Hi,
> A couple of small deadcodings for qxl. The first
> just cleans up a couple of trivial unusued wrappers.
> The second cleans out some debugfs code that's been unused
> for a few years.
>
> Dave
> Signed-o
On Tue, 08 Jul 2025 18:06:44 +0800, LiangCheng Wang wrote:
> From: Wig Cheng
>
> Mayqueen is a Taiwan-based company primarily focused on the development
> of arm64 development boards and e-paper displays.
>
> Signed-off-by: Wig Cheng
> ---
> Documentation/devicetree/bindings/vendor-prefixes.
On Tue, 08 Jul 2025 18:06:46 +0800, LiangCheng Wang wrote:
> The binding is for the Mayqueen Pixpaper e-ink display panel,
> controlled via an SPI interface.
>
> Signed-off-by: LiangCheng Wang
> ---
> .../bindings/display/mayqueen,pixpaper.yaml| 63
> ++
> 1 file c
Commit a40c5d727b81 ("drm/dp: Change AUX DPCD probe address from
DPCD_REV to LANE0_1_STATUS") stopped using the DPCD_REV register for
DPCD probing, since this results in link training failures at least when
using an Intel Barlow Ridge TBT hub at UHBR link rates (the
DP_INTRA_HOP_AUX_REPLY_INDICATIO
dev_pm_ops.thaw() is called in following cases:
* normal case: after hibernation image has been created.
* error case 1: creation of a hibernation image has failed.
* error case 2: restoration from a hibernation image has failed.
For normal case, it is called mainly for resume storage devices for
Modern data center dGPUs are usually equipped with very large VRAM. On
server with such dGPUs(192GB VRAM * 8) and 2TB system memory, hibernate
will fail due to no enough free memory.
The root cause is that during hibernation all VRAM memory get evicted to
GTT or shmem. In both case, it is in syste
When hibernate with data center dGPUs, huge number of VRAM BOs evicted
to GTT and takes too much system memory. This will cause hibernation
fail due to insufficient memory for creating the hibernation image.
Move GTT BOs to shmem in KMD, then shmem to swap disk in kernel
hibernation code to make r
> -Original Message-
> From: Greg KH
> Sent: Tuesday, July 8, 2025 12:18 PM
> To: Nilawar, Badal
> Cc: intel...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> ker...@vger.kernel.org; Gupta, Anshuman ;
> Vivi, Rodrigo ; Usyskin, Alexander
> ; Ceraolo Spurio, Daniele
>
For normal hibernation, GPU do not need to be resumed in thaw since it is
not involved in writing the hibernation image. Skip resume in this case
can reduce the hibernation time.
On VM with 8 * 192GB VRAM dGPUs, 98% VRAM usage and 1.7TB system memory,
this can save 50 minutes.
Signed-off-by: Samu
This new api is used for hibernation to move GTT BOs to shmem after
VRAM eviction. shmem will be flushed to swap disk later to reduce
the system memory usage for hibernation.
Signed-off-by: Samuel Zhang
---
drivers/gpu/drm/ttm/ttm_device.c | 22 ++
include/drm/ttm/ttm_device.
On 7/8/2025 1:12 PM, Samuel Zhang wrote:
> For normal hibernation, GPU do not need to be resumed in thaw since it is
> not involved in writing the hibernation image. Skip resume in this case
> can reduce the hibernation time.
>
> On VM with 8 * 192GB VRAM dGPUs, 98% VRAM usage and 1.7TB system
From: Wig Cheng
Mayqueen is a Taiwan-based company primarily focused on the development
of arm64 development boards and e-paper displays.
Signed-off-by: Wig Cheng
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devi
Introduce a DRM driver for the Mayqueen Pixpaper e-ink display panel,
which is controlled via SPI. The driver supports a 122x250 resolution
display with XRGB format.
Also, add a MAINTAINERS entry for the Pixpaper driver.
Signed-off-by: LiangCheng Wang
---
MAINTAINERS |
The Chuwi MiniBook X (CWI558) uses a tablet screen which is oriented
incorrectly by default. This adds a DMI quirk to rotate the panel into
the correct orientation.
Signed-off-by: Ibrahim Burak Yorulmaz
---
drivers/gpu/drm/drm_panel_orientation_quirks.c | 6 ++
1 file changed, 6 insertions(+
The binding is for the Mayqueen Pixpaper e-ink display panel,
controlled via an SPI interface.
Signed-off-by: LiangCheng Wang
---
.../bindings/display/mayqueen,pixpaper.yaml| 63 ++
1 file changed, 63 insertions(+)
diff --git a/Documentation/devicetree/bindings/displ
u/drm/tiny/pixpaper.c| 784 +
6 files changed, 871 insertions(+)
---
base-commit: d7b8f8e20813f0179d8ef519541a3527e7661d3a
change-id: 20250708-drm-6021df0715d7
Best regards,
--
LiangCheng Wang
You keep forgetting the "RFC" in your recent series's. Please add it
next time.
P.
On Tue, 2025-07-08 at 10:51 +0100, Tvrtko Ursulin wrote:
> As a summary, the new scheduling algorithm is insipired by the
> original Linux
> CFS and so far no scheduling regressions have been found. There are
> imp
dev_pm_ops.thaw() is called in following cases:
* normal case: after hibernation image has been created.
* error case 1: creation of a hibernation image has failed.
* error case 2: restoration from a hibernation image has failed.
For normal case, it is called mainly for resume storage devices for
For normal hibernation, GPU do not need to be resumed in thaw since it is
not involved in writing the hibernation image. Skip resume in this case
can reduce the hibernation time.
On VM with 8 * 192GB VRAM dGPUs, 98% VRAM usage and 1.7TB system memory,
this can save 50 minutes.
Signed-off-by: Samu
Modern data center dGPUs are usually equipped with very large VRAM. On
server with such dGPUs(192GB VRAM * 8) and 2TB system memory, hibernate
will fail due to no enough free memory.
The root cause is that during hibernation all VRAM memory get evicted to
GTT or shmem. In both case, it is in syste
This new api is used for hibernation to move GTT BOs to shmem after
VRAM eviction. shmem will be flushed to swap disk later to reduce
the system memory usage for hibernation.
Signed-off-by: Samuel Zhang
---
drivers/gpu/drm/ttm/ttm_device.c | 23 +++
include/drm/ttm/ttm_device
When hibernate with data center dGPUs, huge number of VRAM data will be
moved to shmem during dev_pm_ops.prepare(). These shmem pages take a lot
of system memory so that there's no enough free memory for creating the
hibernation image. This will cause hibernation fail and abort.
After dev_pm_ops.p
When hibernate with data center dGPUs, huge number of VRAM BOs evicted
to GTT and takes too much system memory. This will cause hibernation
fail due to insufficient memory for creating the hibernation image.
Move GTT BOs to shmem in KMD, then shmem to swap disk in kernel
hibernation code to make r
KFD has been confirmed that can run on LoongArch systems.
It's necessary to support CONFIG_HSA_AMD on LoongArch.
Signed-off-by: Han Gao
---
Changes in v2:
Add 64BIT
v1:
https://lore.kernel.org/amd-gfx/56e7ec54-9820-4e02-be97-2a9e1dedd...@amd.com/T/#t
drivers/gpu/drm/amd/amdkfd/Kconfig | 2
> -Original Message-
> From: Greg KH
> Sent: Tuesday, July 8, 2025 12:19 PM
> To: Nilawar, Badal
> Cc: intel...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> ker...@vger.kernel.org; Gupta, Anshuman ;
> Vivi, Rodrigo ; Usyskin, Alexander
> ; Ceraolo Spurio, Daniele
>
Hi Simona,
On Mon, Jul 07, 2025 at 05:18:14PM +0200, Simona Vetter wrote:
> The object is potentially already gone after the drm_gem_object_put().
> In general the object should be fully constructed before calling
> drm_gem_handle_create(), except the debugfs tracking uses a separate
> lock and li
Reduce to one spin_unlock for hopefully a little bit clearer flow in the
function. It may appear that there is a behavioural change with the
drm_sched_start_timeout_unlocked() now not being called if there were
initially no jobs on the pending list, and then some appeared after
unlock, however if t
To implement fair scheduling we will need as accurate as possible view
into per entity GPU time utilisation. Because sched fence execution time
are only adjusted for accuracy in the free worker we need to process
completed jobs as soon as possible so the metric is most up to date when
view from the
There is no need to keep entities with no jobs in the tree so lets remove
it once the last job is consumed. This keeps the tree smaller which is
nicer and more efficient as entities are removed and re-added on every
popped job.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummri
As a summary, the new scheduling algorithm is insipired by the original Linux
CFS and so far no scheduling regressions have been found. There are improvements
in fairness and scheduling of interactive clients when running in parallel with
a heavy GPU load (for example Pierre-Eric has one viewperf m
Currently the job free work item will lock sched->job_list_lock first time
to see if there are any jobs, free a single job, and then lock again to
decide whether to re-queue itself if there are more finished jobs.
Since drm_sched_get_finished_job() already looks at the second job in the
queue we c
This time round we explore the rate of submitted job queue processing
with multiple identical parallel clients.
Example test output:
3 clients:
t cycle: min avg max : ...
+ 0ms 000 : 0 0 0
+ 102ms 2
Extract out two copies of the identical code to function epilogue to make
it smaller and more readable.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_main.c | 48 +++---
1 f
Round-robin being the non-default policy and unclear how much it is used,
we can notice that it can be implemented using the FIFO data structures if
we only invent a fake submit timestamp which is monotonically increasing
inside drm_sched_rq instances.
So instead of remembering which was the last
Move the code dealing with entities entering and exiting run queues to
helpers to logically separate it from jobs entering and exiting entities.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/sched_en
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