Uprev IGT to the latest version and update expectation files.
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/ci/gitlab-ci.yml | 2 +-
.../gpu/drm/ci/xfails/amdgpu-stoney-fails.txt | 8 +-
.../gpu/drm/ci/xfails/amdgpu-stoney-skips.txt | 1 +
drivers/gpu/drm/ci/xfails/i915-aml
This patch series implements the Vec::truncate and Vec::resize methods
that were needed by the nova driver and removes the corresponding item
from their task list
Andrew Ballance (3):
rust: alloc: add Vec::truncate method
rust: alloc: add Vec::resize method
gpu: nova-core: remove completed V
On Sat, Mar 08, 2025 at 03:17:23PM +0100, Konrad Dybcio wrote:
> On 8.03.2025 2:42 AM, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > Qualcomm SAR2130P requires slightly different setup for the DSI PHY. It
> > is a 5nm PHY (like SM8450), so supplies are the same, but the rest of
> > t
This series improves the way DRM bridges are allocated and initialized and
makes them reference-counted. The goal of reference counting is to avoid
use-after-free by drivers which got a pointer to a bridge and keep it
stored and used even after the bridge has been deallocated.
The overall goal is
On Fri, 07 Mar 2025 12:30:58 +0300, Dan Carpenter wrote:
> The __drmm_universal_plane_alloc() function doesn't return NULL, it
> returns error pointers. Update the check to match.
>
>
Applied, thanks!
[1/1] drm: adp: Fix NULL vs IS_ERR() check in adp_plane_new()
(no commit info)
Best
On Thu, Mar 06, 2025 at 07:11:21PM +0100, Konrad Dybcio wrote:
> From: Konrad Dybcio
>
> The preemptively-merged node contains a property absent from the final
> bindings. Remove it.
>
> Signed-off-by: Konrad Dybcio
> ---
> arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts | 2 --
> 1 file
Hi Maxime,
On Tue, 04 Mar 2025 12:10:51 +0100
Maxime Ripard wrote:
> Let's provide an helper to make it easier for bridge drivers to
> power-cycle their bridge.
>
> In order to avoid a circular dependency between that new helper and
> drm_atomic_helper_reset_crtc(), this new helper will be in a
On Fri, Mar 14, 2025 at 11:31:15AM +0100, Luca Ceresoli wrote:
> DRM bridges are currently considered as a fixed element of a DRM card, and
> thus their lifetime is assumed to extend for as long as the card
> exists. New use cases, such as hot-pluggable hardware with video bridges,
> require DRM br
From: Dmitry Baryshkov
Switch drm_dp_tunnel.c to use new set of DPCD read / write helpers.
Reviewed-by: Lyude Paul
Acked-by: Jani Nikula
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/display/drm_dp_tunnel.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
d
Hi Dave, Simona,
Updates for 6.15.
The following changes since commit 236f475d29f8e585a72fb6fac7f8bb4dc4b162b7:
Merge tag 'amd-drm-next-6.15-2025-03-07' of
https://gitlab.freedesktop.org/agd5f/linux into drm-next (2025-03-10 09:04:52
+1000)
are available in the Git repository at:
https:/
This adds the UAPI for the Asahi driver targeting the GPU in the Apple
M1 and M2 series systems on chip. The UAPI design is based on other
modern Vulkan-capable drivers, including Xe and Panthor. Memory
management is based on explicit VM management. Synchronization is
exclusively explicit sync.
Th
On Fri, Mar 14, 2025 at 08:45:17AM +0100, Maxime Ripard wrote:
> On Fri, Mar 14, 2025 at 07:52:35AM +0200, Dmitry Baryshkov wrote:
> > On Fri, Mar 14, 2025 at 08:50:29AM +0800, Andy Yan wrote:
> > >
> > > Hi Maxime and Simona,
> > >
> > >
> > > At 2025-03-13 19:55:33, "Maxime Ripard" wrote:
> >
Hi Andrew,
On Fri, Mar 14, 2025 at 09:42:32PM -0500, Andrew Ballance wrote:
> This patch series implements the Vec::truncate and Vec::resize methods
> that were needed by the nova driver and removes the corresponding item
> from their task list
>
> Andrew Ballance (3):
> rust: alloc: add Vec::t
Hi!
> > Comments from previous review were not addressed.
> >
> > Most importantly, this is not a way to do kernel interface. We want
> > reasonable interface that can be documented and modified as needed. We
> > want to pass /dev/input to userspace, not raw HID. This is not ok.
>
> There are al
Add a basic test for exercising modifying the entities scheduler list at
runtime.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 69 ++-
1 file changed, 68 insert
On Fri, Mar 14, 2025 at 08:50:36AM +0100, Maxime Ripard wrote:
> On Tue, Mar 11, 2025 at 07:50:50PM +0200, Dmitry Baryshkov wrote:
> > On Tue, Mar 11, 2025 at 04:58:59PM +0100, Maxime Ripard wrote:
> > > On Tue, Mar 11, 2025 at 05:50:09PM +0200, Dmitry Baryshkov wrote:
> > > > On Tue, Mar 11, 2025
On Thu, Mar 13, 2025 at 12:14:04PM +0530, Ayushi Makhija wrote:
>
>
> On 3/12/2025 4:33 PM, Dmitry Baryshkov wrote:
> > On Wed, 12 Mar 2025 at 11:47, Ayushi Makhija
> > wrote:
> >>
> >> On 3/11/2025 9:11 PM, Dmitry Baryshkov wrote:
> >>> On Tue, Mar 11, 2025 at 05:54:44PM +0530, Ayushi Makhija
The requested Vec methods have been implemented thus, removes
the completed item from the nova task list
Signed-off-by: Andrew Ballance
---
Documentation/gpu/nova/core/todo.rst | 10 --
1 file changed, 10 deletions(-)
diff --git a/Documentation/gpu/nova/core/todo.rst
b/Documentation/gp
Hi Stefan,
On 15/03/25 06:52, Stefan Wahren wrote:
Hello,
Am 13.03.25 um 20:04 schrieb Maíra Canal:
+Cc Stefan
Hi Krzysztof,
On 13/03/25 12:03, Krzysztof Kozlowski wrote:
On 13/03/2025 15:43, Maíra Canal wrote:
In order to enforce per-SoC register rules, add per-compatible
restrictions. V3
On Sat, Mar 15, 2025 at 11:43:54AM +0100, Noralf Trønnes wrote:
>
>
> On 15.03.2025 00:50, Alex Lanzano wrote:
> > On Fri, Mar 14, 2025 at 12:57:27PM +0100, Josef Luštický wrote:
> >> On Mon, Mar 10, 2025 at 7:33 PM Alex Lanzano
> >> wrote:
> >>>
> >>> On Fri, Mar 07, 2025 at 10:25:18AM +0100,
On 3/15/2025 5:17 AM, Maíra Canal wrote:
Hi Stefan,
On 15/03/25 06:52, Stefan Wahren wrote:
Hello,
Am 13.03.25 um 20:04 schrieb Maíra Canal:
+Cc Stefan
Hi Krzysztof,
On 13/03/25 12:03, Krzysztof Kozlowski wrote:
On 13/03/2025 15:43, Maíra Canal wrote:
In order to enforce per-SoC regist
On 14.03.2025 23:06, Cavitt, Jonathan wrote:
> -Original Message-
> From: Wajdeczko, Michal
> Sent: Friday, March 14, 2025 10:02 AM
> To: Cavitt, Jonathan ;
> intel...@lists.freedesktop.org
> Cc: Gupta, saurabhg ; Zuo, Alex
> ; joonas.lahti...@linux.intel.com; Brost, Matthew
> ; Zha
From: Adam Skladowski
Adreno 505 (MSM8937), Adreno 506(MSM8953) and Adreno 510(MSM8976)
require Always-on branch clock to be enabled, describe it.
Signed-off-by: Adam Skladowski
[reword commit, move alwayson on the first place]
Signed-off-by: Barnabás Czémán
---
Documentation/devicetree/bindi
Add initial support for Xiaomi Redmi 3S (land).
Signed-off-by: Barnabás Czémán
---
arch/arm64/boot/dts/qcom/Makefile| 1 +
arch/arm64/boot/dts/qcom/msm8937-xiaomi-land.dts | 408 +++
2 files changed, 409 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/M
On Fri, Mar 14, 2025 at 09:42:34PM -0500, Andrew Ballance wrote:
> implemnts the equivalent of the rust std's Vec::resize
> on the kernel's Vec type.
Nit: It is preferred to use the imperative form, i.e. "Implement the equivalent
[...]".
>
> Signed-off-by: Andrew Ballance
> ---
> rust/kernel/a
Add device tree bindings for the global clock controller on Qualcomm
MSM8937 platform.
Signed-off-by: Barnabás Czémán
---
.../bindings/clock/qcom,gcc-msm8937.yaml | 75 ++
include/dt-bindings/clock/qcom,gcc-msm8917.h | 17 +
2 files changed, 92 insertions(
Document Xiaomi Redmi 3S (land).
Add qcom,msm8937 for msm-id, board-id allow-list.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Barnabás Czémán
---
Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qc
From: Daniil Titov
Modify existing MSM8917 driver to support MSM8937 SoC. Override frequencies
which are different in this chip. Register all the clocks to the framework
for the clients to be able to request for them. Add new variant of GDSC for
new chip.
Signed-off-by: Daniil Titov
Signed-off-
This patch series add initial support for MSM8937 SoC
and Xiaomi Redmi 3S (land).
The series is extending the MSM8917 gcc and pinctrl drivers
because they are sibling SoCs.
MSM8937 have 4 more A53 cores and have one more dsi port then
MSM8917.
It implements little-big architecture and uses Adreno
From: Dang Huynh
Add initial support for MSM8937 SoC.
Signed-off-by: Dang Huynh
Co-developed-by: Barnabás Czémán
Signed-off-by: Barnabás Czémán
---
arch/arm64/boot/dts/qcom/msm8937.dtsi | 2149 +
1 file changed, 2149 insertions(+)
diff --git a/arch/arm64/boot
Hi,
On 13-Mar-25 10:16 PM, Vicki Pfau wrote:
> Add a panel orientation quirk for the ZOTAC Gaming Zone handheld gaming
> device.
>
> Signed-off-by: Vicki Pfau
Thanks, patch looks good to me:
Reviewed-by: Hans de Goede
drm-misc maintainers, I'm dealing with a huge backlog of
patch-review, bu
Dear Linux Kernel Developers,I’ve encountered a KASAN-reported
slab-use-after-free in the DRM atomic helper on Linux 6.14.0-rc4
during a commit operation. Here are the details:
Kernel commit: v6.14-rc4 (Commits on Feb 24, 2025)
Kernel Config : https://github.com/Strforexc/LinuxKernelbug/blob/main/
On Fri, Mar 07, 2025 at 09:26:54AM -0800, Rob Clark wrote:
> On Fri, Mar 7, 2025 at 9:00 AM Maxime Ripard wrote:
> > On Fri, Mar 07, 2025 at 08:42:46AM -0800, Rob Clark wrote:
> > > On Tue, Sep 24, 2024 at 5:27 AM Vignesh Raman
> > > > On 12/09/24 11:18, Dmitry Baryshkov wrote:
> > > > > On Mon, S
On Mon, Mar 10, 2025 at 4:07 AM Maxime Ripard wrote:
>
> On Fri, Mar 07, 2025 at 09:26:54AM -0800, Rob Clark wrote:
> > On Fri, Mar 7, 2025 at 9:00 AM Maxime Ripard wrote:
> > > On Fri, Mar 07, 2025 at 08:42:46AM -0800, Rob Clark wrote:
> > > > On Tue, Sep 24, 2024 at 5:27 AM Vignesh Raman
> > >
On Mon, 2025-03-10 at 08:44 +0100, Christian König wrote:
> This reverts commit 44d2f310f008613c1dbe5e234c2cf2be90cbbfab.
>
> Sorry for the delayed response, I only stumbled over this now while
> going
> over old mails and then re-thinking my reviewed by for this change.
>
> The function drm_sche
On Fri, 14 Mar 2025 11:36:49 +0200, Dmitry Baryshkov wrote:
> It is common for the DisplayPort bridges to implement audio support. In
> preparation to providing a generic framework for DP audio, add
> corresponding interface to struct drm_bridge. As suggested by Maxime
> for now this is mostly c&p
From: Andy Yan
It is not recommended for drivers to include UAPI header
directly.
Signed-off-by: Andy Yan
---
drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
b/drivers/gpu/drm/bridge/s
On 2025-03-10 12:06 pm, Maxime Ripard wrote:
In order to support any device using the GEM support, let's charge any
GEM DMA allocation into the dmem cgroup.
Signed-off-by: Maxime Ripard
---
drivers/gpu/drm/drm_gem.c| 5 +
drivers/gpu/drm/drm_gem_dma_helper.c | 6 ++
incl
The J721S2 binding is based on the TI downstream binding in 54b0f2a00d92
("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1] but with updated
compatible strings.
The clock[2] and power[3] indices were verified from docs, but the
source of the interrupt index remains elusive.
[1]: https://gi
The IRQF_NO_AUTOEN can be used for the drivers that don't want
interrupts to be enabled automatically via devm_request_threaded_irq().
Using this flag can provide be more robust compared to the way of
calling disable_irq() after devm_request_threaded_irq() without the
IRQF_NO_AUTOEN flag.
Suggeste
On Wed, Mar 05, 2025 at 05:59:43PM -0500, Lyude Paul wrote:
> Optional trait methods for implementing the atomic_begin and atomic_flush
> callbacks for a CRTC.
>
> Signed-off-by: Lyude Paul
> ---
> rust/kernel/drm/kms/crtc.rs | 90 -
> 1 file changed, 88 inser
On Fri, 14 Mar 2025 11:31:23 +0100, Luca Ceresoli wrote:
> Allow this bridge to be removable without dangling pointers and
> use-after-free, together with proper use of drm_bridge_get() and _put() by
> consumers.
>
> Signed-off-by: Luca Ceresoli
>
> [ ... ]
Reviewed-by: Maxime Ripard
Thanks!
Hello again,
On 2/4/25 7:18 PM, Jason Gunthorpe wrote:
Previously with tegra-smmu, even with CONFIG_IOMMU_DMA, the default domain
could have been left as NULL. The NULL domain is specially recognized by
host1x_iommu_attach() as meaning it is not the DMA domain and
should be replaced with the s
On Tue, 11 Mar 2025 01:49:57 +, li...@treblig.org wrote:
> The pcf50633 was used as part of the OpenMoko devices but
> the support for its main chip was recently removed in:
> commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support")
>
> See https://lore.kernel.org/all/Z8z236h4B5A6Ki3D@gall
On Wed, Mar 05, 2025 at 05:59:21PM -0500, Lyude Paul wrote:
> The next step is adding a set of basic bindings to create a plane, which
> has to happen before we can create a CRTC (since we need to be able to at
> least specify a primary plane for a CRTC upon creation). This mostly
> follows the sam
On Fri, Mar 14, 2025 at 11:38:40AM +0800, Andy Yan wrote:
> From: Andy Yan
>
> The helper functions drm_dp_link_power_up/down were moved to Tegra
> DRM at 2019[0].
Just mention commit here like "in the commit 9a42c7c647a9 ("drm/tegra:
Move drm_dp_link helpers to Tegra DRM")"
>
> Now since more
On Fri, Mar 14, 2025 at 09:42:33PM -0500, Andrew Ballance wrote:
> implements the equivalent to the std's Vec::truncate
> on the kernel's Vec type.
>
> Signed-off-by: Andrew Ballance
> ---
> rust/kernel/alloc/kvec.rs | 36
> 1 file changed, 36 insertions(+)
>
Commit 8f460e2c78f2 ("drm/i915: Demidlayer driver loading") which
introduced manual device registration also added a message that is
submitted on device registration failure as an error. If that failure is
triggered by error injection test, that's an expected error, but CI still
reports it as a bu
On Thu, Mar 06, 2025 at 07:11:20PM +0100, Konrad Dybcio wrote:
> From: Konrad Dybcio
>
> The node is currently named power-controller, which requires the device
> underneath is a power domain provider. Rename it to align with other
> SoCs and resolve this sort of warnings:
>
> power-controller@c
From: Baihan Li
DP controller can support generating a color bar signal over the
DisplayPort interface. This can be useful to check for possible DDR
or GPU problems, as the signal generator resides completely in the DP
block. Add debugfs file that controls colorbar generator.
echo: config the co
On Fri, 14 Mar 2025 11:36:48 +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> As pointed out by Laurent, OP bits are supposed to describe operations.
> Split DRM_BRIDGE_OP_HDMI_AUDIO from DRM_BRIDGE_OP_HDMI instead of
> overloading DRM_BRIDGE_OP_HDMI.
>
> [ ... ]
Reviewed-by: Maxime
The function sun4i_backend_atomic_check was dereferencing pointers
returned by drm_atomic_get_plane_state without checking for errors. This
could lead to undefined behavior if the function returns an error pointer.
This commit adds checks using IS_ERR to ensure that plane_state is
valid before der
Hi all,
This is a new iteration on Panfrost support for AARCH64_4K page table
format. The main reason behind this patchset is that MediaTek MT8188 SoC
(ARM Mali-G57 MC3 GPU) constantly faults due to the actual Panfrost cache
configuration.
Currently, Panfrost only supports MMU configuration in "L
Do not create a custom directory in debugfs-root, but use the
debugfs_init callback to create a custom directory at the given place
for the bridge. The new directory layout looks like this on a Renesas
GrayHawk-Single with a R-Car V4M SoC:
/sys/kernel/debug/dri/feb0.display/DP-1/1-002c
Do not create a custom directory in debugfs-root, but use the
debugfs_init callback to create a custom directory at the given place
for the bridge.
Signed-off-by: Wolfram Sang
---
Only build tested, but following the same pattern as the tested
ti-sn65dsi86.
Changes since v1:
* switch from 'clie
On Sat, Mar 15, 2025 at 3:43 AM Andrew Ballance
wrote:
>
> +/// # Example
Nit: please use the plural for section headers.
Thanks!
Cheers,
Miguel
On Wed, Mar 05, 2025 at 05:59:34PM -0500, Lyude Paul wrote:
> Next up is introducing bindings that we can use to represent the global DRM
> atomic state, along with all of the various object states contained within.
> We do this by introducing a few new concepts: borrowed states, atomic state
> mut
Hi Jonathan,
kernel test robot noticed the following build warnings:
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url:
https://github.com/intel-lab-lkp/linux/commits/Jonathan-Cavitt/drm-xe-xe_gt_pagefault-Disallow-writes-to-read-only-VMAs/20250308-064247
base: https://
On 13.03.2025 19:34, Jonathan Cavitt wrote:
> Move the pagefault struct from xe_gt_pagefault.c to the
> xe_gt_pagefault_types.h header file, along with the associated enum values.
>
> v2:
> - Normalize names for common header (Matt Brost)
>
> v3:
> - s/Migrate/Move (Michal W)
> - s/xe_pagefaul
From: qianyi liu
The last_scheduled fence leaks when an entity is being killed and adding
the cleanup callback fails.
Decrement the reference count of prev when dma_fence_add_callback()
fails, ensuring proper balance.
Cc: sta...@vger.kernel.org
Fixes: 2fdb8a8f07c2 ("drm/scheduler: rework entity
On Sat, Mar 15, 2025 at 11:55:22PM +0530, Tejas Vipin wrote:
> Changes the novatek-nt36523 panel to use multi style functions for
> improved error handling.
>
> Reviewed-by: Douglas Anderson
> Signed-off-by: Tejas Vipin
> ---
> Changes in v4:
> - Cleanup nt36523_prepare
>
> Link to v3:
> h
On Thu, 13 Mar 2025 14:16:44 -0700, Vicki Pfau wrote:
> Add a panel orientation quirk for the ZOTAC Gaming Zone handheld gaming
> device.
>
>
Applied to drm-misc-next, thanks!
[1/1] drm: panel-orientation-quirks: Add ZOTAC Gaming Zone
commit: 96c85e428ebaeacd2c640eba075479ab92072ccd
Bes
From: Dmitry Baryshkov
Since DPU 5.0 CTL blocks do not require DPU_CTL_SPLIT_DISPLAY, as single
CTL is used for both interfaces. As both RM and encoder now handle
active CTLs, drop that feature bit.
Reviewed-by: Marijn Suijten
Tested-by: Neil Armstrong # on SM8550-QRD
Signed-off-by: Dmitry Bar
On Sat, Feb 15, 2025 at 02:14:54PM -0500, Alex Lanzano wrote:
> On Fri, Feb 14, 2025 at 08:04:41PM -0500, Alex Lanzano wrote:
> > On Fri, Feb 14, 2025 at 10:29:29AM +0100, Josef Luštický wrote:
> > > Hello Alex,
> > > there is a bug in mipi_dbi_hw_reset() function that implements the logic
> > > o
Hi,
On Fri, Mar 07, 2025 at 07:55:52AM +0200, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov
>
> As pointed out by Laurent, OP bits are supposed to describe operations.
> Split DRM_BRIDGE_OP_HDMI_AUDIO from DRM_BRIDGE_OP_HDMI instead of
> overloading DRM_BRIDGE_OP_HDMI.
>
> Signed-off-by: Dmi
On Thu, Mar 06, 2025 at 04:45:31PM +1100, Alistair Popple wrote:
> On Wed, Mar 05, 2025 at 05:26:57PM -0800, Matthew Brost wrote:
> > Add documentation for agree upon GPU SVM design principles, current
> > status, and future plans.
>
> One minor nit and a comment below, but feel free to add:
>
>
On Wed, 12 Mar 2025 15:40:56 +, David Turner wrote:
> Add ALSA jack detection to the vc4-hdmi audio driver so userspace knows
> when to add/remove HDMI audio devices.
>
> Signed-off-by: Stefan Wahren
> Signed-off-by: David Turner
>
> [ ... ]
Reviewed-by: Maxime Ripard
Thanks!
Maxime
From: Baihan Li
This dp controller need features of digital-to-analog conversion and
high-speed transmission in chip by its extern serdes controller. Our
serdes cfg is relatively simple, just need two register configurations.
Don't need too much functions, like: power on/off, initialize, and some
On 3/6/25 12:19 PM, Jeff Hugo wrote:
From: Jeffrey Hugo
When slicing a BO, we need to iterate through the BO's sgt to find the
right pieces to construct the slice. Some of the data types chosen for
this process are incorrectly too small, and can overflow. This can
result in the incorrect sli
From: Alessio Belle
Extend interrupt handling logic to check for safety event IRQs, then clear
and handle them in the IRQ handler thread.
Safety events need to be checked and cleared with a different set of GPU
registers than those the IRQ handler has been using so far.
Only two safety events n
On Sat Mar 15, 2025 at 12:15 PM CET, Andrew Ballance wrote:
> On Sat, Mar 15, 2025 at 10:09:26AM +, Benno Lossin wrote:
>> On Sat Mar 15, 2025 at 3:42 AM CET, Andrew Ballance wrote:
>> > implements the equivalent to the std's Vec::truncate
>> > on the kernel's Vec type.
>> >
>> > Signed-off-by:
On March 14, 2025 12:06:04 PM PDT, David Laight
wrote:
>On Thu, 13 Mar 2025 14:09:24 -0700
>Jacob Keller wrote:
>
>> On 3/13/2025 9:36 AM, H. Peter Anvin wrote:
>> > On March 13, 2025 9:24:38 AM PDT, Yury Norov wrote:
>> >
>> >> On Wed, Mar 12, 2025 at 05:09:16PM -0700, H. Peter Anvin wrote:
From: Rob Clark
IB_SIZE is only b0..b19. Starting with a6xx gen3, additional fields
were added above the IB_SIZE. Accidentially setting them can cause
badness. Fix this by properly defining the CP_INDIRECT_BUFFER packet
and using the generated builder macro to ensure unintended bits are not
se
On Sat Mar 15, 2025 at 3:42 AM CET, Andrew Ballance wrote:
> implements the equivalent to the std's Vec::truncate
> on the kernel's Vec type.
>
> Signed-off-by: Andrew Ballance
> ---
> rust/kernel/alloc/kvec.rs | 36
> 1 file changed, 36 insertions(+)
>
> diff
On Sat Mar 15, 2025 at 3:42 AM CET, Andrew Ballance wrote:
> implemnts the equivalent of the rust std's Vec::resize
> on the kernel's Vec type.
>
> Signed-off-by: Andrew Ballance
Reviewed-by: Benno Lossin
---
Cheers,
Benno
> ---
> rust/kernel/alloc/kvec.rs | 25 +
> 1
Hi Doug,
> Seems reasonable to me. I would probably put an error message in this
> case, though? I don't think regmap_read() necessarily prints an error
> so it would just be a mysterious failure for why things didn't probe,
> right?
OK, can do that.
> This also only solves the problems for one
On 15.03.2025 00:50, Alex Lanzano wrote:
> On Fri, Mar 14, 2025 at 12:57:27PM +0100, Josef Luštický wrote:
>> On Mon, Mar 10, 2025 at 7:33 PM Alex Lanzano wrote:
>>>
>>> On Fri, Mar 07, 2025 at 10:25:18AM +0100, Josef Luštický wrote:
Ok, I'll implement the change and post it for a review.
On Fri, 14 Mar 2025 14:38:57 -0300
Ariel D'Alessandro wrote:
> MediaTek MT8188 SoC has an ARM Mali-G57 MC3 GPU (Valhall-JM), which
> constantly faults with the current panfrost support.
>
> For instance, running `glmark2-es2-drm` benchmark test:
> ```
> [ 79.617461] panfrost 1300.gpu: js f
On Fri, 14 Mar 2025 14:38:58 -0300
Ariel D'Alessandro wrote:
> MediaTek MT8192 SoC has an ARM Mali-G57 MC5 GPU (Valhall-JM). Now that
> Panfrost supports AARCH64_4K page table format, let's enable it on this
> SoC.
>
> Running glmark2-es2-drm [0] benchmark, reported the same performance
> score
On Fri, 14 Mar 2025 14:38:56 -0300
Ariel D'Alessandro wrote:
> Currently, Panfrost only supports MMU configuration in "LEGACY" (as
> Bifrost calls it) mode, a (modified) version of LPAE "Large Physical
> Address Extension", which in Linux we've called "mali_lpae".
>
> This commit adds support fo
On Sat, Mar 15, 2025 at 10:09:26AM +, Benno Lossin wrote:
> On Sat Mar 15, 2025 at 3:42 AM CET, Andrew Ballance wrote:
> > implements the equivalent to the std's Vec::truncate
> > on the kernel's Vec type.
> >
> > Signed-off-by: Andrew Ballance
> > ---
> > rust/kernel/alloc/kvec.rs | 36 +
From: FengWei
Use max3() macro instead of nesting max() to simplify the return
statement.
Signed-off-by: FengWei
---
drivers/dma-buf/dma-heap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c
index 3cbe87d4a464..96cb9a
implemnts the equivalent of the rust std's Vec::resize
on the kernel's Vec type.
Signed-off-by: Andrew Ballance
---
rust/kernel/alloc/kvec.rs | 25 +
1 file changed, 25 insertions(+)
diff --git a/rust/kernel/alloc/kvec.rs b/rust/kernel/alloc/kvec.rs
index 75e9feebb81f..c
implements the equivalent to the std's Vec::truncate
on the kernel's Vec type.
Signed-off-by: Andrew Ballance
---
rust/kernel/alloc/kvec.rs | 36
1 file changed, 36 insertions(+)
diff --git a/rust/kernel/alloc/kvec.rs b/rust/kernel/alloc/kvec.rs
index ae9d07
From: FengWei
Use max3() macro instead of nesting max() to simplify the return
statement.
Signed-off-by: FengWei
---
drivers/dma-buf/dma-heap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dma-buf/dma-heap.c b/drivers/dma-buf/dma-heap.c
index 3cbe87d4a464..96cb9a
From: FengWei
Use max3() macro instead of nesting max() to simplify the return
statement.
Signed-off-by: FengWei
---
drivers/gpu/drm/drm_ioctl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index f593dc569d31..115
HI Maxime.
Thanks so much for pointing that out!
How about such a patch?
diff --git a/drivers/gpu/drm/sun4i/sun4i_backend.c
b/drivers/gpu/drm/sun4i/sun4i_backend.c
index 2dded3b828df..5ad0e90d3e6b 100644
--- a/drivers/gpu/drm/sun4i/sun4i_backend.c
+++ b/drivers/gpu/drm/sun4i/sun4i_backend.c
@@ -
In file included from :
./drivers/gpu/drm/i915/display/intel_fbdev.h: In function
‘intel_fbdev_framebuffer’:
./drivers/gpu/drm/i915/display/intel_fbdev.h:32:16: error: ‘NULL’ undeclared
(first use in this function)
32 | return NULL;
|^~~~
./drivers/gpu/drm/i915/di
On Thu, 13 Mar, 2025 18:05:36 +0100 "Benjamin Tissoires"
wrote:
> On Mar 13 2025, Rahul Rameshbabu wrote:
>> This is a very basic "hello, world!" implementation to illustrate that the
>> probe and remove callbacks are working as expected. I chose an arbitrary
>> device I had on hand for populatin
Changes the samsung-s6d7aa0 panel to use multi style functions for
improved error handling.
Signed-off-by: Tejas Vipin
---
drivers/gpu/drm/panel/panel-samsung-s6d7aa0.c | 223 ++
1 file changed, 68 insertions(+), 155 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-
On Thu, 13 Mar, 2025 20:25:23 +0100 "Danilo Krummrich" wrote:
> On Thu, Mar 13, 2025 at 04:03:35PM +, Rahul Rameshbabu wrote:
>> These abstractions enable the development of HID drivers in Rust by binding
>> with the HID core C API. They provide Rust types that map to the
>> equivalents in C.
On Fri, 14 Mar, 2025 15:41:02 +0100 "Miguel Ojeda"
wrote:
> On Thu, Mar 13, 2025 at 5:58 PM Benjamin Tissoires wrote:
>>
>> skeletons are good for documentation, but not really for code review as
>> they can not compile.
>>
>> You should make this patch part of a documentation in
>> Documentatio
On Thu, 13 Mar, 2025 17:54:57 +0100 "Benjamin Tissoires"
wrote:
> On Mar 13 2025, Rahul Rameshbabu wrote:
>> These abstractions enable the development of HID drivers in Rust by binding
>> with the HID core C API. They provide Rust types that map to the
>> equivalents in C. In this initial draft,
https://bugzilla.kernel.org/show_bug.cgi?id=219888
Bug ID: 219888
Summary: amdgpu: Oops connecting HDMI/DVI/DP on HD 7850
(Pitcairn)
Product: Drivers
Version: 2.5
Kernel Version: 6.13.0
Hardware: All
OS:
From: Rob Herring
Sent: Friday, March 14, 2025 10:06 PM
>On Wed, Feb 26, 2025 at 03:19:14PM +0100, Maud Spierings wrote:
>> Add the bindings that describe a GOcontroll Moduline module slot. This
>> slot provides all the interfaces to interface with a Moduline compatible
>> IO module. The actual m
From: Rob Herring
Sent: Friday, March 14, 2025 10:06 PM
>On Wed, Feb 26, 2025 at 03:19:14PM +0100, Maud Spierings wrote:
>> Add the bindings that describe a GOcontroll Moduline module slot. This
>> slot provides all the interfaces to interface with a Moduline compatible
>> IO module. The actual
A lot of DisplayPort bridges use HDMI Codec in order to provide audio
support. Present DRM HDMI Audio support has been written with the HDMI
and in particular DRM HDMI Connector framework support, however those
audio helpers can be easily reused for DisplayPort drivers too.
Patches by Hermes Wu th
On Fri, 28 Feb 2025, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> Replace the 'unsigned int i' footguns with plain old signed
> int. Avoids accidents if/when someone decides they need
> to iterate backwards.
>
> Signed-off-by: Ville Syrjälä
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/
Refactor parity calculations to use the standard parity64() helper.
This change eliminates redundant implementations and improves code
efficiency.
Co-developed-by: Yu-Chun Lin
Signed-off-by: Yu-Chun Lin
Signed-off-by: Kuan-Wei Chiu
---
Changes in v3:
- Change parity ^= parity64(v) to parity !=
On 10/03/2025 19:59, Ariel D'Alessandro wrote:
> Set this feature flag on all Mali Bifrost platforms as the MMU supports
> AARCH64 4K page table format.
>
> Signed-off-by: Ariel D'Alessandro
Reviewed-by: Steven Price
> ---
> drivers/gpu/drm/panfrost/panfrost_features.h | 3 +++
> 1 file chang
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