On Tue, Mar 11, 2025 at 06:20:53PM +0100, José Expósito wrote:
> Hi everyone,
>
> > On Tue, Feb 25, 2025 at 02:51:40PM +0100, Louis Chauvet wrote:
> > >
> > >
> > > Le 25/02/2025 à 12:41, Thomas Zimmermann a écrit :
> > > > Hi
> > > >
> > > > Am 10.02.25 um 15:37 schrieb Louis Chauvet:
> > > >
In gfx_v12_0_cp_gfx_load_me_microcode_rs64(), gfx_v12_0_pfp_fini() is
incorrectly used to free 'me' field of 'gfx', since gfx_v12_0_pfp_fini()
can only release 'pfp' field of 'gfx'. The release function of 'me' field
should be gfx_v12_0_me_fini().
Fixes: 52cb80c12e8a ("drm/amdgpu: Add gfx v12_0 ip
Hi Daniel,
On 10/03/25 13:53, Daniel Stone wrote:
Hi Vignesh,
On Mon, 17 Feb 2025 at 05:37, Vignesh Raman wrote:
This patch series enables lockdep detection in drm-ci. Any lockdep
failures will be shown as warnings in the pipeline. This series
also enables CONFIG_DEBUG_WW_MUTEX_SLOWPATH for m
Add a basic test for exercising modifying the entities scheduler list at
runtime.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Danilo Krummrich
Cc: Matthew Brost
Cc: Philipp Stanner
---
drivers/gpu/drm/scheduler/tests/tests_basic.c | 69 ++-
1 file changed, 68 insert
Am 10.03.25 um 10:30 schrieb Tvrtko Ursulin:
>
> On 10/03/2025 08:41, Philipp Stanner wrote:
>> On Mon, 2025-03-10 at 08:44 +0100, Christian König wrote:
>>> This reverts commit 44d2f310f008613c1dbe5e234c2cf2be90cbbfab.
>>>
>>> Sorry for the delayed response, I only stumbled over this now while
>>>
Add additional information to each VM so they can report up to the last
50 seen pagefaults. Only failed pagefaults are saved this way, as
successful pagefaults should recover and not need to be reported to
userspace.
Additionally, add a new ioctl - xe_vm_get_faults_ioctl - that allows the
user to
On Sun, Mar 09, 2025 at 07:36:09PM +, li...@treblig.org wrote:
> Signed-off-by: Dr. David Alan Gilbert
> ---
> drivers/mfd/pcf50633-core.c| 35 +--
> drivers/regulator/Kconfig | 7 --
> drivers/regulator/Makefile | 1 -
> drivers/regulator/pcf506
On Tue, Mar 11, 2025 at 05:26:37PM +0530, Vignesh Raman wrote:
> Hi Krzysztof,
>
> On 11/03/25 12:54, Krzysztof Kozlowski wrote:
> > On 11/03/2025 07:16, Vignesh Raman wrote:
> > > The mediatek display driver fails to probe on mt8173 and mt8183 in
> > > v6.14-rc4, with the following errors:
> >
>
On Tue, Mar 11, 2025 at 12:57:33PM +0200, Cristian Ciocaltea wrote:
> Evaluating the requirement to use a limited RGB quantization range
> involves a verification of the output format, among others, but this is
> currently performed before actually computing the format, hence relying
> on the old c
On Tue, Mar 11, 2025 at 04:55:17PM +0100, Maxime Ripard wrote:
> Hi,
>
> I think the first thing we need to address is that we will need to
> differentiate between HDMI 1.4 devices and HDMI 2.0.
>
> It applies to YUV420, which is HDMI 2.0-only, and I guess your patches
> are good enough if you co
On Sun, Mar 09, 2025 at 09:33:55AM +0530, Tejas Vipin wrote:
> Changes the novatek-nt36523 panel to use multi style functions for
> improved error handling.
>
> Signed-off-by: Tejas Vipin
> ---
> Changes in v3:
> - Remove mipi_dsi_dual_msleep
> - Change mipi_dsi_dual_dcs_write_seq_multi t
On Tue, Mar 11, 2025 at 05:40:06PM +0100, Antonin Godard wrote:
> Add support for the POWERTIP PH128800T004-ZZA01 10.1" (1280x800)
> LCD-TFT panel. Its panel description is very much like the POWERTIP
> PH128800T006-ZHC01 configured below this one, only its timings are
> different.
>
> Signed-off-
On 3/11/25 6:12 PM, Maxime Ripard wrote:
> On Tue, Mar 11, 2025 at 12:57:37PM +0200, Cristian Ciocaltea wrote:
>> Introduce a few macros to facilitate setting custom (i.e. non-default)
>> EDID data during connector initialization.
>>
>> This helps reducing boilerplate code while also drops some red
On 3/11/25 6:17 PM, Maxime Ripard wrote:
> On Tue, Mar 11, 2025 at 12:57:38PM +0200, Cristian Ciocaltea wrote:
>> Provide tests to verify that drm_atomic_helper_connector_hdmi_check()
>> helper behaviour when using YUV420 output format is to always set the
>> limited RGB quantization range to 'limi
* Mark Brown (broo...@kernel.org) wrote:
> On Sun, 09 Mar 2025 19:36:03 +, li...@treblig.org wrote:
> > The pcf50633 was used as part of the OpenMoko devices but
> > the support for its main chip was recently removed in:
> > commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support")
> >
> >
Panfrost does not support uncached mappings, so flag them properly. Also
flag the pages that are mapped as response to a page fault as cached.
Signed-off-by: Boris Brezillon
Signed-off-by: Ariel D'Alessandro
---
drivers/gpu/drm/panfrost/panfrost_mmu.c | 4 ++--
1 file changed, 2 insertions(+),
From: Brost, Matthew
Sent: Monday, March 10, 2025 9:50 PM
To: Cavitt, Jonathan
Cc: intel...@lists.freedesktop.org; Gupta, saurabhg; Zuo, Alex;
joonas.lahti...@linux.intel.com; Zhang, Jianxun; Lin, Shuicheng;
dri-devel@lists.freedesktop.org
Subject: Re:
The mediatek display driver fails to probe on mt8173-elm-hana and
mt8183-kukui-jacuzzi-juniper-sku16 in v6.14-rc4 due to missing PHY
configurations.
Enable the following PHY drivers for MediaTek platforms:
- CONFIG_PHY_MTK_HDMI=m for HDMI display
- CONFIG_PHY_MTK_MIPI_DSI=m for DSI display
- CONFI
> -Original Message-
> From: Murthy, Arun R
> Sent: Wednesday, February 19, 2025 2:47 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Borah, Chaitanya Kumar ; Murthy,
> Arun R ; Kumar, Naveen1
>
> Subject: [PATCH v6 2/
> -Original Message-
> From: dri-devel On Behalf Of
> Arun R Murthy
> Sent: Tuesday, February 25, 2025 1:04 PM
> To: dri-devel@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org; ville.syrj...@linux.intel.com
> Cc: Murthy, Arun R ; Kumar, Naveen1
> -Original Message-
> From: Borah, Chaitanya Kumar
> Sent: Wednesday, March 12, 2025 11:19 AM
> To: Murthy, Arun R ; dri-
> de...@lists.freedesktop.org; intel-...@lists.freedesktop.org; intel-
> x...@lists.freedesktop.org
> Cc: Kumar, Naveen1
> Subject: RE: [PATCH v6 2/3] drm/plane: mod
The DE33 is a newer version of the Allwinner Display Engine IP block,
found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already
supported by the mainline driver.
The DE33 in the H616 has mixer0 and writeback units. The clocks
and resets required are identical to the H3 and H5 respective
Hi
Am 10.03.25 um 14:56 schrieb Christian König:
Am 10.03.25 um 10:50 schrieb Thomas Zimmermann:
Hi
Am 07.03.25 um 14:32 schrieb Simona Vetter:
On Fri, Mar 07, 2025 at 09:03:58AM +0100, Thomas Zimmermann wrote:
Importing dma-bufs via PRIME requires a DMA-capable hardware device.
This is not
On Fri, Mar 07, 2025 at 05:14:28PM -0800, Lucas De Marchi wrote:
Due to wrong `.. kernel-doc` directive in Documentation/gpu/rfc/gpusvm.rst
the documentation was actually not parsing anything from
drivers/gpu/drm/drm_gpusvm.c. This fixes the kernel-doc include and all
warnings/errors created when
Hi Doug,
On 2025/2/25 9:42, Doug Anderson wrote:
Hi,
On Mon, Feb 24, 2025 at 12:14 AM Damon Ding wrote:
@@ -392,11 +393,27 @@ static const struct component_ops
rockchip_dp_component_ops = {
.unbind = rockchip_dp_unbind,
};
+static int rockchip_dp_link_panel(struct drm_dp_aux *au
Thanks for the patch, but someone already fixed this. Thanks!
Alex
On Mon, Mar 10, 2025 at 6:47 AM Dan Carpenter wrote:
>
> This line has a seven space indent instead of a tab.
>
> Signed-off-by: Dan Carpenter
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_sdma.c | 2 +-
> 1 file changed, 1 insert
On Mon, 10 Mar 2025 13:10:26 +, Matt Coster wrote:
> Unlike AXE-1-16M, BXS-4-64 uses two power domains.
>
> Like the existing AXE-1-16M integration, BXS-4-64 uses the single clock
> integration in the TI k3-j721s2.
>
> Signed-off-by: Matt Coster
> ---
> Changes in v3:
> - Include adding th
The V3D driver currently determines the GPU tech version (33, 41...)
by reading a register. This approach has worked so far since this
information wasn’t needed before powering on the GPU.
V3D 7.1 introduces new registers that must be written to power on the
GPU, requiring us to know the V3D versi
As established in commit 89d04995f76c ("MAINTAINERS: Drop Emma Anholt
from all M lines."), Emma is no longer active in the Linux kernel and
dropped the V3D maintainership. Therefore, remove Emma as one of the DT
maintainers and add the current V3D driver maintainer.
Acked-by: Emma Anholt
Acked-by
V3D 7.1 exposes a new register block, called V3D_SMS. As BCM2712 has a
V3D 7.1 core, add a new register item to its compatible. Similar to the
GCA, which is specific for V3D 3.3, SMS is optional and should only be
added for V3D 7.1 variants (such as brcm,2712-v3d).
Signed-off-by: Maíra Canal
---
In addition to the standard reset controller, V3D 7.x requires configuring
the V3D_SMS registers for proper power on/off and reset. Add the new
registers to `v3d_regs.h` and ensure they are properly configured during
device probing, removal, and reset.
This change fixes GPU reset issues on the Ras
Similar to commit e4b5ccd392b9 ("drm/v3d: Ensure job pointer is set to
NULL after job completion"), ensure the job pointer is set to `NULL` when
a job's fence has an error. Failing to do so can trigger kernel warnings
in specific scenarios, such as:
1. v3d_csd_job_run() assigns `v3d->csd_job = job
The V3D driver still relies on `drm_sched_increase_karma()` and
`drm_sched_resubmit_jobs()` for resubmissions when a timeout occurs.
The function `drm_sched_increase_karma()` marks the job as guilty, while
`drm_sched_resubmit_jobs()` sets an error (-ECANCELED) in the DMA fence of
that guilty job.
In order to enforce per-SoC register rules, add per-compatible
restrictions. V3D 3.3 (represented by brcm,7268-v3d) has a cache
controller (GCA), which is not present in other V3D generations.
Declaring these differences helps ensure the DTB accurately reflect
the hardware design.
While not ideal,
On Mon, Mar 10, 2025 at 03:51:53PM +0100, Maxime Ripard wrote:
> On Sun, Mar 09, 2025 at 10:13:58AM +0200, Dmitry Baryshkov wrote:
> > From: Dmitry Baryshkov
> >
> > Use drm_hdmi_acr_get_n_cts() helper instead of calculating N and CTS
> > values in the VC4 driver.
> >
> > Signed-off-by: Dmitry B
301 - 336 of 336 matches
Mail list logo
