From: Sohaib Nadeem
[ Upstream commit 0484e05d048b66d01d1f3c1d2306010bb57d8738 ]
[why]:
issues fixed:
- comparison with wider integer type in loop condition which can cause
infinite loops
- pointer dereference before null check
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
On Wed, 29 Jan 2025 12:55:04 +0100, Krzysztof Kozlowski wrote:
> Since SM8250 all downstream sources program clock inverters in
> PLL_CLOCK_INVERTERS_1 register and leave the PLL_CLOCK_INVERTERS as
> reset value (0x0). The most recent Hardware Programming Guide for 3 nm,
> 4 nm, 5 nm and 7 nm PH
On Tue, 14 Jan 2025 16:55:24 +0800, Fange Zhang wrote:
> On the SM6150 platform there is WB_2 block. Add it to the SM6150 catalog.
>
>
Applied, thanks!
[1/1] drm/msm/dpu: Add writeback support for SM6150
https://gitlab.freedesktop.org/lumag/msm/-/commit/23c0a9d36f78
Best regards,
--
D
On Wed, Feb 26, 2025 at 11:50:08AM +, Xin Ji wrote:
> > > > > > > > > From: Dmitry Baryshkov
> > > > > > > > > Sent: Thursday, February 13, 2025 9:04 PM
> > > > > > > > > To: Xin Ji
> > > > > > > > > Cc: Andrzej Hajda ; Neil
> > > > > > > > > Armstrong ; Robert Foss
> > > > > > > > > ; Lauren
On Thu, Feb 27, 2025 at 10:06:24AM +0530, Vignesh Raman wrote:
> If we are not caching the git archive, do not
> set CI_PRE_CLONE_SCRIPT. Setting it makes CI
> try to download the cache first, and if it is
> missing, it tries to clone the repo within a
> time limit, which can cause build failures.
Drop unused headers and type declaration from io.h.
Signed-off-by: Raag Jadav
Acked-by: Andy Shevchenko
---
include/linux/io.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/linux/io.h b/include/linux/io.h
index 40cb2de73f5e..6a6bc4d46d0a 100644
--- a/include/linux/io.h
+++ b/inc
This series attempts to cleanup io.h with "include what you use" approach.
This depends on changes available on immutable tag[1].
Although this series is too trivial in the grand scheme of things, it is
still a tiny step towards untangling core headers. I have success results
from LKP for this ser
Include headers for the symbols directly used in this file instead of
relying on intermediate headers.
Signed-off-by: Raag Jadav
Acked-by: Simona Vetter
---
drivers/gpu/drm/drm_draw.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/drm_draw.c b/drivers/gpu/drm/drm_draw.c
i
Thanks Maíra, all patches but 4 are:
Reviewed-by: Iago Toral Quiroga
I hope someone else can can look at the remaining DT patch.
Iago
El mié, 26-02-2025 a las 16:58 -0300, Maíra Canal escribió:
> This series addresses GPU reset issues reported in [1], where running
> a
> long compute job would
Merge request pipelines were only created when changes
were made to drivers/gpu/drm/ci/, causing MRs that
didn't touch this path to break. Fix MR pipeline rules
to trigger jobs for all changes.
Run jobs automatically for marge-bot and scheduled
pipelines, but in all other cases run manually. Also
On Wed, 19 Feb 2025 12:07:12 +0800, Haoxiang Li wrote:
> Add check for the return value of devm_kstrdup() in
> dsi_host_parse_dt() to catch potential exception.
>
>
Applied, thanks!
[1/1] drm/msm/dsi: Add check for devm_kstrdup()
https://gitlab.freedesktop.org/lumag/msm/-/commit/52b3f0e
On Wed, 22 Jan 2025 17:23:44 +0100, Marijn Suijten wrote:
> Some SoCs such as SC7280 (used in the Fairphone 5) have only a single
> DSC "hard slice" encoder. The current hardcoded use of 2:2:1 topology
> (2 LM and 2 DSC for a single interface) make it impossible to use
> Display Stream Compressi
On Wed, 19 Feb 2025 11:49:16 -0800, Jessica Zhang wrote:
> To debug display mmu faults, this series introduces a display fault
> handler similar to the gpu one.
>
> This series has been tested on sc7280 chromebook by using triggering
> a smmu fault by forcing an incorrect stride on the planes.
>
On Mon, 17 Feb 2025 12:17:40 +0100, Marijn Suijten wrote:
> This series covers a step-up towards supporting the DUALPIPE DSC
> topology, also known as 2:2:2 topology (on active-CTL hardware). It
> involves 2 layer mixers, 2 DSC compression encoders, and 2 interfaces
> (on DSI, this is called bon
On Thu, 13 Feb 2025 17:27:55 +0100, Neil Armstrong wrote:
> The mdp1-mem is not supported on the SM8550 & SM8650 SoCs, so properly
> document
> the mdp0-mem and cpu-cfg interconnect entries.
>
> This fixes the following errors:
> display-subsystem@ae0: interconnects: [[200, 3, 7, 32, 1, 7]]
Hi Jonathan,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-xe/drm-xe-next]
[also build test ERROR on next-20250226]
[cannot apply to linus/master v6.14-rc4]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
On 26. 02. 25, 19:33, Yury Norov wrote:
Not in cases where macros are inevitable. I mean, do we need parityXX() for
XX in (8, 16, 32, 64) at all? Isn't the parity() above enough for everybody?
The existing codebase has something like:
int ret;
ret = i3c_master_get_free_addr(
On Wed, Feb 26, 2025 at 12:04:56PM +0100, Stefan Wahren wrote:
> Hi Dmitry,
>
> Am 24.02.25 um 04:15 schrieb Dmitry Baryshkov:
> > On Sat, Feb 22, 2025 at 11:29:21AM +0100, Stefan Wahren wrote:
> > > From: David Turner
> > >
> > > Add ALSA jack detection to the vc4-hdmi audio driver so userspace
On 26/02/2025 12:45, AngeloGioacchino Del Regno wrote:
Il 26/02/25 12:35, Alexandre Mergnat ha scritto:
On 18/02/2025 09:52, AngeloGioacchino Del Regno wrote:
Il 17/02/25 16:03, Alexandre Mergnat ha scritto:
Hi CK.
On 17/02/2025 08:56, CK Hu (胡俊光) wrote:
On Fri, 2025-01-10 at 14:31 +010
On Fri, 21 Feb 2025 16:13:11 +0100, Krzysztof Kozlowski wrote:
> The Qualcomm SA8775p MDSS display block comes with eDP phy, already used
> in DTS and already documented in phy/qcom,edp-phy.yaml binding. Add the
> missing device node in the binding and extend example to silence
> dtbs_check warn
From: Brendan King
Avoid a warning from drm_gem_gpuva_assert_lock_held in drm_gpuva_unlink.
The Imagination driver uses the GEM object reservation lock to protect
the gpuva list, but the GEM object was not always known in the code
paths that ended up calling drm_gpuva_unlink. When the GEM object
From: Brendan King
Ensure job done fences are only initialised once.
This fixes a memory manager not clean warning from drm_mm_takedown
on module unload.
Cc: sta...@vger.kernel.org
Fixes: eaf01ee5ba28 ("drm/imagination: Implement job submission and scheduling")
Signed-off-by: Brendan King
---
From: Aradhya Bhatia
Fix the OF node pointer passed to the of_drm_find_bridge() call to find
the next bridge in the display chain.
The code to find the next panel (and create its panel-bridge) works
fine, but to find the next (non-panel) bridge does not.
To find the next bridge in the pipeline,
From: Aradhya Bhatia
The driver code doesn't have a Phy de-initialization path as yet, and so
it does not clear the phy_initialized flag while suspending. This is a
problem because after resume the driver looks at this flag to determine
if a Phy re-initialization is required or not. It is in fact
" [For DSI TX controller]
in TDA4VM Technical Reference Manual https://www.ti.com/lit/zip/spruil1
[1]: https://github.com/aradhya07/linux-ab/tree/next_dsi-v10_1-tests
Change Log:
- Changes in v10:
- Rebase on latest linux-next (next-20250226).
- As part of rebase, update the p
From: Aradhya Bhatia
Check for the return value of the phy_mipi_dphy_get_default_config()
call, and in case of an error, return back the same.
Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework")
Cc: sta...@vger.kernel.org
Reviewed-by: Tomi Valkeinen
Reviewed-by: Dmitry Baryshkov
From: Aradhya Bhatia
Once the DSI Link and DSI Phy are initialized, the code needs to wait
for Clk and Data Lanes to be ready, before continuing configuration.
This is in accordance with the DSI Start-up procedure, found in the
Technical Reference Manual of Texas Instrument's J721E SoC[0] which
h
From: Aradhya Bhatia
Add a helper API that can be used by the DSI hosts to find the required
input bus format for the given output dsi pixel format.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Tomi Valkeinen
Tested-by: Tomi Valkeinen
Signed-off-by: Aradhya Bhatia
Signed-off-by: Aradhya Bhatia
From: Aradhya Bhatia
The crtc_* mode parameters do not get generated (duplicated in this
case) from the regular parameters before the mode validation phase
begins.
The rest of the code conditionally uses the crtc_* parameters only
during the bridge enable phase, but sticks to the regular paramet
From: Aradhya Bhatia
Instead of manually finding the next bridge/panel, and maintaining the
panel-bridge (in-case the next entity is a panel), switch to using the
automatically managing devm_drm_of_get_bridge() API.
Drop the drm_panel support completely from the driver while at it.
Reviewed-by:
From: Aradhya Bhatia
Change the existing (and deprecated) bridge hooks, to the bridge
atomic APIs.
Add drm helpers for duplicate_state, destroy_state, and bridge_reset
bridge hooks.
Further add support for the input format negotiation hook.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Tomi Valk
The encoder-bridge ops occur by looping over the new connector states of
the display pipelines. The enable sequence runs as follows -
- pre_enable(bridge),
- enable(encoder),
- enable(bridge),
while the disable sequnce runs as follows -
- disable(bridge),
From: Aradhya Bhatia
The way any singular display pipeline, in need of a modeset, gets
enabled is as follows -
crtc enable
(all) bridge pre-enable
encoder enable
(all) bridge enable
- and the disable sequence is exactly the reverse of this.
The crtc operations o
Move the bridge pre_enable call before crtc enable, and the bridge
post_disable call after the crtc disable.
The sequence of enable after this patch will look like:
bridge[n]_pre_enable
...
bridge[1]_pre_enable
crtc_enable
encoder_enable
bridge[1]
From: Aradhya Bhatia
At present, the DSI mode configuration check happens during the
_atomic_enable() phase, which is not really the best place for this.
Moreover, if the mode is not valid, the driver gives a warning and
continues the hardware configuration.
Move the DSI mode configuration check
From: Brendan King
Do scheduler queue fence release processing on a workqueue, rather
than in the release function itself.
Fixes deadlock issues such as the following:
[ 607.400437]
[ 607.405755] WARNING: possible recursive locking detected
[ 607.
From: Aradhya Bhatia
The cdns-dsi controller requires that it be turned on completely before
the input DPI's source has begun streaming[0]. Not having that, allows
for a small window before cdns-dsi enable and after cdns-dsi disable
where the previous entity (in this case tidss's videoport) to co
From: Kerem Karabay
Add XRGB emulation helper for devices that only support BGR888.
Signed-off-by: Kerem Karabay
Signed-off-by: Aditya Garg
Reviewed-by: Thomas Zimmermann
---
v2 -> Fix incorrect description
v3 -> No change in this patch
v4 -> No change in this patch
v5 -> No change in thi
Hi all!
This patch series aims to improve the Touch Bar support for x86 Macs.
Recently, the hid-appletb-kbd and hid-appletb-bl drivers were upstreamed
into the Linux kernel [1]. They enabled the Touch Bar to display a
predefined set of media and function keys, exactly the same it does on
Windows
On Mon, 2025-02-24 at 20:42 -0800, Matthew Brost wrote:
> Add (re)bind to SVM page fault handler. To facilitate add support
> function to VM layer which (re)binds a SVM range. Also teach PT layer
> to
> understand (re)binds of SVM ranges.
>
> v2:
> - Don't assert BO lock held for range binds
> -
On Tue, 25 Feb 2025 14:51:13 +0100, Alexander Stein wrote:
> Polarity for DE is stored in bridge state. Use this flag for setting
> the DE polarity in the bridge.
>
>
Applied, thanks!
[1/1] drm/bridge: ti-sn65dsi83: Support negative DE polarity
(no commit info)
Rob
Do not use struct drm_gem_object.import_attach unnecessarily. The
field is set by the PRIME import helpers. GEM and other helpers use
it for testing for imported dma-bufs and retrieving the respective
dma-buf instance.
Replace all tests for import_attach with the new GEM helper function
drm_gem_is
The `firmware` field of the `module!` only accepts literal strings,
which is due to the fact that it is implemented as a proc macro.
Some drivers require a lot of firmware files (such as nova-core) and
hence benefit from more flexibility composing firmware path strings.
The `firmware::ModInfoBuil
This is the initial series for the nova-core stub driver.
nova-core is intended to serve as a common base for nova-drm (the
corresponding DRM driver) and the vGPU manager VFIO driver, serving as a
hard- and firmware abstraction layer for GSP-based NVIDIA GPUs.
The Nova project, including nova-cor
The `LocalModule` type is the type of the module created by `module!`,
`module_pci_driver!`, `module_platform_driver!`, etc.
Since the exact type of the module is sometimes generated on the fly by
the listed macros, provide an alias.
This is first used by the `module_firmware!` macro introduced i
`BStr` already dereference to `&[u8]` through the `Deref` trait,
however, this can't be called from const context.
Hence, provide a separate const function for this.
This is used in subsequent nova-core patches.
Signed-off-by: Danilo Krummrich
---
rust/kernel/str.rs | 6 ++
1 file changed,
Add the initial documentation of the Nova project.
The initial project documentation consists out of a brief introduction
of the project, as well as project guidelines both general and nova-core
specific and a task list for nova-core specifically.
The task list is divided into tasks for general R
Analogous to the `module!` macro `module_firmware!` adds additional
firmware path strings to the .modinfo section.
In contrast to `module!`, where path strings need to be string literals,
path strings can be composed with the `firmware::ModInfoBuilder`.
Some drivers require a lot of firmware file
On Wed, Feb 26, 2025 at 10:28:56AM -0600, Lucas De Marchi wrote:
On Wed, Feb 26, 2025 at 04:05:24PM +, Colin Ian King wrote:
In the case where a set of checks on xe->info.platform don't assign
a value to pointer def the pointer remains uninitialized and hence
can fail the following !def chec
On 2/26/2025 4:31 AM, Jun Nie wrote:
Currently, SSPPs are assigned to a maximum of two pipes. However,
quad-pipe usage scenarios require four pipes and involve configuring
two stages. In quad-pipe case, the first two pipes share a set of
mixer configurations and enable multi-rect mode when cer
On 2/26/25 04:10, Vitaliy Shevtsov wrote:
There is a type mismatch between what CalculateDynamicMetadataParameters()
takes and what is passed to it. Currently this function accepts several
args as signed long but it's called with unsigned integers. On some systems
where long is 32 bits and one
Reviewed-by: Alex Hung
On 2/26/25 01:37, Ma Ke wrote:
Null pointer dereference issue could occur when pipe_ctx->plane_state
is null. The fix adds a check to ensure 'pipe_ctx->plane_state' is not
null before accessing. This prevents a null pointer dereference.
Found by code review.
Cc: sta...@
On 2/26/2025 3:55 AM, Dmitry Baryshkov wrote:
On Thu, Jan 23, 2025 at 02:43:36PM +0200, Dmitry Baryshkov wrote:
The MSM driver uses drm_atomic_helper_check() which mandates that none
of the atomic_check() callbacks toggles crtc_state->mode_changed.
Perform corresponding check before calling t
Thanks for the poke! This patch looks fine to me:
Reviewed-by: Lyude Paul
I'll push it to drm-misc in a moment
On Wed, 2025-02-26 at 10:02 +0100, Thomas Zimmermann wrote:
> Ping. Are there any comments on this patch?
>
> Am 14.01.25 um 10:57 schrieb Thomas Zimmermann:
> > Keep user-forced conn
Applied. Thanks!
Alex
On Wed, Feb 26, 2025 at 2:04 PM Alex Hung wrote:
>
> Reviewed-by: Alex Hung
>
> On 2/26/25 01:37, Ma Ke wrote:
> > Null pointer dereference issue could occur when pipe_ctx->plane_state
> > is null. The fix adds a check to ensure 'pipe_ctx->plane_state' is not
> > null bef
Applied. Thanks!
On Wed, Feb 26, 2025 at 8:11 AM André Almeida wrote:
>
> Prior to the addition of ring reset, the debug option
> `debug_disable_soft_recovery` could be used to force a full device
> reset. Now that we have ring reset, create a debug option to disable
> them in amdgpu, forcing th
In addition to the standard reset controller, V3D 7.x requires configuring
the V3D_SMS registers for proper power on/off and reset. Add the new
registers to `v3d_regs.h` and ensure they are properly configured during
device probing, removal, and reset.
This change fixes GPU reset issues on the Ras
V3D 7.1 exposes a new register block, called V3D_SMS. As BCM2712 has a
V3D 7.1 core, add a new register item to the list. Similar to the GCA
and bridge register, SMS is optional and should only be added for V3D
7.1 variants.
Cc: Krzysztof Kozlowski
Cc: Conor Dooley
Cc: Nicolas Saenz Julienne
Cc
The V3D driver still relies on `drm_sched_increase_karma()` and
`drm_sched_resubmit_jobs()` for resubmissions when a timeout occurs.
The function `drm_sched_increase_karma()` marks the job as guilty, while
`drm_sched_resubmit_jobs()` sets an error (-ECANCELED) in the DMA fence of
that guilty job.
Similar to commit e4b5ccd392b9 ("drm/v3d: Ensure job pointer is set to
NULL after job completion"), ensure the job pointer is set to `NULL` when
a job's fence has an error. Failing to do so can trigger kernel warnings
in specific scenarios, such as:
1. v3d_csd_job_run() assigns `v3d->csd_job = job
The V3D driver currently determines the GPU tech version (33, 41...)
by reading a register. This approach has worked so far since this
information wasn’t needed before powering on the GPU.
V3D 7.1 introduces new registers that must be written to power on the
GPU, requiring us to know the V3D versi
As established in commit 89d04995f76c ("MAINTAINERS: Drop Emma Anholt
from all M lines."), Emma is no longer active in the Linux kernel and
dropped the V3D maintainership. Therefore, remove Emma as one of the DT
maintainers and add the current V3D driver maintainer.
Cc: Krzysztof Kozlowski
Cc: Co
On Wed, 26 Feb 2025 at 20:36, Jessica Zhang wrote:
>
>
>
> On 2/26/2025 3:55 AM, Dmitry Baryshkov wrote:
> > On Thu, Jan 23, 2025 at 02:43:36PM +0200, Dmitry Baryshkov wrote:
> >> The MSM driver uses drm_atomic_helper_check() which mandates that none
> >> of the atomic_check() callbacks toggles cr
From: Maud Spierings
GOcontroll produces embedded linux systems and IO modules to use in
these systems, add its prefix.
Acked-by: Rob Herring (Arm)
Signed-off-by: Maud Spierings
---
Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Do
Add inital support for 2 variants of the Moduline Display controller.
This system is powered by the Ka-Ro Electronics tx8p-ml81 COM, which
features an imx8mp SoC.
Signed-off-by: Maud Spierings
---
Changes in v2:
- Dropped the trivial-devices patch
- Added a patch with bindings for the gocontroll,
From: Maud Spierings
Add GOcontroll as unofficial maintainers of the Ka-Ro tx8p-ml81 COM
module bindings.
This support is not officially done by Ka-Ro electronics, if they at
some point will supporting mainline, this should be changed to them.
Signed-off-by: Maud Spierings
---
MAINTAINERS | 6
From: Maud Spierings
Add the BOE av101hdt-a10 variant of the Moduline Display, this variant
comes with a 10.1 1280x720 display with a touchscreen (not working in
mainline).
Signed-off-by: Maud Spierings
---
Currently the backlight driver is not available, this will be upstreamed
in a future pa
From: Maud Spierings
The main point of the Moduline series of embedded controllers is its
ecosystem of IO modules, these are currently operated through the spidev
interface. Ideally there will be a full dedicated driver in the future.
Add the gocontroll moduline-module-slot device to enable the
From: Maud Spierings
Add the BOE av123z7m-n17 variant of the Moduline Display, this variant
comes with a 12.3" 1920x720 display.
Signed-off-by: Maud Spierings
---
Currently the backlight driver is not available, this will be upstreamed
in a future patch series. It is a Maxim max25014atg.
---
From: Maud Spierings
The Moduline Display platform is a part of the wider GOcontroll Moduline
ecosystem. These are embedded controllers that focus on modularity with
their swappable IO modules.
The base Moduline Display board includes a board-to-board connector with
various busses to enable addi
From: Maud Spierings
Add a maintainer for the GOcontroll Moduline series of controllers.
Signed-off-by: Maud Spierings
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
3d75c66942ca2059e7a054072502b726d1dec04c..47fc659957d94e6dfbe3d8dc4a
From: Maud Spierings
Currently to configure each IOMUXC_SW_PAD_CTL_PAD the raw value of this
register is written in the dts, these values are not obvious. Add defines
which describe the fields of this register which can be or-ed together to
produce readable settings.
Acked-by: Rob Herring (Arm)
From: Maud Spierings
Add the bindings that describe a GOcontroll Moduline module slot. This
slot provides all the interfaces to interface with a Moduline compatible
IO module. The actual module is not reasonable to describe as it can be
swapped at will, with this connector the driver will be able
From: Maud Spierings
Add a maintainer for the GOcontroll Moduline module slot bindings and
future driver.
Signed-off-by: Maud Spierings
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index
b4c76d7ad890be0f618109918ad89328bc72e8cd..3d75c66942
From: Maud Spierings
Document the compatible strings for the Moduline Display controller.
Acked-by: Rob Herring (Arm)
Signed-off-by: Maud Spierings
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.
From: Maud Spierings
The Ka-Ro Electronics tx8p-ml81 is a COM based on the imx8mp SOC. It has
2 GB or ram and 8 GB of eMMC storage on board.
Add it to enable boards based on this Module
Signed-off-by: Maud Spierings
---
.../arm64/boot/dts/freescale/imx8mp-tx8p-ml81.dtsi | 547
Hi Maxime,
On Tue, 11 Feb 2025 14:10:50 +0100
Maxime Ripard wrote:
> On Mon, Feb 10, 2025 at 06:12:52PM +0100, Luca Ceresoli wrote:
> > Hello Maxime,
> >
> > On Fri, 7 Feb 2025 12:47:51 +0100
> > Maxime Ripard wrote:
> >
> > > > diff --git a/include/drm/drm_bridge.h b/include/drm/drm_bridge
On Wed, 26 Feb 2025 at 08:35, Dmitry Baryshkov
wrote:
> The job has a timeout of 10 minutes, which causes a build failures as it
> is even unable to clone the repo within the specified limits. Extend
> the job's timeout to 1 hour.
This is neither expected nor sensible. We should fix this some oth
On Wed, Feb 26, 2025 at 10:38:40AM +, Matthew Auld wrote:
> On 26/02/2025 04:18, Matthew Brost wrote:
> > On Tue, Feb 25, 2025 at 09:13:09PM -0600, Lucas De Marchi wrote:
> > > On Wed, Feb 26, 2025 at 10:00:18AM +0800, Mingcong Bai via B4 Relay wrote:
> > > > From: Mingcong Bai
> > > >
> > >
On Wed, Feb 26, 2025 at 07:55:07AM +, Kasireddy, Vivek wrote:
> > Is there any update or ETA for the v3? Are there any ways we can help?
> I believe Leon's series is very close to getting merged. Once it
> lands, this series can be revived.
The recent drama has made what happens next unclear
Merge request pipelines were only created when changes
were made to drivers/gpu/drm/ci/, causing MRs that didn't
touch this path to break. Fix MR pipeline rules to trigger
jobs for all changes.
Fixes: df54f04f2020 ("drm/ci: update gitlab rules")
Signed-off-by: Vignesh Raman
---
drivers/gpu/drm/c
Hey,
On Tue, 25 Feb 2025 at 22:18, Alyssa Rosenzweig wrote:
> > > These layouts are notably not used for interchange across hardware
> > > blocks (e.g. with the display controller). There are other layouts for
> > > that but we don't support them either in userspace or kernelspace yet
> > > (even
On Wed, 2025-02-26 at 17:05 +0800, Qianyi Liu wrote:
> From: qianyi liu
>
> The last_scheduled fence leaked when an entity was being killed and
> adding its callback failed.
>
> Decrement the reference count of prev when dma_fence_add_callback()
> fails, ensuring proper balance.
>
> Cc: sta...@
On Wed, Feb 26, 2025, at 13:05, Javier Martinez Canillas wrote:
> "Arnd Bergmann" writes:
>> in drivers/video/console, with the simpler alternative just
>> calling into fbcon functions. I'm not sure if we can already drop
>> vgacon from normal x86-64 distro configs, i.e. if there are cases
>> that
ruct backlight_properties));
if (data->levels) {
---
base-commit: 8433c776e1eb1371f5cd40b5fd3a61f9c7b7f3ad
change-id: 20250226-pwm-bl-read-back-period-from-hw-08226cc2f920
Best regards,
--
Abel Vesa
On Mon, 13 Jan 2025 11:11:00 +0100, Maxime Ripard wrote:
> The DRM and KMS frameworks and helpers gain more and more kunit
> coverage, so let's document what our expectations are.
>
>
Applied to misc/kernel.git (drm-misc-next).
Thanks!
Maxime
Prior to the addition of ring reset, the debug option
`debug_disable_soft_recovery` could be used to force a full device
reset. Now that we have ring reset, create a debug option to disable
them in amdgpu, forcing the driver to go with the full device
reset path again when both options are combined
Hi
Am 11.02.25 um 00:32 schrieb Alex Lanzano:
Add myself as the maintainer of the recently orphaned repaper and
mi0283qt drivers.
Merged into drm-misc-next. Thanks for helping.
Best regards
Thomas
Signed-off-by: Alex Lanzano
---
MAINTAINERS | 6 --
1 file changed, 4 insertions(+),
Hi Vignesh,
On Wed, 26 Feb 2025 at 13:55, Vignesh Raman wrote:
> Merge request pipelines were only created when changes
> were made to drivers/gpu/drm/ci/, causing MRs that didn't
> touch this path to break. Fix MR pipeline rules to trigger
> jobs for all changes.
Thanks a lot for fixing this up
210,6 @@ windows-msvc:
yaml-toml-shell-py-test:
rules:
- when: never
+
+python-artifacts:
+ timeout: 1h
Acked-by: Vignesh Raman
Regards,
Vignesh
---
base-commit: 130377304ed09e54ff35a8974372498aad7059f3
change-id: 20250226-ci-python-timeout-7167d2c2985a
Best regards,
Hi Daniel,
On 26/02/25 19:29, Daniel Stone wrote:
Hi Vignesh,
On Wed, 26 Feb 2025 at 13:55, Vignesh Raman wrote:
Merge request pipelines were only created when changes
were made to drivers/gpu/drm/ci/, causing MRs that didn't
touch this path to break. Fix MR pipeline rules to trigger
jobs for
On Tue, 25 Feb 2025 17:20:45 -0500, Anusha Srivatsa wrote:
> Replace platform_get_resource + devm_ioremap_resource
> with just devm_platform_ioremap_resource()
>
> Used Coccinelle to do this change. SmPl patch:
> @rule_1@
> identifier res;
> expression ioremap_res;
> identifier pdev;
> @@
> -struc
On Tue, 25 Feb 2025 17:20:49 -0500, Anusha Srivatsa wrote:
> Replace platform_get_resource + devm_ioremap_resource
> with just devm_platform_ioremap_resource()
>
> Used Coccinelle to do this change. SmPl patch:
> @rule_1@
> identifier res;
> expression ioremap_res;
> identifier pdev;
> @@
> -struc
On Tue, 25 Feb 2025 17:20:52 -0500, Anusha Srivatsa wrote:
> Replace platform_get_resource_byname + devm_ioremap_resource
> with just devm_platform_ioremap_resource()
>
> Used Coccinelle to do this change. SmPl patch:
> //rule s/(devm_)platform_get_resource_byname +
> //(devm_)ioremap/devm_platfor
On Tue, 25 Feb 2025 17:20:51 -0500, Anusha Srivatsa wrote:
> Replace platform_get_resource + devm_ioremap_resource
> with just devm_platform_ioremap_resource()
>
> Used Coccinelle to do this change. SmPl patch:
> @rule_1@
> identifier res;
> expression ioremap_res;
> identifier pdev;
> @@
> -struc
On Tue, 25 Feb 2025 17:20:42 -0500, Anusha Srivatsa wrote:
> Replace platform_get_resource + devm_ioremap_resource
> with just devm_platform_ioremap_resource()
>
> Used Coccinelle to do this change. SmPl patch:
> @rule_1@
> identifier res;
> expression ioremap_res;
> identifier pdev;
> @@
> -struc
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