Replace drm_err() calls in vop2_bind() and vop2_create_crtcs() with
dev_err_probe(), to simplify error handling and improve consistency.
Additionally, ensure the already existing dev_err_probe() invocations
pass drm->dev instead of dev as their first argument, so that we get the
actual reason in c
VOP2 on RK3588 is able to use the HDMI PHY PLL as an alternative and
more accurate pixel clock source to improve handling of display modes up
to 4K@60Hz on video ports 0, 1 and 2.
The HDMI1 PHY PLL clock source cannot be added directly to vop node in
rk3588-base.dtsi, along with the HDMI0 related
Add the necessary DT changes to enable the second HDMI output port on
Rockchip RK3588 EVB1.
While at it, switch the position of &vop_mmu and @vop to maintain the
alphabetical order.
Signed-off-by: Cristian Ciocaltea
---
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 42 +
Since commit c4b09c562086 ("phy: phy-rockchip-samsung-hdptx: Add clock
provider support"), the HDMI PHY PLL can be used as an alternative and
more accurate pixel clock source for VOP2 to improve display modes
handling on RK3588 SoC.
Add the missing #clock-cells property to allow using the clock pr
The RK3588 specific implementation is currently quite limited in terms
of handling the full range of display modes supported by the connected
screens, e.g. 2560x1440@75Hz, 2048x1152@60Hz, 1024x768@60Hz are just a
few of them.
Additionally, it doesn't cope well with non-integer refresh rates like
5
From: Andy Yan
The DW DP TX Controller is compliant with the DisplayPort Specification
Version 1.4 with the following features:
* DisplayPort 1.4a
* Main Link: 1/2/4 lanes
* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps
* AUX channel 1Mbps
* Single Stream Transport(SST)
* Multistream
From: Andy Yan
The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX
controller. And this DPTX controller need share a USBDP PHY with
the USB 3.0 OTG controller during operation.
Signed-off-by: Andy Yan
---
.../display/rockchip/rockchip,dw-dp.yaml | 150 ++
1 f
From: Andy Yan
The DP0 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY0 with USB 3.1
HOST0 controller.
Signed-off-by: Andy Yan
---
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/
On Sat, Feb 22, 2025 at 06:58:04PM +0100, Luca Weiss wrote:
> Add the vendor prefix for DJN (http://en.djnlcd.com/).
>
> Signed-off-by: Luca Weiss
> ---
> Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++
> 1 file changed, 2 insertions(+)
Acked-by: Krzysztof Kozlowski
Best regard
From: Andy Yan
Enable the Mini DisplayPort on this board.
Note that ROCKCHIP_VOP2_EP_DP0 is defined as 10 in dt-binding header,
but it will trigger a dtc warning like "graph node unit address error,
expected "a"" if we use it directly after endpoint, so we use "a"
instead here.
Signed-off-by: An
From: Andy Yan
There are two DW DPTX based DisplayPort Controller on rk3588 which
are compliant with the DisplayPort Specification Version 1.4 with
the following features:
* DisplayPort 1.4a
* Main Link: 1/2/4 lanes
* Main Link Support 1.62Gbps, 2.7Gbps, 5.4Gbps and 8.1Gbps
* AUX channel 1Mbps
From: Andy Yan
Add driver extension for Synopsys DesignWare DPTX IP used
on Rockchip RK3588 SoC.
Signed-off-by: Andy Yan
---
drivers/gpu/drm/rockchip/Kconfig| 7 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/dw_dp-rockchip.c | 162
From: Andy Yan
The DP1 is compliant with the DisplayPort Specification
Version 1.4, and share the USBDP combo PHY1 with USB 3.1
HOST1 controller.
Signed-off-by: Andy Yan
---
.../arm64/boot/dts/rockchip/rk3588-extra.dtsi | 30 +++
1 file changed, 30 insertions(+)
diff --git a/
On Wed, Feb 19, 2025 at 7:03 PM Simona Vetter wrote:
>
> On Wed, Feb 19, 2025 at 02:56:58PM +0700, Bagas Sanjaya wrote:
> > On Thu, Feb 13, 2025 at 11:05:39PM +0530, Pranav Tyagi wrote:
> > > Hi,
> > >
> > > Just a gentle follow-up on this patch. It has been reviewed but hasn't
> > > been applied
On Sat, Feb 22, 2025 at 06:58:05PM +0100, Luca Weiss wrote:
> Himax HX83112B is a display driver IC used to drive LCD DSI panels.
> Describe it and the Fairphone 3 panel from DJN using it.
>
> Signed-off-by: Luca Weiss
> ---
> .../bindings/display/panel/himax,hx83112b.yaml | 75
> ++
On Sat, Feb 22, 2025 at 08:16:53PM +, Michael Kelley wrote:
> From: Saurabh Singh Sengar Sent: Saturday,
> February 22, 2025 9:27 AM
> >
> > On Wed, Feb 19, 2025 at 05:22:36AM +, Michael Kelley wrote:
> > > From: Saurabh Sengar Sent: Saturday,
> > > February 15,
> > 2025 1:21 AM
> > >
>
> Looking at the header files, it looks like doing cpu_to_le32 on that variable
> and doing le32_to_cpu will actually reverse the order twice, on big endian
> systems, thus technically all way would not swap the order at all.
>
> I'm not really sure how to manage the sparse warnings here.
Hi Krzysztof,
On 23-02-2025 12:54 p.m., Krzysztof Kozlowski wrote:
On Sat, Feb 22, 2025 at 06:58:05PM +0100, Luca Weiss wrote:
Himax HX83112B is a display driver IC used to drive LCD DSI panels.
Describe it and the Fairphone 3 panel from DJN using it.
Signed-off-by: Luca Weiss
---
.../bindi
SSD2825 is a cost-effective MIPI Bridge Chip solution targeting mainly
smartphones. It can convert 24bit RGB interface into 4-lane MIPI-DSI
interface to drive display modules of up to 800 x 1366, while supporting
AMOLED, a-si LCD or LTPS panel technologies for smartphone applications.
Signed-off-b
Refactor parity calculations to use the standard parity64() helper.
This change eliminates redundant implementations and improves code
efficiency.
Co-developed-by: Yu-Chun Lin
Signed-off-by: Yu-Chun Lin
Signed-off-by: Kuan-Wei Chiu
---
drivers/net/ethernet/netronome/nfp/nfp_asm.c | 7 +--
Refactor parity calculations to use the standard parity32() helper.
This change eliminates redundant implementations and improves code
efficiency.
Co-developed-by: Yu-Chun Lin
Signed-off-by: Yu-Chun Lin
Signed-off-by: Kuan-Wei Chiu
---
.../wireless/broadcom/brcm80211/brcmsmac/dma.c | 16 +---
Refactor parity calculations to use the standard parity32() helper.
This change eliminates redundant implementations and improves code
efficiency.
Co-developed-by: Yu-Chun Lin
Signed-off-by: Yu-Chun Lin
Signed-off-by: Kuan-Wei Chiu
---
drivers/input/joystick/grip_mp.c | 17 ++---
1
Refactor parity calculations to use the standard parity8() helper. This
change eliminates redundant implementations and improves code
efficiency.
Co-developed-by: Yu-Chun Lin
Signed-off-by: Yu-Chun Lin
Signed-off-by: Kuan-Wei Chiu
---
drivers/media/pci/cx18/cx18-av-vbi.c | 12 ++--
1 f
Several parts of the kernel contain redundant implementations of parity
calculations for 32-bit and 64-bit values. Introduces generic
parity32() and parity64() helpers in bitops.h, providing a standardized
and optimized implementation.
Subsequent patches refactor various kernel components to rep
On Sat, Feb 22, 2025 at 06:58:05PM +0100, Luca Weiss wrote:
> Himax HX83112B is a display driver IC used to drive LCD DSI panels.
> Describe it and the Fairphone 3 panel from DJN using it.
>
> Signed-off-by: Luca Weiss
> ---
> .../bindings/display/panel/himax,hx83112b.yaml | 75
> ++
On Tue Feb 18, 2025 at 10:46 AM JST, Dave Airlie wrote:
>> 1. How to avoid unnecessary calls to try_access().
>>
>> This is why I made Boot0.read() take a &RevocableGuard<'_, Bar0> as
>> argument. I
>> think we can just call try_access() once and then propage the guard through
>> the
>> callchain
505.
Signed-off-by: Barnabás Czémán
---
Changes in v3:
- Fix qcom,gcc-msm8937 dtbinding example
- Link to v2:
https://lore.kernel.org/r/20250223-msm8937-v2-0-b99722363...@mainlining.org
Changes in v2:
- drop applied patches
- drop gcc schema commits infavor of a new schema for gcc-msm8937
Add device tree bindings for the global clock controller on Qualcomm
MSM8937 platform.
Signed-off-by: Barnabás Czémán
---
.../bindings/clock/qcom,gcc-msm8937.yaml | 73 ++
include/dt-bindings/clock/qcom,gcc-msm8917.h | 17 +
2 files changed, 90 insertions(
Document Xiaomi Redmi 3S (land).
Add qcom,msm8937 for msm-id, board-id allow-list.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Barnabás Czémán
---
Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qc
Add MSM8937 compatible string with "qcom,msm-iommu-v1" as fallback
for the MSM8937 IOMMU which is compatible with Qualcomm's secure
fw "SMMU v1" implementation.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Barnabás Czémán
---
Documentation/devicetree/bindings/iommu/qcom,iommu.yaml | 1 +
1 f
From: Adam Skladowski
Adreno 505 (MSM8937), Adreno 506(MSM8953) and Adreno 510(MSM8976)
require Always-on branch clock to be enabled, describe it.
Signed-off-by: Adam Skladowski
[reword commit, move alwayson on the first place]
Signed-off-by: Barnabás Czémán
---
Documentation/devicetree/bindi
On Sat, Feb 22, 2025 at 06:32:35PM +0800, Yongbang Shi wrote:
> > On Sat, Feb 22, 2025 at 10:50:56AM +0800, Yongbang Shi wrote:
> > > From: Baihan Li
> > >
> > > Add dp serdes cfg in link training process, and related adapting
> > > and modificating. Change some init values about training,
> > >
On 2/19/2025 7:59 PM, Dmitry Baryshkov wrote:
Enable the CDM_0 block on DPU versions 1.x - 4.x as
documented in the vendor dtsi file.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_14_msm8937.h | 1 +
drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_15_msm8917.
From: Daniel Gomez
program_invocation_short_name() may not be available in other systems.
Instead, replace it with the argv[0] to pass the executable name.
Fixes build error when program_invocation_short_name is not available:
drivers/gpu/drm/xe/xe_gen_wa_oob.c:34:3: error: use of
undeclared id
Null pointer dereference issue could occur when pipe_ctx->plane_state
is null. The fix adds a check to ensure 'pipe_ctx->plane_state' is not
null before accessing. This prevents a null pointer dereference.
Found by code review.
Cc: sta...@vger.kernel.org
Fixes: 3be5262e353b ("drm/amd/display: Ren
As a followup to getting basic HDMI1 output support [1] merged upstream,
make use of the HDMI1 PHY PLL to provide better VOP2 display modes
handling for the second HDMI output port on RK3588 SoC, similarly to
what has been achieved recently for HDMI0 [2].
Please note Heiko's fix [3] in of_clk_get_
From: Saurabh Singh Sengar Sent: Sunday, February
23, 2025 6:10 AM
>
> On Sat, Feb 22, 2025 at 08:16:53PM +, Michael Kelley wrote:
> > From: Saurabh Singh Sengar Sent: Saturday,
> > February 22, 2025 9:27 AM
> > >
[anip]
> > >
> > > I had considered moving the entire `hvfb_putmem()` func
On 2/8/2025 7:21 PM, Dmitry Baryshkov wrote:
core_clk_rate override is handled in _dpu_core_perf_get_core_clk_rate().
Drop imperfect duplicating code from _dpu_core_perf_calc_crtc().
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 4 +---
1 file changed
On Mon, 24 Feb 2025 02:56:22 +0100, Barnabás Czémán wrote:
> Document Xiaomi Redmi 3S (land).
> Add qcom,msm8937 for msm-id, board-id allow-list.
>
> Acked-by: Krzysztof Kozlowski
> Signed-off-by: Barnabás Czémán
> ---
> Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++
> 1 file ch
On Mon, 24 Feb 2025 02:56:19 +0100, Barnabás Czémán wrote:
> Add MSM8937 compatible string with "qcom,msm-iommu-v1" as fallback
> for the MSM8937 IOMMU which is compatible with Qualcomm's secure
> fw "SMMU v1" implementation.
>
> Reviewed-by: Krzysztof Kozlowski
> Signed-off-by: Barnabás Czémán
On Mon, 24 Feb 2025 02:56:20 +0100, Barnabás Czémán wrote:
> From: Adam Skladowski
>
> Adreno 505 (MSM8937), Adreno 506(MSM8953) and Adreno 510(MSM8976)
> require Always-on branch clock to be enabled, describe it.
>
> Signed-off-by: Adam Skladowski
> [reword commit, move alwayson on the first
On Mon, 24 Feb 2025 02:56:16 +0100, Barnabás Czémán wrote:
> Add device tree bindings for the global clock controller on Qualcomm
> MSM8937 platform.
>
> Signed-off-by: Barnabás Czémán
> ---
> .../bindings/clock/qcom,gcc-msm8937.yaml | 73
> ++
> include/dt-bindi
On 2/8/2025 7:21 PM, Dmitry Baryshkov wrote:
The fix_core_ab_vote is an average bandwidth value, used for bandwidth
overrides in several cases. However there is an internal inconsistency:
fix_core_ib_vote is defined in KBps, while fix_core_ab_vote is defined
in Bps.
Fix that by changing the t
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