On Thu, Dec 05, 2024 at 08:31:56PM -0800, Abhinav Kumar wrote:
> Move the link related operations to dp_display_unprepare() and keep
> only stream related operations in dp_display_disable().
Why, no what
>
> Make dp_display_unprepare() available to other clients such as DP MST.
>
> Signed-off-b
On Thu, Dec 05, 2024 at 08:31:58PM -0800, Abhinav Kumar wrote:
missing commit message
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/dp/dp_drm.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_drm.
On Thu, Dec 05, 2024 at 08:31:57PM -0800, Abhinav Kumar wrote:
> For DP MST, the link clock and power domain resources stay on until
> both streams have been disabled OR we receive hotplug. Introduce an
> active_stream_cnt to track the number of active streams and necessary
> state handling. Replac
On Thu, Dec 05, 2024 at 08:31:55PM -0800, Abhinav Kumar wrote:
> Currently the dp_display bridge helpers, in particular the
> dp_display_enable()/dp_display_disable() use the cached panel.
> To be able to re-use these helpers for MST use-case abstract the
> helpers to use the panel which is passed
On Thu, Dec 05, 2024 at 08:32:13PM -0800, Abhinav Kumar wrote:
> HPD state machine assumes only one active stream. Fix it to account
> for both while marking the state of the hpd as disconnected.
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/dp/dp_display.c | 2 +-
> 1 file change
On Thu, Dec 05, 2024 at 08:32:14PM -0800, Abhinav Kumar wrote:
> Populate the max_streams for DP controllers to indicate MST support.
>
> If the pixel clock handle for the second stream fails, treat it as
> SST case rather than a complete failure.
Could you possibly clarify:
- Are there MSM DP co
On Thu, Dec 05, 2024 at 08:31:39PM -0800, Abhinav Kumar wrote:
> dp_display_disable() handles special case of when monitor is
> disconnected from the dongle while the dongle stays connected
> thereby needing a separate function dp_ctrl_off_link_stream()
> for this. However with a slight rework this
On Thu, Dec 05, 2024 at 08:31:59PM -0800, Abhinav Kumar wrote:
> If the DP controller is capable of supporting multiple streams
> then initialize the DP sink in MST mode by programming the DP_MSTM_CTRL
> DPCD register to enable MST mode.
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/m
On Fri, Dec 06, 2024 at 03:34:52PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Fri, Dec 06, 2024 at 12:16:03PM +0200, Dmitry Baryshkov wrote:
> > The vc4_hdmi_connector_detect_ctx() via vc4_hdmi_handle_hotplug()
> > already reads EDID and propagates it to the drm_connector. Stop
> > rereading EDID as
On Thu, Dec 05, 2024 at 08:31:43PM -0800, Abhinav Kumar wrote:
> dp_bridge helpers take drm_bridge as an input and extract the
> dp_display object to be used in the dp_display module. Rather than
> doing it in a roundabout way, directly pass the dp_display object
> to these helpers so that the MST
On Thu, Dec 05, 2024 at 08:31:45PM -0800, Abhinav Kumar wrote:
> With MST, each DP controller can handle multiple streams.
> There shall be one dp_panel for each stream but the dp_display
> object shall be shared among them. To represent this abstraction,
> create a stream_id for each DP panel whic
From: Martin Uecker
> Sent: 07 December 2024 23:52
...
> While the compiler can not automatically prove every use
> of VLA bounded, it can reliably diagnose the cases where it
> can *not* see that it is bounded. Consider this example:
>
> void oob(int n, char p[n]);
> void f(unsigned int n)
> {
>
On Thu, Dec 05, 2024 at 08:31:46PM -0800, Abhinav Kumar wrote:
> Convert dp_display_set_mode() to use the dp_panel passed to it
> as an argument rather than the cached one in dp_display_private.
Why?
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/dp/dp_display.c | 60
> +
On Thu, Dec 05, 2024 at 08:31:50PM -0800, Abhinav Kumar wrote:
> Add support to program the MST enabled bit in the mainlink
> control when a mst session is active and disabled.
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/dp/dp_catalog.c | 17 +
> drivers/gpu/drm/
On Thu, Dec 05, 2024 at 08:31:54PM -0800, Abhinav Kumar wrote:
> As required by the hardware programming guide, always program
> the MST_FIFO_CONSTANT_FILL for MST use-cases.
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/dp/dp_catalog.c | 24
> drivers/gpu
Hi,
On 04.12.24 14:44, Maarten Lankhorst wrote:
New update. Instead of calling it the 'dev' cgroup, it's now the 'dmem' cgroup.
Thanks! I think this version looks pretty good.
Because it only deals with memory regions, the UAPI has been updated to use
dmem.min/low/max/current, and to make
Am Sonntag, dem 08.12.2024 um 11:26 + schrieb David Laight:
> From: Martin Uecker
> > Sent: 07 December 2024 23:52
> ...
> > While the compiler can not automatically prove every use
> > of VLA bounded, it can reliably diagnose the cases where it
> > can *not* see that it is bounded. Consider th
On Thu, Dec 05, 2024 at 08:32:07PM -0800, Abhinav Kumar wrote:
> From: Yongxing Mou
>
> Propagate the hpd state changes to dp mst module so that it
please fix upcase.
> can be synchronized with the cable connect/disconnect.
It doesn't propagate HPD state. Instead it updates MST state when the
Am Samstag, dem 07.12.2024 um 17:58 -0800 schrieb Linus Torvalds:
> On Sat, 7 Dec 2024 at 15:52, Martin Uecker wrote:
> >
> > Can you point me to some horror stories?
>
> So the main issues tended to be about various static verification tools.
>
> Ranging from things like the stackleak plugin f
On Thu, Dec 05, 2024 at 08:32:01PM -0800, Abhinav Kumar wrote:
> Add an API dp_display_get_panel() to initialize and return a DP
> panel to be used by DP MST module. Since some of the fields of
> DP panel are private, dp_display module needs to initialize these
> parts and return the panel back.
>
On Thu, Dec 05, 2024 at 08:32:05PM -0800, Abhinav Kumar wrote:
> During certain cases, the dp mst connector's panel edid can be
> re-used such as getting multiple get_modes() without irq_hpd and
> should be cleared in cases when the connector is destroyed or when
> irq hpd is received. Add support
On Thu, Dec 05, 2024 at 08:32:06PM -0800, Abhinav Kumar wrote:
> To protect against concurrent access of the dp mst bridges
> introduce a session mutex.
Why is it necessary? What kind of concurrent access is expected?
Why wasn't it introduced together with struct msm_dp_mst?
>
> Signed-off-by:
On Thu, Dec 05, 2024 at 08:31:32PM -0800, Abhinav Kumar wrote:
> Once the link has already been setup there is no need to call
> dp_catalog_ctrl_mainlink_ctrl() as this does a reset on the mainlink
> thereby tearing down the link briefly.
>
> Fixes: c943b4948b58 ("drm/msm/dp: add displayPort drive
On Sun, 8 Dec 2024 at 10:11, Martin Uecker wrote:
> >
> > A lot of the 'macro business' for min/max is avoiding unexpected
> > conversion of negative values to very large unsigned ones.
> > And no, -Wsign-compare is spectacularly useless.
>
> This is a different topic, but what would be needed her
Am Sonntag, dem 08.12.2024 um 16:48 + schrieb David Laight:
> From: Martin Uecker
> > Sent: 08 December 2024 12:38
...
> ...
> > So a lot of this macro business seems to be necessary
> > to avoid creating warnings for ISO VLAs when instead you really
> > care about the created code not having
During suspend/resume process all connectors are explicitly disabled and
then reenabled. However resume fails because of the connector_status check:
[ 1185.831970] [dpu error]connector not connected 3
It doesn't make sense to check for the Writeback connected status (and
other drivers don't perfo
i.MX8qxp Display Controller contains a AXI performance counter which allows
measurement of average bandwidth and latency during operation.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v6:
* No change.
v5:
* No change.
v4:
* Collect Rob's R-b tag.
v3:
* New patch. (Rob)
...sl,i
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit. Add driver for it.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* Replace .remove_new with .remove in dc-ic.c. (Uwe)
v4:
* Use regmap to define register map for all register
i.MX8qxp Display Controller(DC) is comprised of three main components that
include a blit engine for 2D graphics accelerations, display controller for
display output processing, as well as a command sequencer. Add kernel
mode setting support for the display controller part with two CRTCs and
two p
The MIPI-LVDS combo subsystems are peripherals of pixel link MSI
bus in i.MX8qxp display controller subsystem. Add the MIPI-LVDS
combo subsystems.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch. (Francesco)
.../boot/dts/frees
Hi Nick,
kernel test robot noticed the following build errors:
[auto build test ERROR on 40384c840ea1944d7c5a392e8975ed088ecf0b37]
url:
https://github.com/intel-lab-lkp/linux/commits/Nick-Chan/dt-bindings-leds-backlight-apple-dwi-bl-Add-bindings-for-Apple-DWI-backlight/20241207-013254
base:
Hi Nick,
kernel test robot noticed the following build errors:
[auto build test ERROR on 40384c840ea1944d7c5a392e8975ed088ecf0b37]
url:
https://github.com/intel-lab-lkp/linux/commits/Nick-Chan/dt-bindings-leds-backlight-apple-dwi-bl-Add-bindings-for-Apple-DWI-backlight/20241207-013254
base:
Document SCU controlled display pixel link child nodes.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by display controller subsystem device tree.
.../devicetree/bindings/firmware/fsl,scu.yaml | 20 +
Add myself as the maintainer of i.MX8qxp Display Controller.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* Improve file list. (Frank)
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
ind
Enable display controller for i.MX8qxp MEK.
Signed-off-by: Liu Ying
---
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch. (Francesco)
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-
Freescale i.MX8qxp Display Controller is implemented as construction set of
building blocks with unified concept and standardized interfaces. Document
all existing processing units.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* Document aliases for processing units which have multiple inst
i.MX8qxp Display Controller pixel engine consists of all processing units
that operate in the AXI bus clock domain. Command sequencer and interrupt
controller of the Display Controller work with AXI bus clock, but they are
not in pixel engine.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Ar
i.MX8qxp Display Controller(DC) is comprised of three main components that
include a blit engine for 2D graphics accelerations, display controller for
display output processing, as well as a command sequencer.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* Document aliases. Drop Rob's previ
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* Collect Rob's R-b tag.
v2:
* Drop unneeded "|". (Krzysztof)
i.MX8qxp Display Controller display engine consists of all processing units
that operate in a display clock domain.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* Document aliases. Drop Rob's previous R-b tag. (Maxime)
v4:
* Collect Rob's R-b tag.
v3:
* No change.
v2:
* Drop fsl,dc-*-id
i.MX8qxp Display Controller contains a command sequencer is designed to
autonomously process command lists.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* No change.
v4:
* Replace "fsl,iram" property with standard "sram" property. (Rob)
v3:
* New patch. (Rob)
.../imx/fsl,imx8qxp-dc-comma
i.MX8qxp Display Controller contains a blit engine for raster graphics.
It may read up to 3 source images from memory and computes one destination
image from it, which is written back to memory.
Signed-off-by: Liu Ying
Reviewed-by: Rob Herring (Arm)
---
v6:
* No change.
v5:
* No change.
v4:
*
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8qxp
MEK. mipi_lvds_0_ldb channel0 and mipi_lvds_1_ldb channel1 send odd
and even pixels to the panel respectively.
Signed-off-by: Liu Ying
---
v6:
* No change.
i.MX8qxp Display Controller display engine consists of all processing
units that operate in a display clock domain. Add minimal feature
support with FrameGen and TCon so that the engine can output display
timings. The FrameGen driver, TCon driver and display engine driver
are components to be agg
Hi Nick,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 40384c840ea1944d7c5a392e8975ed088ecf0b37]
url:
https://github.com/intel-lab-lkp/linux/commits/Nick-Chan/dt-bindings-leds-backlight-apple-dwi-bl-Add-bindings-for-Apple-DWI-backlight/20241207-013254
ba
assigned-clock* properties can be used by default now, so allow them.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch as needed by MIPI/LVDS subsystems device tree.
.../devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml |
Hi,
This patch series aims to add Freescale i.MX8qxp Display Controller support.
The controller is comprised of three main components that include a blit
engine for 2D graphics accelerations, display controller for display output
processing, as well as a command sequencer.
Previous patch series
i.MX8qxp Display Controller pixel engine consists of all processing
units that operate in the AXI bus clock domain. Add drivers for
ConstFrame, ExtDst, FetchLayer, FetchWarp and LayerBlend units, as
well as a pixel engine driver, so that two displays with primary
planes can be supported. The pixe
On 2024/12/7 4:17, Abhinav Kumar wrote:
On 11/22/2024 1:56 AM, Fange Zhang wrote:
From: Li Liu
Add definitions for the display hardware used on the Qualcomm SM6150
platform.
Signed-off-by: Li Liu
Signed-off-by: Fange Zhang
---
.../gpu/drm/msm/disp/dpu1/catalog/dpu_5_3_sm6150.h | 263
Hi all,
After merging the drm-misc tree, today's linux-next build (x86_64
allmodconfig) failed like this:
In file included from include/linux/module.h:22,
from include/linux/device/driver.h:21,
from include/linux/device.h:32,
from include/linux/d
Hi,
On 04/12/24 00:06, Tomi Valkeinen wrote:
> Hi,
>
> On 03/12/2024 20:14, Aradhya Bhatia wrote:
>> Hi,
>>
>> On 03/12/24 17:42, Tomi Valkeinen wrote:
>>> Hi,
>>>
>>> On 24/11/2024 16:36, Aradhya Bhatia wrote:
Hello all,
This patch series add support for the dual OLDI TXes support
Add display controller subsystem in i.MX8qxp SoC.
Signed-off-by: Liu Ying
---
v6:
* No change.
v5:
* No change.
v4:
* No change.
v3:
* No change.
v2:
* New patch. (Krzysztof)
.../arm64/boot/dts/freescale/imx8-ss-dc0.dtsi | 408 ++
.../boot/dts/freescale/imx8qxp-ss-dc.dtsi
Hi,
On 06/12/2024 15:43, Geert Uytterhoeven wrote:
Hi Tomi,
On Fri, Dec 6, 2024 at 10:33 AM Tomi Valkeinen
wrote:
From: Tomi Valkeinen
Add display related clocks for DU, DSI, FCPVD, and VSPD.
Signed-off-by: Tomi Valkeinen
Reviewed-by: Laurent Pinchart
Tested-by: Geert Uytterhoeven
Rev
When user enabled HDCP feature, upper layer will set HDCP content
to DRM_MODE_CONTENT_PROTECTION_DESIRED. Next, anx7625 will update
HDCP content to DRM_MODE_CONTENT_PROTECTION_ENABLED if down stream
support HDCP feature.
However once HDCP content turn to DRM_MODE_CONTENT_PROTECTION_ENABLED
upper
Hi Dmitry,
On 5. 12. 24 23:48, Dmitry Baryshkov wrote:
On Thu, Dec 05, 2024 at 02:40:20PM +0100, Andrej Picej wrote:
Add a optional properties to change LVDS output voltage. This should not
be static as this depends mainly on the connected display voltage
requirement. We have three properties:
Hi Jianqi,
On 09/12/24 12:06, jianqi.ren...@windriver.com wrote:
From: Wayne Lin
[ Upstream commit fcf6a49d79923a234844b8efe830a61f3f0584e4 ]
[Why]
When unplug one of monitors connected after mst hub, encounter null pointer
dereference.
It's due to dc_sink get released immediately in early_
Thanks Maíra!
Acked-by: Iago Toral Quiroga
El vie, 06-12-2024 a las 12:39 -0300, Maíra Canal escribió:
> This commit fixes several miscellaneous documentation errors. Mostly,
> delete/update comments that are outdated or are leftovers from past
> code
> changes. Apart from that, remove double-sp
Add the device tree bindings for backlight controllers attached via Apple
DWI 2-wire interface.
Signed-off-by: Nick Chan
---
.../bindings/leds/backlight/apple,dwi-bl.yaml | 54 +++
1 file changed, 54 insertions(+)
create mode 100644
Documentation/devicetree/bindings/leds/backli
Add MAINTAINERS entries for the driver.
Signed-off-by: Nick Chan
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 17daa9ee9384..3a7dec3f9a5a 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2196,6 +2196,7 @@ F:
Documentation/devicetree/b
Add driver for backlight controllers attached via Apple DWI 2-wire
interface, which is found on some Apple iPhones, iPads and iPod touches
with a LCD display.
Signed-off-by: Nick Chan
---
drivers/video/backlight/Kconfig | 12 +++
drivers/video/backlight/Makefile | 1 +
drivers/video/backligh
Apple SoCs come with a 2-wire interface named DWI. On some iPhones, iPads
and iPod touches the backlight controller is connected via this interface.
This series adds a backlight driver for backlight controllers connected
this way.
Changes since v2:
- Add missing includes in driver
- Fix file path
> -Original Message-
> From: Dmitry Baryshkov
> Sent: Saturday, November 30, 2024 4:56 PM
> To: Xin Ji
> Cc: Andrzej Hajda ; Neil Armstrong
> ; Robert Foss ; Laurent Pinchart
> ; Jonas Karlman ;
> Jernej Skrabec ; Maarten Lankhorst
> ; Maxime Ripard ;
> Thomas Zimmermann ; David Airlie
Hi Tomi,
On Mon, Dec 9, 2024 at 6:26 AM Tomi Valkeinen
wrote:
> On 06/12/2024 15:43, Geert Uytterhoeven wrote:
> > On Fri, Dec 6, 2024 at 10:33 AM Tomi Valkeinen
> > wrote:
> >> From: Tomi Valkeinen
> >>
> >> Add display related clocks for DU, DSI, FCPVD, and VSPD.
> >>
> >> Signed-off-by: Tomi
On Thu, Dec 05, 2024 at 02:40:19PM +0100, Andrej Picej wrote:
> Add properties which can be used to specify LVDS differential output
> voltage. Since this also depends on near-end signal termination also
> include property which sets this. LVDS differential output voltage is
> specified with an arr
On 2024/12/6 21:52, Takashi Sakamoto wrote:
> Hi,
>
> On Thu, Dec 05, 2024 at 08:10:13AM +0800, Zijun Hu wrote:
>> From: Zijun Hu
>>
>> Constify the following API:
>> struct device *device_find_child(struct device *dev, void *data,
>> int (*match)(struct device *dev, void *data));
>>
These two files (i915_live_selftests.h, i915_mock_selftests.h) were
introduced in commit 953c7f82eb89 ("drm/i915: Provide a hook for
selftests") and are effectively just a list of selftests.
The selftest implementation itself is largely in i915_selftest.c, and
uses a MIT license. Graphics drivers
From: Martin Uecker
> Sent: 08 December 2024 12:38
>
> Am Sonntag, dem 08.12.2024 um 11:26 + schrieb David Laight:
> > From: Martin Uecker
> > > Sent: 07 December 2024 23:52
> > ...
> > > While the compiler can not automatically prove every use
> > > of VLA bounded, it can reliably diagnose th
On Wed, 20 Nov 2024 13:41:43 +0100, AngeloGioacchino Del Regno wrote:
> At least version 2 of the HDMI PHY, found in MediaTek MT8195 and
> MT8188 SoCs, does provide hardware support to switch on/off the
> HDMI 5V pins (which are also used for DDC), and this translates
> to this being a fixed regu
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