On Fri, Oct 18, 2024 at 03:11:38PM +, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> Clang-19 and above sometimes end up with multiple copies of the large
> a6xx_hfi_msg_bw_table structure on the stack. The problem is that
> a6xx_hfi_send_bw_table() calls a number of device specific functions
Hi,
Am 17.10.24 um 17:59 schrieb Maxime Ripard:
On Thu, Oct 17, 2024 at 05:26:46PM GMT, Stefan Wahren wrote:
Am 17.10.24 um 16:27 schrieb Maxime Ripard:
On Wed, Oct 16, 2024 at 07:16:43PM GMT, Dave Stevenson wrote:
Hi Stefan
On Tue, 15 Oct 2024 at 22:13, Stefan Wahren wrote:
Hi Dave,
...
On Thu, Oct 17, 2024 at 09:05:50AM +0200, Krzysztof Kozlowski wrote:
> On 17/10/2024 08:12, Akhil P Oommen wrote:
> > On Wed, Oct 16, 2024 at 09:50:04AM +0200, Krzysztof Kozlowski wrote:
> >> On 15/10/2024 21:35, Akhil P Oommen wrote:
> >>> On Mon, Oct 14, 2024 at 09:40:13AM +0200, Krzysztof Kozlow
On 10/17/2024 8:58 AM, Jacek Lawrynowicz wrote:
From: Karol Wachowski
Ensure that all buffers that were created only partially through
allocated scatter-gather table are unmapped from MMU600 in case of errors.
Signed-off-by: Karol Wachowski
Reviewed-by: Jacek Lawrynowicz
Signed-off-by: Jacek
On Thu, 26 Sep 2024 07:55:50 +0200, Alexander Stein wrote:
> fsl_dcu_drm_modeset_init can return -EPROBE_DEFER, so use dev_err_probe
> to remove an invalid error message and add it to deferral description.
>
>
Applied to drm-misc-next, thanks!
[1/2] drm: fsl-dcu: Use dev_err_probe
commit:
On Wed, 25 Sep 2024 17:42:39 +0200, Javier Carrasco wrote:
> This series adds the const modifier to the remaining regmap_bus and
> regmap_config structs under drm/ that are effectively used as const
> (i.e., only read after their declaration), but kept ad writtable data.
>
>
Applied to drm-misc-
On Wed, 18 Sep 2024 15:48:41 +0800, Chen Ni wrote:
> There is no need to call the dev_err() function directly to print a
> custom message when handling an error from platform_get_irq() function
> as it is going to display an appropriate error message in case of a
> failure.
>
>
Applied to drm-mi
Document the MDSS hardware found on the Qualcomm SA8775P platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Mahadevan
---
.../bindings/display/msm/qcom,sa8775p-mdss.yaml| 241 +
1 file changed, 241 insertions(+)
diff --git
a/Documentation/devicetree/bindings/dis
Document the DPU for Qualcomm SA8775P platform.
Signed-off-by: Mahadevan
---
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
b/Documentation/devicetree/bindi
Add Mobile Display Subsystem (MDSS) support for the SA8775P platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Mahadevan
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
Add definitions for the display hardware used on the
Qualcomm SA8775P platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Mahadevan
---
.../drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h| 485 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/
Document the MDSS hardware found on the Qualcomm SA8775P platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Mahadevan
---
.../bindings/display/msm/qcom,sa8775p-mdss.yaml| 241 +
1 file changed, 241 insertions(+)
diff --git
a/Documentation/devicetree/bindings/dis
Add Mobile Display Subsystem (MDSS) support for the SA8775P platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Mahadevan
---
drivers/gpu/drm/msm/msm_mdss.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index
On Wed, Oct 09, 2024 at 04:28:26PM +0200, Steffen Dirkwinkel wrote:
> Hi Laurent,
>
>
> On Wed, 2024-09-25 at 19:36 +0300, Laurent Pinchart wrote:
> > Hi Steffen,
> >
> > On Wed, Sep 25, 2024 at 09:54:18AM +0200, Steffen Dirkwinkel wrote:
> > > On Tue, 2024-09-24 at 21:43 +0300, Laurent Pinchart
I apologize for the inconvenience caused by uploading the incorrect
patch (v4). Kindly disregard it.
On 10/19/2024 8:46 PM, Mahadevan wrote:
This series introduces support to enable the Mobile Display Subsystem (MDSS)
and Display Processing Unit (DPU) for the Qualcomm SA8775P target. It
include
On Sat, Oct 19, 2024 at 09:13:23PM +0530, Mahadevan P wrote:
> I apologize for the inconvenience caused by uploading the incorrect patch
> (v4). Kindly disregard it.
One thing makes me wonder. You are using b4 tool. It should handle
versioning, changelogs, etc for you. However despite all of that
Document the DPU for Qualcomm SA8775P platform.
Signed-off-by: Mahadevan
---
Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
b/Documentation/devicetree/bindi
On Mon, Sep 30, 2024 at 10:18:06AM +0200, Maxime Ripard wrote:
> On Sun, Sep 29, 2024 at 02:34:36AM GMT, Sandor Yu wrote:
> > > > +static void cdns_hdmi_sink_config(struct cdns_mhdp8501_device *mhdp)
> > > > +{
> > > > + struct drm_display_info *display =
> > > > &mhdp->curr_conn->display_in
On Thu, 19 Sep 2024 14:45:47 +0530, Manikandan Muralidharan wrote:
> Add Microchip AC69T88A 5" LVDS interface (800x480) TFT LCD panel
> compatible string
>
>
Applied to drm-misc-next, thanks!
[1/2] dt-bindings: display: panel-simple: Document support for Microchip
AC69T88A
commit: c3f0b9
On Sat, Oct 19, 2024 at 4:34 AM Dmitry Baryshkov
wrote:
>
> Several HDMI drivers have common code pice in the .mode_valid function
> that validates RGB / 8bpc rate using the TMDS char rate callbacks.
>
> Move this code piece to the common helper and remove the need to perform
> this check manually
On Sun, Sep 08, 2024 at 02:04:45PM +0200, Heiner Kallweit wrote:
> Series with DRM core improvements/refactorings.
>
> Heiner Kallweit (6):
> drm/sysfs: Remove version attribute
> drm/sysfs: Drop unused drm_class_device_(un)register
> drm: Refactor drm_core_init error path
> drm: Change dr
This series introduces support to enable the Mobile Display Subsystem (MDSS)
and Display Processing Unit (DPU) for the Qualcomm SA8775P target. It
includes the addition of the hardware catalog, compatible string,
relevant device tree changes, and their YAML bindings.
---
In this series
- PATCH 1:
Add definitions for the display hardware used on the
Qualcomm SA8775P platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Mahadevan
---
.../drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h| 485 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 +
drivers/gpu/drm/
Add devicetree changes to enable MDSS0 display-subsystem its
display-controller(DPU) for Qualcomm SA8775P platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Mahadevan
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 89 +++
1 file changed, 89 insertions(+)
diff -
This series introduces support to enable the Mobile Display Subsystem (MDSS)
and Display Processing Unit (DPU) for the Qualcomm SA8775P target. It
includes the addition of the hardware catalog, compatible string,
relevant device tree changes, and their YAML bindings.
---
In this series
- PATCH 1:
Add devicetree changes to enable MDSS0 display-subsystem its
display-controller(DPU) for Qualcomm SA8775P platform.
Reviewed-by: Dmitry Baryshkov
Signed-off-by: Mahadevan
---
arch/arm64/boot/dts/qcom/sa8775p.dtsi | 89 +++
1 file changed, 89 insertions(+)
diff -
On Fri, Oct 04, 2024 at 02:52:24PM +0300, Tomi Valkeinen wrote:
> Hi Dmitry,
>
> On 27/09/2024 11:35, Dmitry Baryshkov wrote:
> > On Fri, 27 Sept 2024 at 08:41, Tomi Valkeinen
> > wrote:
> > >
> > > On 27/09/2024 02:26, Dmitry Baryshkov wrote:
> > > > On Thu, Sep 26, 2024 at 02:52:35PM GMT, Tomi
From: Aradhya Bhatia
Fix the OF node pointer passed to the of_drm_find_bridge() call to find
the next bridge in the display chain.
The code to find the next panel (and create its panel-bridge) works
fine, but to find the next (non-panel) bridge does not.
To find the next bridge in the pipeline,
From: Aradhya Bhatia
At present, the DSI mode configuration check happens during the
_atomic_enable() phase, which is not really the best place for this.
Moreover, if the mode is not valid, the driver gives a warning and
continues the hardware configuration.
Move the DSI mode configuration check
From: Aradhya Bhatia
Instead of manually finding the next bridge/panel, and maintaining the
panel-bridge (in-case the next entity is a panel), switch to using the
automatically managing devm_drm_of_get_bridge() API.
Drop the drm_panel support completely from the driver while at it.
Reviewed-by:
Hi Hermes,
kernel test robot noticed the following build errors:
[auto build test ERROR on b8128f7815ff135f0333c1b46dcdf1543c41b860]
url:
https://github.com/intel-lab-lkp/linux/commits/Hermes-Wu-via-B4-Relay/drm-bridge-it6505-Change-definition-of-AUX_FIFO_MAX_SIZE/20241016-155607
base: b81
Add migrate layer functions to access VRAM and update
xe_ttm_access_memory to use for non-visible access.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_bo.c | 18 ++-
drivers/gpu/drm/xe/xe_migrate.c | 267
drivers/gpu/drm/xe/xe_migrate.h | 4 +
3
Non-contiguous mapping of BO in VRAM doesn't work, use ttm_bo_access
instead.
v2:
- Fix error handling
Fixes: 0eb2a18a8fad ("drm/xe: Implement VM snapshot support for BO's and
userptr")
Suggested-by: Matthew Auld
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_vm.c | 17 ++
Non-contiguous VRAM cannot easily be mapped in TTM nor can non-visible
VRAM easily be accessed. Add ttm_bo_access, which is similar to
ttm_bo_vm_access, to access such memory.
Reported-by: Christoph Manszewski
Suggested-by: Thomas Hellström
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/ttm/
xe_bo_vmap only works on contiguous BOs, disallow xe_bo_vmap on BO
unless we are certain the BO is contiguous.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_bo.c | 23 ++-
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_bo.c b/dri
Mapping a non-contiguous VRAM BO doesn't work, start to fix this.
v2:
- Include missing local change
v3:
- Use GPU for non-visible access
- Take PM ref in xe_ttm_access_memory
- Disable VMAP for non-contiguous BOs
Matthew Brost (6):
drm/ttm: Add ttm_bo_access
drm/xe: Add xe_ttm_access_mem
From: Aradhya Bhatia
The cdns-dsi controller requires that it be turned on completely before
the input DPI's source has begun streaming[0]. Not having that, allows
for a small window before cdns-dsi enable and after cdns-dsi disable
where the previous entity (in this case tidss's videoport) to co
From: Aradhya Bhatia
Change the existing (and deprecated) bridge hooks, to the bridge
atomic APIs.
Add drm helpers for duplicate_state, destroy_state, and bridge_reset
bridge hooks.
Further add support for the input format negotiation hook.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Tomi Valk
Quoting Marek Vasut (2024-10-12 21:37:59)
> On 10/11/24 5:10 AM, Liu Ying wrote:
>
> Hi,
>
> This Video PLL1 configuration since moved to &media_blk_ctrl {} , but it
> is still in the imx8mp.dtsi . Therefore, to make your panel work at the
> correct desired pixel clock frequency
From: Aradhya Bhatia
The way any singular display pipeline, in need of a modeset, gets
enabled is as follows -
CRTC Enable
All Bridge Pre-Enable
Encoder Enable
All Bridge Enable
- and the disable path is exactly the reverse of this.
The CRTC enable/disable occur
On Sat Oct 12, 2024 at 1:04 PM CEST, Miguel Ojeda wrote:
> Hi Thomas,
Hi Miguel,
>
> On Sat, Oct 12, 2024 at 9:53 AM Thomas Böhler wrote:
> >
> > implementing the same logic itself.
> > Clippy complains about this in the `manual_find` lint:
>
> Typically commit messages use newlines between para
Rust allows initializing fields of a struct without specifying the
attribute that is assigned if the variable has the same name. In this
instance this is done for all other attributes of the struct except for
`data`.
Remove the redundant `data` in the assignment to be consistent.
Fixes: cb5164ac43
The file drivers/gpu/drm/drm_panic_qr.rs has some lints that Clippy
complains about. This series cleans them up by either allowing what is
written or conforming to what Clippy expects where it makes sense.
All explicitly allowed lints are marked with `#[expect(...)]`.
v1 -> v2:
- Add "Fixes" trai
On Mon Oct 14, 2024 at 11:06 AM CEST, Jocelyn Falempe wrote:
> Hi Thomas,
Hi Jocelyn,
> If you want to send a v2, the easiest way is to download the mbox series
> from https://patchwork.freedesktop.org/series/139924/
> and apply it with git am.
>
> That way you will have my reviewed-by automatic
On Sat, Oct 19, 2024 at 03:01:46PM +0530, Akhil P Oommen wrote:
> On Fri, Oct 18, 2024 at 03:11:38PM +, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > Clang-19 and above sometimes end up with multiple copies of the large
> > a6xx_hfi_msg_bw_table structure on the stack. The problem is t
On Mon, Sep 30, 2024 at 03:03:09PM +0200, Thomas Zimmermann wrote:
> DRM's aperture functions have long been implemented as helpers
> under drivers/video/ for use with fbdev. Avoid the DRM wrappers by
> calling the video functions directly.
>
> Signed-off-by: Thomas Zimmermann
> Cc: Rob Clark
>
On Mon, Sep 30, 2024 at 06:06:09PM +0800, shiyongbang wrote:
> From: baihan li
>
> Build a kapi level that hibmc driver can enable dp by
> calling these kapi functions.
>
> Signed-off-by: baihan li
> ---
> drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +-
> .../gpu/drm/hisilicon/hibmc/dp/
On Mon, Sep 30, 2024 at 06:06:10PM +0800, shiyongbang wrote:
> From: baihan li
>
> To support DP interface displaying in hibmc driver. Add
> a encoder and connector for DP modual.
>
> Signed-off-by: baihan li
> ---
> drivers/gpu/drm/hisilicon/hibmc/Makefile | 2 +-
> .../gpu/drm/hisilic
On Sun, Sep 29, 2024 at 10:04:33PM +1300, Ryan Walklin wrote:
> From: Jernej Skrabec
>
> Currently, CSC module takes care only for converting YUV to RGB.
> However, DE3 is more suited to work in YUV color space. Change CSC mode
> argument to format type to be more neutral. New argument only tells
On Sun, Sep 29, 2024 at 10:04:40PM +1300, Ryan Walklin wrote:
> From: Jernej Skrabec
>
> The mixer in the DE3 display engine supports YUV 8 and 10 bit
> formats in addition to 8-bit RGB. Add the required register
> configuration and format enumeration callback functions to the mixer,
> and store
On Thu, Oct 17, 2024 at 08:50:43AM +0200, Alexander Stein wrote:
> Hi everyone,
>
> Am Freitag, 27. September 2024, 01:13:57 CEST schrieb Dmitry Baryshkov:
> > On Thu, Sep 26, 2024 at 04:09:03PM GMT, Alexander Stein wrote:
> > > Hi Dmitry,
> > >
> > > Am Donnerstag, 26. September 2024, 08:05:56 C
On 10/19/24 11:49 PM, Kieran Bingham wrote:
Quoting Marek Vasut (2024-10-12 21:37:59)
On 10/11/24 5:10 AM, Liu Ying wrote:
Hi,
This Video PLL1 configuration since moved to &media_blk_ctrl {} , but it is
still in the imx8mp.dtsi . Therefore, to make your panel work at the correct
desired pix
Hi Hermes,
kernel test robot noticed the following build errors:
[auto build test ERROR on b8128f7815ff135f0333c1b46dcdf1543c41b860]
url:
https://github.com/intel-lab-lkp/linux/commits/Hermes-Wu-via-B4-Relay/drm-bridge-it6505-Change-definition-of-AUX_FIFO_MAX_SIZE/20241016-155607
base: b81
Non-contiguous VRAM cannot easily be mapped in TTM nor can non-visible
VRAM easily be accessed. Add xe_ttm_access_memory which hooks into
ttm_bo_access to access such memory.
Reported-by: Christoph Manszewski
Suggested-by: Thomas Hellström
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe
From: Aradhya Bhatia
Check for the return value of the phy_mipi_dphy_get_default_config()
call, and incase of an error, return back the same.
Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework")
Signed-off-by: Aradhya Bhatia
Signed-off-by: Aradhya Bhatia
---
drivers/gpu/drm/brid
From: Aradhya Bhatia
Initialize the Phy during the cdns-dsi _resume(), and de-initialize it
during the _suspend().
Also power-off the Phy from bridge_disable.
Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework")
Signed-off-by: Aradhya Bhatia
Signed-off-by: Aradhya Bhatia
---
dr
From: Aradhya Bhatia
Move the bridge pre_enable call before crtc enable, and the bridge
post_disable call after the crtc disable.
The sequence of enable after this patch will look like:
bridge[n]_pre_enable
...
bridge[1]_pre_enable
crtc_enable
encoder_en
Hello all,
This series provides some crucial fixes and improvements for the Cadence's DSI
TX (cdns-dsi) controller found commonly in Texas Instruments' J7 family of SoCs
as well as in AM62P.
Along with that, this series aims to fix the color-shift issue that has been
going on with the DSI control
From: Aradhya Bhatia
The order of init of DSI link and DSI phy is wrong. The DSI link needs
to be configured before the DSI phy is getting configured. Otherwise,
the D-Phy is unable to lock in on the incoming PLL Reference clock[0].
Fix the order of inits.
[0]: See section 12.6.5.7.3 "Start-up
From: Aradhya Bhatia
Once the DSI Link and DSI Phy are initialized, the code needs to wait
for Clk and Data Lanes to be ready, before continuing configuration.
This is in accordance with the DSI Start-up procedure, found in the
Technical Reference Manual of Texas Instrument's J721E SoC[0] which
h
From: Aradhya Bhatia
Allow the D-Phy config checks to use mode->clock instead of
mode->crtc_clock during mode_valid checks, like everywhere else in the
driver.
Fixes: fced5a364dee ("drm/bridge: cdns: Convert to phy framework")
Reviewed-by: Tomi Valkeinen
Signed-off-by: Aradhya Bhatia
Signed-of
On Thu, Oct 17, 2024 at 04:16:09PM -0300, André Almeida wrote:
> Hi Raag,
>
> Em 30/09/2024 04:38, Raag Jadav escreveu:
> > Introduce device wedged event, which will notify userspace of wedged
> > (hanged/unusable) state of the DRM device through a uevent. This is
> > useful especially in cases wh
We only allow continguous BOs to be vmapped, set XE_BO_FLAG_PINNED on
BOs in migrate selftest as this forces continguous BOs and selftest uses
vmaps.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/tests/xe_migrate.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff -
From: Aradhya Bhatia
Add a helper API that can be used by the DSI hosts to find the required
input bus format for the given output dsi pixel format.
Reviewed-by: Dmitry Baryshkov
Reviewed-by: Tomi Valkeinen
Signed-off-by: Aradhya Bhatia
Signed-off-by: Aradhya Bhatia
---
drivers/gpu/drm/drm_
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