Add the DRM_XE_VM_BIND_FLAG_SYSTEM_ALLOCATOR flag, which is used to
create unpopulated virtual memory areas (VMAs) without memory backing or
GPU page tables. These VMAs are referred to as system allocator VMAs.
The idea is that upon a page fault or prefetch, the memory backing and
GPU page tables w
Add DRM_GPUVA_OP_USER which allows driver to define their own gpuvm ops.
Cc: Danilo Krummrich
Signed-off-by: Matthew Brost
---
include/drm/drm_gpuvm.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/drm/drm_gpuvm.h b/include/drm/drm_gpuvm.h
index 00d4e43b76b6..cc3f8ed5113b 1006
Add GPUSVM devic memory copy vfunc functions and connect to migration
layer.
v2:
- Allow NULL device pages in xe_svm_copy
- Use new drm_gpusvm_devmem_ops
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_svm.c | 150
1 file changed, 150 insertions(+)
Support for system allocator bindings in SRAM fully in place, enable the
implementation.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_vm.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 158fbb1c3f28..8eed820079ba 1
Add functions which migrate to / from VRAM accepting a single DPA
argument (VRAM) and array of dma addresses (SRAM).
v2:
- Don't unlock job_mutex in error path of xe_migrate_vram
Signed-off-by: Oak Zeng
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_migrate.c | 149 +++
TTM doesn't support fair eviction via WW locking, this mitigated in by
using retry loops in exec and preempt rebind worker. Extend this retry
loop to BO allocation. Once TTM supports fair eviction this patch can be
reverted.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_bo.c | 8 +++
Version 2 of GPU SVM has been promoted to the proper series from an RFC.
Thanks to everyone (especially Sima and Thomas) for their numerous
reviews on revision 1 and for helping to address many design issues.
This version has been tested with IGT [1] on PVC, BMG, and LNL.
Major changes in v2:
- D
Add migrate_device_prepoluated_range which prepares an array of
pre-populated device pages for migration.
v2:
- s/migrate_device_vma_range/migrate_device_prepopulated_range
- Drop extra mmu invalidation (Vetter)
Cc: Andrew Morton
Signed-off-by: Matthew Brost
---
include/linux/migrate.h | 1
From: Thomas Hellström
Introduce drm_pagemap ops to map and unmap dma to VRAM resources. In the
local memory case it's a matter of merely providing an offset into the
device's physical address. For future p2p the map and unmap functions may
encode as needed.
Similar to how dma-buf works, let the
Implement with a simple BO put.
v2:
- Use new drm_gpusvm_devmem_ops
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_svm.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index 19fcb8f71791..976b4ce15db4 100644
--- a/dr
From: Thomas Hellström
Useful for SVM ranges in SRAM and programing page tables.
Signed-off-by: Matthew Brost
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/xe/xe_res_cursor.h | 116 -
drivers/gpu/drm/xe/xe_svm.h| 4 +
2 files changed, 118 insertions
uAPI is designed with the the use case that only mapping a BO to a
malloc'd address will unbind a system allocator VMA. Thus it doesn't
make tons of sense to allow a system allocator VMA unbind if the GPU has
bindings in the range being unbound. Do not support this as it
simplifies the code. Can al
Add XE_BO_FLAG_SYSTEM_ALLOC to indicate BO is tied to SVM range.
Add XE_BO_FLAG_SKIP_CLEAR to indicate BO does not need to cleared.
v2:
- Take VM ref for system allocator BOs
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_bo.c | 15 +--
drivers/gpu/drm/xe/xe_bo.h | 2 ++
This patch introduces support for GPU Shared Virtual Memory (SVM) in the
Direct Rendering Manager (DRM) subsystem. SVM allows for seamless
sharing of memory between the CPU and GPU, enhancing performance and
flexibility in GPU computing tasks.
The patch adds the necessary infrastructure for SVM, i
Wire xe_bo_move to GPUSVM migration to SRAM with trylocking of mmap
lock.
v2:
- Use xe_svm_bo_evict
- Drop bo->range
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_bo.c | 20
drivers/gpu/drm/xe/xe_svm.c | 5 +
drivers/gpu/drm/xe/xe_svm.h | 3 +++
3 files ch
From: Thomas Hellström
Add support for mapping device pages to Xe SVM.
Signed-off-by: Matthew Brost
Signed-off-by: Thomas Hellström
---
drivers/gpu/drm/xe/xe_device_types.h | 7 +++
drivers/gpu/drm/xe/xe_svm.c | 30
2 files changed, 37 insertions(+)
Add some useful SVM debug logging.
v2:
- Upadte logging with latest structure layout
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_pt.c | 8 +++
drivers/gpu/drm/xe/xe_svm.c | 101 +++-
drivers/gpu/drm/xe/xe_svm.h | 2 +
3 files changed, 99 insertio
Add drm_gpusvm_devmem to xe_bo. Required to enable SVM migrations.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_bo_types.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_bo_types.h b/drivers/gpu/drm/xe/xe_bo_types.h
index 13c6d8a69e91..54d337004621 10064
Add (re)bind to SVM page fault handler. To facilitate add support
function to VM layer which (re)binds a SVM range. Also teach PT layer to
understand (re)binds of SVM ranges.
v2:
- Don't assert BO lock held for range binds
- Use xe_svm_notifier_lock/unlock helper in xe_svm_close
- Use drm_pagem
Useful to experiment with notifier size and how it affects performance.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_module.h | 1 +
drivers/gpu/drm/xe/xe_svm.c| 5 +++--
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_module.h b/drivers/gpu/drm
Add documentation for agree upon GPU SVM design principles, current
status, and future plans.
Signed-off-by: Matthew Brost
---
Documentation/gpu/rfc/gpusvm.rst | 70
Documentation/gpu/rfc/index.rst | 4 ++
2 files changed, 74 insertions(+)
create mode 100644 D
Add unbind to SVM garbage collector. To facilitate add unbind support
function to VM layer which unbinds a SVM range. Also teach PY layer to
understand unbinds of SVM ranges.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_pt.c | 84 ++--
drivers/gpu/drm/
Add SVM init / close / fini to faulting VMs. Minimual implementation.
v2:
- Add close function
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/xe_svm.c | 46
drivers/gpu/drm/xe/xe_svm.h | 15 +++
dr
Migration is implemented with range granularity, with VRAM backing being
a VM private TTM BO (i.e., shares dma-resv with VM). The lifetime of the
TTM BO is limited to when the SVM range is in VRAM (i.e., when a VRAM
SVM range is migrated to SRAM, the TTM BO is destroyed).
The design choice for usi
Get VRAM pfns from BO's buddy blocks.
v2:
- Use new drm_gpusvm_devmem_ops
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Oak Zeng
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_svm.c | 40 +
1 file changed, 40 insertions(+)
diff --git a/d
Used to show we can bounce memory multiple times.
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/xe/xe_module.c | 7 +++
drivers/gpu/drm/xe/xe_module.h | 1 +
drivers/gpu/drm/xe/xe_svm.c| 3 +++
3 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_module.c b/drivers/gp
On 10/14/2024 3:09 PM, Giedrius Statkevičius wrote:
Avoid hardcoding the LSPCON settle timeout because it takes a longer
time on certain chips made by certain vendors. Use the function that
already exists to determine the timeout.
Signed-off-by: Giedrius Statkevičius
---
drivers/gpu/drm/dis
Yonatan Maman writes:
> From: Yonatan Maman
>
> hmm_range_fault() natively triggers a page fault on device private
> pages, migrating them to RAM. In some cases, such as with RDMA devices,
> the migration overhead between the device (e.g., GPU) and the CPU, and
> vice-versa, significantly dama
Matthew Brost writes:
> Avoid multiple CPU page faults to the same device page racing by trying
> to lock the page in do_swap_page before taking an extra reference to the
> page. This prevents scenarios where multiple CPU page faults each take
> an extra reference to a device page, which could
On 15/10/24 02:02, Helge Deller wrote:
On 10/6/24 09:15, SurajSonawane2415 wrote:
Fix the indentation to ensure consistent code style and improve
readability, and to fix this warning:
drivers/video/fbdev/nvidia/nv_hw.c:1512 NVLoadStateExt() warn:
inconsistent indenting
Signed-off-by: SurajSonaw
Matthew Brost writes:
> Add migrate_device_prepoluated_range which prepares an array of
> pre-populated device pages for migration.
It would be nice if the commit message could also include an explanation
of why the existing migrate_device_range() is inadequate for your needs.
> v2:
> - s/mi
hi, Eric,
On Tue, Oct 15, 2024 at 07:25:32PM -0700, Eric Biggers wrote:
> On Wed, Oct 16, 2024 at 10:19:25AM +0800, kernel test robot wrote:
> > kernel test robot noticed a -5.1% regression of
> > stress-ng.ring-pipe.ops_per_sec
>
> These emails that talk about negative regressions keep confusin
Hi Logan,
>
> On 2024-10-11 20:40, Vivek Kasireddy wrote:
> > Functions of the same PCI device (such as a PF and a VF) share the
> > same bus and have a common root port and typically, the PF provisions
> > resources for the VF. Therefore, they can be considered compatible
> > as far as P2P acces
On Tue, 15 Oct 2024 22:29:45 +0100
Liviu Dudau wrote:
> On Tue, Oct 15, 2024 at 09:03:51AM +0200, Boris Brezillon wrote:
> > Hi Liviu,
> >
> > On Tue, 15 Oct 2024 02:08:46 +0100
> > Liviu Dudau wrote:
> >
> > > Hi Boris,
> > >
> > > I'm a bit confused, I thought the plan was to separate the
On Wed, Oct 16, 2024 at 03:04:06PM +1100, Alistair Popple wrote:
>
> Matthew Brost writes:
>
> > Add migrate_device_prepoluated_range which prepares an array of
> > pre-populated device pages for migration.
>
> It would be nice if the commit message could also include an explanation
> of why th
On 15-10-24, 17:37, Jyothi Kumar Seerapu wrote:
> When high performance with multiple i2c messages in a single transfer
> is required, employ Block Event Interrupt (BEI) to trigger interrupts
> after specific messages transfer and the last message transfer,
> thereby reducing interrupts.
>
> For e
Create a i915 private plane property for sharing the async supported
modifiers to the user.
UMD related discussion requesting the same
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29618#note_2487123
Signed-off-by: Arun R Murthy
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 6
Hi Matt,
>
> On Fri, Oct 11, 2024 at 07:40:26PM -0700, Vivek Kasireddy wrote:
> > For BOs of type ttm_bo_type_sg, that are backed by PCI BAR addresses
> > associated with a VF, we need to adjust and translate these addresses
> > to LMEM addresses to make the BOs usable by the PF. Otherwise, the B
On Tue, 2024-10-15 at 11:00 -0700, Boqun Feng wrote:
> On Tue, Oct 15, 2024 at 05:27:28PM +0200, Thomas Hellström wrote:
> [..]
> > > diff --git a/lib/locking-selftest.c b/lib/locking-selftest.c
> > > index 6f6a5fc85b42..6750321e3e9a 100644
> > > --- a/lib/locking-selftest.c
> > > +++ b/lib/locking
Hi Jocelyn,
kernel test robot noticed the following build errors:
[auto build test ERROR on 33c255312660653cf54f8019896b5dca28e3c580]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-client-squash-of-drm-client-pending-series/20241011-225715
base: 33c255312660653cf54
Add missing tag for "Wa_14019159160 - Case 2" (for existing
PXP code that ensures run alone mode bit is set to allow
PxP-decryption.
v5: - remove the max IP_VER check since new platforms that
i915 supports needs this fix and tag the caller too
(John Harrison).
v4: - Include IP_VER
Hi Piotr,
At 2024-10-16 04:13:40, "Piotr Zalewski" wrote:
>Hi Andy
>
>On Tuesday, October 15th, 2024 at 2:22 PM, Andy Yan wrote:
>
>> > > > + struct vop2_video_port *vp,
>> > > > + struct drm_crtc *crtc,
>> > > > + struct drm_crtc_state *crtc_state)
>> > > > +{
>> > > > +
>> > > > + if (vop2->l
Hi Piotr,
At 2024-10-15 06:30:27, "Piotr Zalewski" wrote:
>Add support for gamma LUT in VOP2 driver. The implementation was inspired
>by one found in VOP1 driver. Blue and red channels in gamma LUT register
>write were swapped with respect to how gamma LUT values are written in
>VOP1. Gamma LUT p
a27-oliver.s...@intel.com/
Details are as below:
-->
The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20241015/202410151611.f4cd71f2-oliver.s...@intel.com
==
On Wed, Oct 16, 2024 at 10:19:25AM +0800, kernel test robot wrote:
> kernel test robot noticed a -5.1% regression of
> stress-ng.ring-pipe.ops_per_sec
These emails that talk about negative regressions keep confusing me. A negative
regression would be an improvement. But that is not actually wha
Add support for the monochrome Sharp Memory LCDs.
Co-developed-by: Mehdi Djait
Signed-off-by: Mehdi Djait
Signed-off-by: Alex Lanzano
Reviewed-by: Dmitry Baryshkov
Acked-by: Uwe Kleine-König
---
MAINTAINERS | 6 +
drivers/gpu/drm/tiny/Kconfig| 21 +
drivers
Add device tree bindings for the monochrome Sharp Memory LCD
Co-developed-by: Mehdi Djait
Signed-off-by: Mehdi Djait
Signed-off-by: Alex Lanzano
Reviewed-by: Krzysztof Kozlowski
---
.../bindings/display/sharp,ls010b7dh04.yaml | 92 +++
1 file changed, 92 insertions(+)
creat
This patch series add support for the monochrome Sharp Memory LCD
panels. This series is based off of the work done by Mehdi Djait.
References:
https://lore.kernel.org/dri-devel/71a9dbf4609dbba46026a31f60261830163a0b99.1701267411.git.mehdi.dj...@bootlin.com/
https://www.sharpsde.com/fileadmin/prod
Hi Dave,
Am 15.10.24 um 11:32 schrieb Dave Stevenson:
On Mon, 14 Oct 2024 at 22:16, Stefan Wahren wrote:
Am 14.10.24 um 12:54 schrieb Dave Stevenson:
On Mon, 14 Oct 2024 at 10:04, Maxime Ripard wrote:
Hi,
On Sun, Oct 13, 2024 at 09:57:58PM GMT, Stefan Wahren wrote:
Am 13.10.24 um 21:11 s
On Tue, Oct 15, 2024 at 1:32 PM G. Branden Robinson
wrote:
>
> At 2024-10-15T11:38:22-0700, Ian Rogers wrote:
> > When /proc/pid/fdinfo was part of proc.5 man page the indentation made
> > sense. As a standalone man page the indentation doesn't need to be so
> > far over to the right.
> >
> > Sign
Add description of DRM fdinfo information based on the Linux kernel's
`Documentation/gpu/drm-usage-stats.rst`:
https://docs.kernel.org/gpu/drm-usage-stats.html
Signed-off-by: Ian Rogers
---
man/man5/proc_pid_fdinfo.5 | 94 ++
1 file changed, 94 insertions(+)
When /proc/pid/fdinfo was part of proc.5 man page the indentation made
sense. As a standalone man page the indentation doesn't need to be so
far over to the right. Remove the initial tagged pragraph and move the
styling to the initial summary description.
Suggested-by: G. Branden Robinson
Signed-
Make the sections about eventfd, epoll, signalfd, inotify, fanotify,
timerfd better separated with a clearer subsection header.
Signed-off-by: Ian Rogers
---
man/man5/proc_pid_fdinfo.5 | 6 ++
1 file changed, 6 insertions(+)
diff --git a/man/man5/proc_pid_fdinfo.5 b/man/man5/proc_pid_fdinfo
Hi Andy
On Tuesday, October 15th, 2024 at 2:22 PM, Andy Yan wrote:
> > > > + struct vop2_video_port *vp,
> > > > + struct drm_crtc *crtc,
> > > > + struct drm_crtc_state *crtc_state)
> > > > +{
> > > > +
> > > > + if (vop2->lut_regs && crtc_state->color_mgmt_changed) {
> > > > + if (!crtc_state-
On Mon, Oct 14, 2024 at 09:40:13AM +0200, Krzysztof Kozlowski wrote:
> On Sat, Oct 12, 2024 at 01:59:30AM +0530, Akhil P Oommen wrote:
> > Update GPU node to include acd level values.
> >
> > Signed-off-by: Akhil P Oommen
> > ---
> > arch/arm64/boot/dts/qcom/x1e80100.dtsi | 11 ++-
> > 1
GSI hardware generates an interrupt for each transfer completion.
For multiple messages within a single transfer, this results
in receiving N interrupts for N messages, which can introduce
significant software interrupt latency. To mitigate this latency,
utilize Block Event Interrupt (BEI) only whe
The current GPI driver hardcodes the channel TRE (Transfer Ring Element)
size to 64. For scenarios requiring high performance with multiple
messages in a transfer, use Block Event Interrupt (BEI).
This method triggers interrupt after specific message transfers and
the last message transfer, effecti
From: Yonatan Maman
Enabling Peer-to-Peer DMA (P2P DMA) access in GPU-centric applications
is crucial for minimizing data transfer overhead (e.g., for RDMA use-
case).
This change aims to enable that capability for Nouveau over HMM device
private pages. P2P DMA for private device pages allows th
The I2C driver gets an interrupt upon transfer completion.
For multiple messages in a single transfer, N interrupts will be
received for N messages, leading to significant software interrupt
latency. To mitigate this latency, utilize Block Event Interrupt (BEI)
only when an interrupt is necessary.
The I2C driver gets an interrupt upon transfer completion.
For multiple messages in a single transfer, N interrupts will be
received for N messages, leading to significant software interrupt
latency. To mitigate this latency, utilize Block Event Interrupt (BEI)
only when an interrupt is necessary.
From: Yonatan Maman
Add Peer-to-Peer (P2P) DMA request for hmm_range_fault calling,
utilizing capabilities introduced in mm/hmm. By setting
range.default_flags to HMM_PFN_REQ_FAULT | HMM_PFN_REQ_TRY_P2P, HMM
attempts to initiate P2P DMA connections for device private pages
(instead of page fault
From: Yonatan Maman
ATS (Address Translation Services) mainly utilized to optimize PCI
Peer-to-Peer transfers and prevent bus failures. This change employed
ATS usage for ODP memory, to optimize DMA P2P for ODP memory. (e.g DMA
P2P for private device pages - ODP memory).
Signed-off-by: Yonatan M
When high performance with multiple i2c messages in a single transfer
is required, employ Block Event Interrupt (BEI) to trigger interrupts
after specific messages transfer and the last message transfer,
thereby reducing interrupts.
For each i2c message transfer, a series of Transfer Request Eleme
From: Yonatan Maman
hmm_range_fault() natively triggers a page fault on device private
pages, migrating them to RAM. In some cases, such as with RDMA devices,
the migration overhead between the device (e.g., GPU) and the CPU, and
vice-versa, significantly damages performance. Thus, enabling Peer-
When high performance with multiple i2c messages in a single transfer
is required, employ Block Event Interrupt (BEI) to trigger interrupts
after specific messages transfer and the last message transfer,
thereby reducing interrupts.
For each i2c message transfer, a series of Transfer Request Elemen
From: Yonatan Maman
This patch series aims to enable Peer-to-Peer (P2P) DMA access in
GPU-centric applications that utilize RDMA and private device pages. This
enhancement is crucial for minimizing data transfer overhead by allowing
the GPU to directly expose device private page data to devices s
On Tue, Oct 15, 2024 at 09:03:51AM +0200, Boris Brezillon wrote:
> Hi Liviu,
>
> On Tue, 15 Oct 2024 02:08:46 +0100
> Liviu Dudau wrote:
>
> > Hi Boris,
> >
> > I'm a bit confused, I thought the plan was to separate the FW_PAGE_SIZE
> > from the rest of Panthor's PAGE_SIZE.
> >
> > On Mon, Oct
101 - 170 of 170 matches
Mail list logo