From: Bouke Sybren Haarsma
[ Upstream commit 2c71c8459c8ca66bd8f597effaac892ee8448a9f ]
Add quirk orientation for Ayn Loki Max model.
This has been tested by JELOS team that uses their
own patched kernel for a while now and confirmed by
users in the ChimeraOS discord servers.
Signed-off-by: Bo
From: Bouke Sybren Haarsma
[ Upstream commit b86aa4140f6a8f01f35bfb05af60e01a55b48803 ]
Add quirk orientation for the Ayn Loki Zero.
This also has been tested/used by the JELOS team.
Signed-off-by: Bouke Sybren Haarsma
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede
Link:
https://p
Hi Thomas,
These commit logs are nicely explained -- thanks a lot for taking the
time to write each!
A couple nits below.
On Sat, Oct 12, 2024 at 9:53 AM Thomas Böhler wrote:
>
> implementing the same logic itself.
> Clippy complains about this in the `manual_find` lint:
Typically commit messa
From: Hans de Goede
[ Upstream commit d92b90f9a54d9300a6e883258e79f36dab53bfae ]
Replace the fake VLA at end of the vbva_mouse_pointer_shape shape with
a real VLA to fix a "memcpy: detected field-spanning write error" warning:
[ 13.319813] memcpy: detected field-spanning write (size 16896) of
From: Bouke Sybren Haarsma
[ Upstream commit b86aa4140f6a8f01f35bfb05af60e01a55b48803 ]
Add quirk orientation for the Ayn Loki Zero.
This also has been tested/used by the JELOS team.
Signed-off-by: Bouke Sybren Haarsma
Reviewed-by: Hans de Goede
Signed-off-by: Hans de Goede
Link:
https://p
From: Bouke Sybren Haarsma
[ Upstream commit 2c71c8459c8ca66bd8f597effaac892ee8448a9f ]
Add quirk orientation for Ayn Loki Max model.
This has been tested by JELOS team that uses their
own patched kernel for a while now and confirmed by
users in the ChimeraOS discord servers.
Signed-off-by: Bo
From: Gustavo Sousa
[ Upstream commit 7929ffce0f8b9c76cb5c2a67d1966beaed20ab61 ]
According to Bspec, Xe2 steering tables must be used for Xe2_HPM, just
as it is with Xe2_LPM. Update our driver to reflect that.
Bspec: 71186
Reviewed-by: Matt Roper
Signed-off-by: Gustavo Sousa
Reviewed-by: Teja
ing policy
config: i386-randconfig-141-20241012
(https://download.01.org/0day-ci/archive/20241012/202410121939.czrbiako-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20241012/202410121939.czrbiako-...
On 10/4/2024 1:32 PM, Jeffrey Hugo wrote:
From: Pranjal Ramajor Asha Kanojiya
Only for_each_sgtable_dma_sg() should be used to walk through a SG table
to grab correct bus address and length pair after calling DMA MAP API on
a SG table as DMA MAP APIs updates the SG table and for_each_sgtable_sg
There is a possibility of a race condition between interrupt subroutine
which accesses the interrupt related registers to clear the statuses before
handling the interrupt and other functions such as display soft reset,
runtime resume/suspend etc which also access the interrupt related
registers. T
It is possible that dispc_{k2g/k3}_set_irqenable can be called for
disabling some interrupt events which were previously enabled. However
instead of clearing any pending events for the interrupt events that are
required to be disabled, it was instead clearing the new interrupt events
which were not
While reviewing the interrupt related code and register dump, we found couple
of issues related to interrupt related register programming. Firstly, the
function enabling/disabling the interrupts was trying to clear the
interrupts which were not enabled in first place and secondly there is a
potenti
On 10/4/2024 10:40 AM, Jeffrey Hugo wrote:
The ipc_router channel allows AF_QIPCRTR clients and services to
communicate with the AIC100 device. The ipc_router MHI transport layer
expects the channel to be named exactly "IPCR".
Reviewed-by: Carl Vanderlip
Signed-off-by: Jeffrey Hugo
Pushed to
On 10/4/2024 1:52 PM, Jeffrey Hugo wrote:
Add basic support for the new AIC080 product. The PCIe Device ID is
0xa080. AIC080 is a lower cost, lower performance SKU variant of AIC100.
From the qaic perspective, it is the same as AIC100.
Reviewed-by: Troy Hanson
Signed-off-by: Jeffrey Hugo
Pu
On 10/11/24 8:49 AM, Liu Ying wrote:
On 10/11/2024, Marek Vasut wrote:
On 10/10/24 9:15 AM, Liu Ying wrote:
On 10/09/2024, Marek Vasut wrote:
The LDB serializer clock operate at either x7 or x14 rate of the input
Isn't it either x7 or 3.5x?
Is it 3.5 for the dual-link LVDS ?
Yes.
static
On 10/11/24 8:18 AM, Liu Ying wrote:
On 10/11/2024, Marek Vasut wrote:
On 10/10/24 7:22 AM, Liu Ying wrote:
On 10/09/2024, Marek Vasut wrote:
The media_ldb_root_clk supply LDB serializer. These clock are usually
shared with the LCDIFv3 pixel clock and supplied by the Video PLL on
i.MX8MP, but
On 10/12/24 9:35 AM, Liu Ying wrote:
Add a panel-timing node to panel-lvds node to override any fixed
display modes written in a panel driver. This way, 74.25MHz clock
frequency specified in panel-timing node may accommodate 7-fold
519.75MHz "media_ldb" clock which is derived from 1.0395GHz
"vid
On 10/11/24 5:10 AM, Liu Ying wrote:
Hi,
This Video PLL1 configuration since moved to &media_blk_ctrl {} , but it is
still in the imx8mp.dtsi . Therefore, to make your panel work at the correct
desired pixel clock frequency instead of some random one inherited from
imx8mp.dtsi, add the follo
On 10/12/24 9:35 AM, Liu Ying wrote:
Add a panel-timing node to panel node to override any fixed display
modes written in a panel driver. This way, 68.9MHz clock frequency
specified in panel-timing node may accommodate 7-fold 482.3MHz
"media_ldb" clock which is derived from 964.6MHz "video_pll1"
On 10/9/24 11:12, Maíra Canal wrote:
Although I don't hold expertise on the display side of VC4, I'd like to
help reviewing patches that are related to the 3D side of the VC4 driver.
As V3D maintainer, I hold some expertise with Broadcom GPUs and I'm
constantly testing kernels on RPi 3-5.
Signed
On Tue, 3 Sep 2024 11:22:30 -0400, Detlev Casanova wrote:
> Add the rk3576-armsom-sige5 device tree as well as its rk3576.dtsi base
> and pinctrl information in rk3576-pinctrl.dtsi.
>
> The other commits add DT bindings documentation for the devices that
> already work with the current correspondi
Rust allows initializing fields of a struct without specifying the
attribute that is assigned if the variable has the same name. In this
instance this is done for all other attributes of the struct except for
`data`.
Remove the redundant `data` in the assignment to be consistent.
Reported-by: Migu
Add basic HDMI video output support. Currently, only RGB888 output
pixel format is supported. At the LVDS input side, the driver
supports single LVDS link and dual LVDS links with "jeida-24" LVDS
mapping.
Product link:
https://www.ite.com.tw/en/product/cate1/IT6263
Signed-off-by: Liu Ying
---
v
Document ITE IT6263 LVDS to HDMI converter.
Product link:
https://www.ite.com.tw/en/product/cate1/IT6263
Signed-off-by: Liu Ying
---
v2:
* Document number of LVDS link data lanes. (Biju)
* Simplify ports property by dropping "oneOf". (Rob)
.../bindings/display/bridge/ite,it6263.yaml | 276
Hi,
This patch series aims to add ITE IT6263 LVDS to HDMI converter on
i.MX8MP EVK. Combined with LVDS receiver and HDMI 1.4a transmitter,
the IT6263 supports LVDS input and HDMI 1.4 output by conversion
function. IT6263 product link can be found at [1].
Patch 1&2 are preparation patches to all
Add a panel-timing node to panel-lvds node to override any fixed
display modes written in a panel driver. This way, 74.25MHz clock
frequency specified in panel-timing node may accommodate 7-fold
519.75MHz "media_ldb" clock which is derived from 1.0395GHz
"video_pll1" clock.
This should suppress t
Add a panel-timing node to panel node to override any fixed display
modes written in a panel driver. This way, 68.9MHz clock frequency
specified in panel-timing node may accommodate 7-fold 482.3MHz
"media_ldb" clock which is derived from 964.6MHz "video_pll1" clock.
The above clock frequencies ali
Multiple display modes could be read from a display device's EDID.
Use clk_round_rate() to validate the "ldb" clock rate for each mode
in drm_bridge_funcs::mode_valid() to filter unsupported modes out.
Also, since this driver doesn't directly reference pixel clock, use
clk_round_rate() to validate
The next bridge in bridge chain could be a panel bridge or a non-panel
bridge. Use devm_drm_of_get_bridge() to replace the combination
function calls of of_drm_find_panel() and devm_drm_panel_bridge_add()
to get either a panel bridge or a non-panel bridge, instead of getting
a panel bridge only.
One ITE IT6263 LVDS to HDMI converter is populated on NXP IMX-LVDS-HDMI
and IMX-DLVDS-HDMI adapter cards.
Card IMX-LVDS-HDMI supports single LVDS link(IT6263 link1).
Card IMX-DLVDS-HDMI supports dual LVDS links(IT6263 link1 and link2).
Only one card can be enabled with one i.MX8MP EVK.
Add dedic
Add myself as the maintainer of ITE IT6263 LVDS TO HDMI BRIDGE DRIVER.
Signed-off-by: Liu Ying
---
v2:
* New patch. (Maxime)
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a097afd76ded..3ce9ab8327e9 100644
--- a/MAINTAINERS
+++ b/MAINTAI
ITE IT6263 LVDS to HDMI converter is populated on NXP IMX-LVDS-HDMI
and IMX-DLVDS-HDMI adapter cards. The adapter cards can connect to
i.MX8MP EVK base board to support video output through HDMI connectors.
Build the ITE IT6263 driver as a module.
Signed-off-by: Liu Ying
---
v2:
* No change.
a
On Sat, Oct 12, 2024 at 03:35:39PM +0800, Liu Ying wrote:
> Document ITE IT6263 LVDS to HDMI converter.
>
> Product link:
> https://www.ite.com.tw/en/product/cate1/IT6263
>
> Signed-off-by: Liu Ying
> ---
> v2:
> * Document number of LVDS link data lanes. (Biju)
> * Simplify ports property by d
On 11.10.2024 16:41, Thomas Zimmermann wrote:
> Include directly to get of_property_read_string_index().
> Avoids the proxy include via
>
> Signed-off-by: Thomas Zimmermann
> Cc: "Noralf Trønnes"
> ---
Reviewed-by: Noralf Trønnes
On Sat, Oct 12, 2024 at 03:35:40PM +0800, Liu Ying wrote:
> Add basic HDMI video output support. Currently, only RGB888 output
> pixel format is supported. At the LVDS input side, the driver
> supports single LVDS link and dual LVDS links with "jeida-24" LVDS
> mapping.
>
> Product link:
> https:
On Fri, Oct 11, 2024 at 03:02:56PM +0300, Tomi Valkeinen wrote:
> Hi,
>
> On 23/09/2024 15:25, Dmitry Baryshkov wrote:
>
> > > As Dmitry asked me during Plumbers to revalidate if our setup still
> > > needs patch 2, I just did that over 6.11.0-next-20240923 (where patch 1
> > > is now included).
On Sat, 15 Jun 2024 20:53:29 +0300, Dmitry Baryshkov wrote:
> While porting lt9611 DSI-to-HDMI bridge driver to use HDMI Connector
> framework, I stumbled upon an issue while handling the Audio InfoFrames.
> The HDMI codec callbacks weren't receiving the drm_atomic_state, so
> there was no simple w
On Sat, Oct 12, 2024 at 03:35:37PM +0800, Liu Ying wrote:
> The next bridge in bridge chain could be a panel bridge or a non-panel
> bridge. Use devm_drm_of_get_bridge() to replace the combination
> function calls of of_drm_find_panel() and devm_drm_panel_bridge_add()
> to get either a panel bridg
On 10/12/2024, Dmitry Baryshkov wrote:
> On Sat, Oct 12, 2024 at 03:35:39PM +0800, Liu Ying wrote:
>> Document ITE IT6263 LVDS to HDMI converter.
>>
>> Product link:
>> https://www.ite.com.tw/en/product/cate1/IT6263
>>
>> Signed-off-by: Liu Ying
>> ---
>> v2:
>> * Document number of LVDS link data
On 10/12/2024, Dmitry Baryshkov wrote:
> On Sat, Oct 12, 2024 at 03:35:40PM +0800, Liu Ying wrote:
>> Add basic HDMI video output support. Currently, only RGB888 output
>> pixel format is supported. At the LVDS input side, the driver
>> supports single LVDS link and dual LVDS links with "jeida-24"
ing policy
config: sparc64-randconfig-r073-20241012
(https://download.01.org/0day-ci/archive/20241012/202410121817.hue5mn9d-...@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 14.1.0
reproduce (this is a W=1 build):
(https://download.01.org/0day-ci/archive/20241012/202410121817.hue5mn9d-...
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