From: Arnd Bergmann
The added lvds driver and a change in the dsi driver resulted in failed
builds when COMMON_CLK is disabled:
x86_64-linux-ld: drivers/gpu/drm/stm/dw_mipi_dsi-stm.o: in function
`dw_mipi_dsi_stm_remove':
dw_mipi_dsi-stm.c:(.text+0x51e): undefined reference to `clk_hw_unregiste
Hi,
Here's this week drm-misc-next-fixes PR
Thanks!
Maxime
drm-misc-next-fixes-2024-07-19:
Two fixes for v3d to fix an array indexing on newer V3D revisions.
The following changes since commit c537fb4e3d36e7cd1a0837dd577cd30d3d64f1bc:
drm/qxl: Pin buffer objects for internal mappings (2024-07
https://bugzilla.kernel.org/show_bug.cgi?id=201497
--- Comment #36 from Rev (r...@pop.ms) ---
I still get around 700 error logs per day on my 24/7 PC.
amdgpu :06:00.0: [drm] *ERROR* No EDID read.
I am using the standard-kernel of ubuntu 24.04 LTS now (6.8.0-36-generic), with
the standard me
On 21/06/2024 14:44, Mark Brown wrote:
On Wed, Jun 19, 2024 at 04:46:48PM +0200, amerg...@baylibre.com wrote:
+ /* gain default values*/
+ regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
MT6357_AUDPREAMPLGAIN_MASK,
+ UL_GAIN_0DB << MT6357_AUDPRE
Why cannot max values be defined as ((2 ^ mnd_width) - 1) and ((2 ^
hid_width) - 1)?
вт, 18 июн. 2024 г. в 22:12, Konrad Dybcio :
>
>
>
> On 6/18/24 20:55, Dmitry Baryshkov wrote:
> > On Tue, Jun 18, 2024 at 08:50:52PM GMT, Konrad Dybcio wrote:
> >>
> >>
> >> On 6/18/24 19:50, Dmitry Baryshkov wro
Am 18.07.24 um 18:58 schrieb Danilo Krummrich:
Calling nouveau_bo_ref() on a nouveau_bo without initializing it (and
hence the backing ttm_bo) leads to a refcount underflow.
Instead of calling nouveau_bo_ref() in the unwind path of
drm_gem_object_init(), clean things up manually.
Fixes: ab9ccb9
For user PD initialization, initmem is allocated and sent to DSP for
initial memory requirements like shell loading. This size is the shell
size that is passed by user space and is checked against a max size.
For unsigned PD offloading requirement, additional memory is required
because of addition
Il 19/07/24 10:42, CK Hu (胡俊光) ha scritto:
Hi, Angelo:
On Thu, 2024-07-18 at 13:23 +0200, AngeloGioacchino Del Regno wrote:
Il 18/07/24 13:10, Daniel Stone ha scritto:
Hi all,
On Thu, 18 Jul 2024 at 11:24, AngeloGioacchino Del Regno
wrote:
Il 18/07/24 11:27, Fei Shao ha scritto:
This match
From: Tvrtko Ursulin
Long time ago in commit b3ac17667f11 ("drm/scheduler: rework entity
creation") a change was made which prevented priority changes for entities
with only one assigned scheduler.
The commit reduced drm_sched_entity_set_priority() to simply update the
entities priority, but the
On 17/07/2024 10:48, Jocelyn Falempe wrote:
When proposing to enable DRM_PANIC on Fedora, some users raised concern about
the need to disable VT_CONSOLE.
So this is my new attempt to avoid fbcon/vt_console to overwrite the panic
screen.
This time it doesn't involve any locking, so it should
From: Arnd Bergmann
Compile-testing with CONFIG_MMU disabled causes a link error in omapdrm:
arm-linux-gnueabi-ld: drivers/gpu/drm/omapdrm/omap_gem.o: in function
`omap_gem_fault_2d':
omap_gem.c:(.text+0x36e): undefined reference to `vmf_insert_mixed'
arm-linux-gnueabi-ld: drivers/gpu/drm/omapd
/drm/msm/adreno/a6xx_gpu.h | 2 +
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 13 +++-
5 files changed, 164 insertions(+), 35 deletions(-)
---
base-commit: 797012914d2d031430268fe512af0ccd7d8e46ef
change-id: 20240719-topic-a621-b5e83f79b4f7
Best regards,
--
Konrad Dybcio
A650 family includes A660 family (they've got a big family), A650
itself, and some more A6XX_GEN3 SKUs, all of which should fall into
the same branch of the if-condition. Simplify that.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 3 +--
1 file changed, 1 insertion(+)
The if-else monster is so unmaintainable that one case is repeated
twice. Get rid of it.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 14 ++
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 24 +---
drivers/gpu/drm/msm/adreno/a6xx_gpu.h
This was apparently almost never set on a6xx.. move the existing values
and fill out the remaining ones within the catalog.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 19 ++-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 6 ++
drivers/gpu/drm/
A621 is a clear A662 derivative (same lineage as A650), no explosions
or sick features, other than a NoC bug which can stall the GPU..
Add support for it.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 78 ++-
drivers/gpu/drm/msm/adreno/
This was apparently never done before.. Program the expected values.
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 18 ++
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 8 +++-
2 files changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/gp
On Fri, Jul 19, 2024 at 02:27:08PM GMT, Ekansh Gupta wrote:
> For user PD initialization, initmem is allocated and sent to DSP for
> initial memory requirements like shell loading. This size is the shell
> size that is passed by user space and is checked against a max size.
> For unsigned PD offlo
From: Arnd Bergmann
Multiple files in amdgpu call amdgpu_ucode_request() with a fw_name
variable that the compiler cannot check for being a valid format string,
as seen by enabling the (default-disabled) -Wformat-security option:
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c: In function
'amdgpu_mes_
Add TTM_TT_FLAG_CLEARED_ON_FREE, which DRM drivers can set before
releasing backing stores if they want to skip clear-on-free.
Cc: Matthew Auld
Cc: Thomas Hellström
Suggested-by: Christian König
Signed-off-by: Nirmoy Das
Reviewed-by: Christian König
---
drivers/gpu/drm/ttm/ttm_pool.c | 18 ++
Parameterize clearing ccs and bo data in xe_migrate_clear() which higher
layers can utilize. This patch will be used later on when doing bo data
clear for igfx as well.
v2: Replace multiple params with flags in xe_migrate_clear (Matt B)
v3: s/CLEAR_BO_DATA_FLAG_*/XE_MIGRATE_CLEAR_FLAG_* and move
On LNL because of flat CCS, driver creates a migrate job to clear
CCS meta data. Extend that to also clear system pages using GPU.
Inform TTM to allocate pages without __GFP_ZERO to avoid double page
clearing by clearing out TTM_TT_FLAG_ZERO_ALLOC flag and set
TTM_TT_FLAG_CLEARED_ON_FREE while free
Hi,
On Wed, Jul 17, 2024 at 10:48:39AM +0200, Jocelyn Falempe wrote:
> It allows to check if the drm device supports drm_panic.
> Prepare the work to have better integration with fbcon and vtconsole.
>
> Signed-off-by: Jocelyn Falempe
> ---
> drivers/gpu/drm/drm_panic.c | 20 +++
On 19/07/2024 12:18, Imre Deak wrote:
Hi,
On Wed, Jul 17, 2024 at 10:48:39AM +0200, Jocelyn Falempe wrote:
It allows to check if the drm device supports drm_panic.
Prepare the work to have better integration with fbcon and vtconsole.
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/drm
On Thu, 2023-11-16 at 15:15 +0100, Christian König wrote:
> Start to improve the scheduler document. Especially document the
> lifetime of each of the objects as well as the restrictions around
> DMA-fence handling and userspace compatibility.
Hallo Christian,
thanks for working on this.
I'm cur
On 17/07/2024 16:02, Paneer Selvam, Arunpravin wrote:
On 7/16/2024 3:34 PM, Matthew Auld wrote:
On 16/07/2024 10:50, Paneer Selvam, Arunpravin wrote:
Hi Matthew,
On 7/10/2024 6:20 PM, Matthew Auld wrote:
On 10/07/2024 07:03, Paneer Selvam, Arunpravin wrote:
Thanks Alex.
Hi Matthew,
Any co
This breaks build if DRM_PANIC is not enabled.
Fixes: de338c754d40 ("drm/panic: Add missing static inline to
drm_panic_is_enabled()")
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/drm_crtc_internal.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_cr
On 7/12/24 15:14, Yannick Fertre wrote:
> The reload interrupt is not used by the driver. To avoid
> unnecessary calls of the interrupt routine, don't enable it.
> Solve small typo and add mask to simplify the driver.
>
> Signed-off-by: Yannick Fertre
Hi Yannick,
Applied on drm-misc-next.
Th
On 7/12/24 15:14, Yannick Fertre wrote:
> The purpose of this mask is to simplify writing to the lxcr
> register and not to forget any fields.
>
> Signed-off-by: Yannick Fertre
Hi Yannick,
Applied on drm-misc-next.
Thanks,
Raphaël
On 7/12/24 15:13, Yannick Fertre wrote:
> The plane's opacity should be reseted while the plane
> is disabled. It prevents from seeing a possible global
> or layer background color set earlier.
>
> Signed-off-by: Yannick Fertre
Hi Yannick,
Applied on drm-misc-next.
Thanks,
Raphaël
When the bridge is powered off, disable the IRQ until the next power on
to workaround an interrupt storm on some badly-designed hardware.
Signed-off-by: Pin-yen Lin
---
drivers/gpu/drm/bridge/ite-it6505.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/dri
On 7/19/24 09:54, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The added lvds driver and a change in the dsi driver resulted in failed
> builds when COMMON_CLK is disabled:
>
> x86_64-linux-ld: drivers/gpu/drm/stm/dw_mipi_dsi-stm.o: in function
> `dw_mipi_dsi_stm_remove':
> dw_mipi_dsi-stm.c:
On Fri, Jul 19, 2024 at 12:36:08PM +0200, Jocelyn Falempe wrote:
> This breaks build if DRM_PANIC is not enabled.
>
> Fixes: de338c754d40 ("drm/panic: Add missing static inline to
> drm_panic_is_enabled()")
> Signed-off-by: Jocelyn Falempe
Thanks for the quick fix:
Reviewed-by: Imre Deak
> --
On Fri, Jul 19, 2024 at 02:39:11PM +0300, Imre Deak wrote:
> On Fri, Jul 19, 2024 at 12:36:08PM +0200, Jocelyn Falempe wrote:
> > This breaks build if DRM_PANIC is not enabled.
> >
> > Fixes: de338c754d40 ("drm/panic: Add missing static inline to
> > drm_panic_is_enabled()")
The fix is actually
Am 19.07.24 um 12:29 schrieb Philipp Stanner:
On Thu, 2023-11-16 at 15:15 +0100, Christian König wrote:
Start to improve the scheduler document. Especially document the
lifetime of each of the objects as well as the restrictions around
DMA-fence handling and userspace compatibility.
Hallo Chris
On Fri, Jul 19, 2024 at 02:43:27PM +0300, Imre Deak wrote:
> On Fri, Jul 19, 2024 at 02:39:11PM +0300, Imre Deak wrote:
> > On Fri, Jul 19, 2024 at 12:36:08PM +0200, Jocelyn Falempe wrote:
> > > This breaks build if DRM_PANIC is not enabled.
> > >
> > > Fixes: de338c754d40 ("drm/panic: Add missing
On 19/07/2024 14:01, Imre Deak wrote:
On Fri, Jul 19, 2024 at 02:43:27PM +0300, Imre Deak wrote:
On Fri, Jul 19, 2024 at 02:39:11PM +0300, Imre Deak wrote:
On Fri, Jul 19, 2024 at 12:36:08PM +0200, Jocelyn Falempe wrote:
This breaks build if DRM_PANIC is not enabled.
Fixes: de338c754d40 ("
This breaks build if DRM_PANIC is not enabled.
Also add the missing include drm_crtc_internal.h in drm_panic.c
Fixes: 9f774c42a908 ("drm/panic: Add drm_panic_is_enabled()")
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/drm_crtc_internal.h | 2 +-
drivers/gpu/drm/drm_panic.c | 2 ++
SDM845 has "General Purpose" clocks that can be muxed to
SoC pins to clock various external devices.
Those clocks may be used as e.g. PWM sources for external peripherals.
GPCLK can in theory have arbitrary value depending on the use case, so
the concept of frequency tables, used in rcg2 clock dri
Am 19.07.24 um 11:47 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Long time ago in commit b3ac17667f11 ("drm/scheduler: rework entity
creation") a change was made which prevented priority changes for entities
with only one assigned scheduler.
The commit reduced drm_sched_entity_set_priority()
On 16/07/2024 21:11, Adrián Larumbe wrote:
> Enable calculations of job submission times in clock cycles and wall
> time. This is done by expanding the boilerplate command stream when running
> a job to include instructions that compute said times right before an after
> a user CS.
>
> Those numbe
On 16/07/2024 21:11, Adrián Larumbe wrote:
> Drawing from the FW-calculated values in the previous commit, we can
> increase the numbers for an open file by collecting them from finished jobs
> when updating their group synchronisation objects.
>
> Display of fdinfo key-value pairs is governed by
On 16/07/2024 21:11, Adrián Larumbe wrote:
> Implement drm object's status callback.
>
> Also, we consider a PRIME imported BO to be resident if its matching
> dma_buf has an open attachment, which means its backing storage had already
> been allocated.
>
> Signed-off-by: Adrián Larumbe
> Review
On 16/07/2024 21:11, Adrián Larumbe wrote:
> This commit introduces a DRM device sysfs attribute that lets UM control
> the job accounting status in the device. The knob variable had been brought
> in as part of a previous commit, but now we're able to fix it manually.
>
> Signed-off-by: Adrián La
Am 19.07.24 um 15:02 schrieb Christian König:
Am 19.07.24 um 11:47 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Long time ago in commit b3ac17667f11 ("drm/scheduler: rework entity
creation") a change was made which prevented priority changes for
entities
with only one assigned scheduler.
Th
When the kmsg_dumper callback parameter changed, the reason variable
in mtdoops_do_dump() was not updated accordingly.
This breaks the build with mtdoops.
Fixes: e1a261ba599e ("printk: Add a short description string to kmsg_dump()")
Reported-by: Knop Ryszard
Signed-off-by: Jocelyn Falempe
---
T
On 19.07.2024 14:20, Jocelyn Falempe wrote:
> This breaks build if DRM_PANIC is not enabled.
> Also add the missing include drm_crtc_internal.h in drm_panic.c
>
> Fixes: 9f774c42a908 ("drm/panic: Add drm_panic_is_enabled()")
> Signed-off-by: Jocelyn Falempe
> ---
> drivers/gpu/drm/drm_crtc_in
On 19/07/2024 17:28, Michal Wajdeczko wrote:
On 19.07.2024 14:20, Jocelyn Falempe wrote:
This breaks build if DRM_PANIC is not enabled.
Also add the missing include drm_crtc_internal.h in drm_panic.c
Fixes: 9f774c42a908 ("drm/panic: Add drm_panic_is_enabled()")
Signed-off-by: Jocelyn Falem
This code was never updated to support Screen Targets.
Fixes a bug where Xv playback displays a green screen instead of actual
video contents when 3D acceleration is disabled in the guest.
Fixes: c8261a961ece ("vmwgfx: Major KMS refactoring / cleanup in preparation of
screen targets")
Reported-by
On Thu, Jul 18, 2024 at 11:22 AM Zack Rusin wrote:
> +bool vmw_user_object_is_mapped(struct vmw_user_object *uo)
> +{
> + struct vmw_bo *bo;
> +
> + if (!uo || vmw_user_object_is_null(uo))
> + return false;
> +
> + bo = vmw_user_object_buffer(uo);
> + WARN_ON
Hi,
On Wed, Jul 17, 2024 at 3:07 AM Dmitry Baryshkov
wrote:
>
> > > However it might be better to go other way arround.
> > > Do we want for all the drivers to migrate to _multi()-kind of API? If
> > > so, what about renaming the multi and non-multi functions accordingly
> > > and making the old
Hi,
On Thu, Jul 18, 2024 at 7:59 AM Doug Anderson wrote:
>
> Hi,
>
> On Thu, Jul 18, 2024 at 7:56 AM Conor Dooley wrote:
> >
> > On Thu, Jul 18, 2024 at 07:45:57AM -0700, Doug Anderson wrote:
> > > Hi,
> > >
> > > On Wed, Jul 17, 2024 at 11:19 PM Krzysztof Kozlowski
> > > wrote:
> > > >
> > >
On Fri, Jul 19, 2024 at 09:50:04AM GMT, Ashutosh Dixit wrote:
On Mon, 17 Jun 2024 18:45:57 -0700, Ashutosh Dixit wrote:
Folks,
The below is just an example from one of the earlier OA patches (already
merged):
[PATCH 05/17] drm/xe/oa/uapi: Add/remove OA config perf ops
+static ssize_t show
On Fri, Jul 19, 2024 at 05:18:05PM +0200, Christian König wrote:
> Am 19.07.24 um 15:02 schrieb Christian König:
> > Am 19.07.24 um 11:47 schrieb Tvrtko Ursulin:
> > > From: Tvrtko Ursulin
> > >
> > > Long time ago in commit b3ac17667f11 ("drm/scheduler: rework entity
> > > creation") a change wa
Hi,
On Tue, Jul 16, 2024 at 5:11 AM Zhaoxiong Lv
wrote:
>
> The current driver can only obtain the porch parameters
> of boe-th101mb31ig002. Modify it to obtain the porch
> parameters of the panel currently being used.
>
> Fixes: 24179ff9a2e4524 ("drm/panel: boe-th101mb31ig002 : Make it compatibl
This patchset introduces a new Linux Kernel Driver, amdxdna for AMD NPUs.
The driver is based on Linux accel subsystem.
NPU (Neural Processing Unit) is an AI inference accelerator integrated
into AMD client CPUs. NPU enables efficient execution of Machine Learning
applications like CNNs, LLMs, etc
The AI Engine consists of 2D array of tiles arranged as columns. The
resource solver provides the interfaces to manage allocation of the tile
columns for a hardware context. The basic column allocation and release
functions are provided.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-b
There different types of BOs are supported:
- shmem
A user application uses shmem BOs as input/output for its workload running
on NPU.
- device memory heap
The fixed size buffer dedicated to the device.
- device buffer
The buffer object allocated from device memory heap.
- command buffer
The bu
AMD AI Engine forms the core of AMD NPU and can be used for accelerating
machine learning applications.
Add the driver to support AI Engine integrated to AMD CPU.
Only very basic functionalities are added.
- module and PCI device initialization
- firmware load
- power up
- low level hardwa
The hardware can be shared among multiple user applications. The
hardware resources are allocated/freed based on the request from
user application via driver IOCTLs.
DRM_IOCTL_AMDXDNA_CREATE_HWCTX
Allocate tile columns and create a hardware context structure to track the
usage and status of the re
Add interfaces for user application to submit command and wait for its
completion.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_ctx.c | 618 ++-
drivers/accel/amdxdna/aie2_message.c | 341 +++
driv
The hardware mailboxes are used by the driver to submit requests to
firmware and receive the completion notices from hardware.
Initially, a management mailbox channel is up and running. The driver may
request firmware to create/destroy more channels dynamically through
management channel.
Add dri
Implement PCI power management suspend and resume callbacks.
Co-developed-by: Narendra Gutta
Signed-off-by: Narendra Gutta
Co-developed-by: Xiaoming Ren
Signed-off-by: Xiaoming Ren
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_ctx.c
When there is a hardware error, the NPU firmware notifies the host through
a mailbox message. The message includes details of the error, such as the
tile and column indexes where the error occurred.
The driver starts a thread to handle the NPU error message. The thread
stops the clients which are
Add GET_INFO ioctl to retrieve hardware information, including
AIE, clock, hardware context etc.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_message.c | 65
drivers/accel/amdxdna/aie2_pci.c | 221 ++
User application may allocate a debug buffer and attach it to an NPU
context through the driver. Then the NPU firmware prints its debug
information to this buffer for debugging.
Co-developed-by: Min Ma
Signed-off-by: Min Ma
Signed-off-by: Lizhi Hou
---
drivers/accel/amdxdna/aie2_ctx.c| 45
On 19.07.2024 17:37, Jocelyn Falempe wrote:
>
>
> On 19/07/2024 17:28, Michal Wajdeczko wrote:
>>
>>
>> On 19.07.2024 14:20, Jocelyn Falempe wrote:
>>> This breaks build if DRM_PANIC is not enabled.
>>> Also add the missing include drm_crtc_internal.h in drm_panic.c
>>>
>>> Fixes: 9f774c42a908
From: Rob Clark
The Samsung ATNA45DC02 panel is an AMOLED eDP panel, similar to the
existing ATNA45AF01 and ATNA33XC20 panel but with a higher resolution.
Signed-off-by: Rob Clark
---
.../devicetree/bindings/display/panel/samsung,atna33xc20.yaml | 4
1 file changed, 4 insertions(+)
diff
On Fri, Jul 19, 2024 at 10:07:29AM -0700, Doug Anderson wrote:
> Hi,
>
> On Thu, Jul 18, 2024 at 7:59 AM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Thu, Jul 18, 2024 at 7:56 AM Conor Dooley wrote:
> > >
> > > On Thu, Jul 18, 2024 at 07:45:57AM -0700, Doug Anderson wrote:
> > > > Hi,
> > > >
> >
…
> +++ b/drivers/accel/amdxdna/amdxdna_pci_drv.c
> @@ -0,0 +1,118 @@
…
> +static int amdxdna_probe(struct pci_dev *pdev, const struct pci_device_id
> *id)
> +{
…
> + mutex_lock(&xdna->dev_lock);
> + ret = xdna->dev_info->ops->init(xdna);
> + mutex_unlock(&xdna->dev_lock);
…
Under whi
…
> +++ b/drivers/accel/amdxdna/amdxdna_mailbox.c
> @@ -0,0 +1,582 @@
…
> +static int mailbox_acquire_msgid(struct mailbox_channel *mb_chann, struct
> mailbox_msg *mb_msg)
> +{
…
> + spin_lock_irqsave(&mb_chann->chan_idr_lock, flags);
> + msg_id = idr_alloc_cyclic(&mb_chann->chan_idr, mb_m
On 7/19/24 12:42, Markus Elfring wrote:
…
+++ b/drivers/accel/amdxdna/amdxdna_pci_drv.c
@@ -0,0 +1,118 @@
…
+static int amdxdna_probe(struct pci_dev *pdev, const struct pci_device_id *id)
+{
…
+ mutex_lock(&xdna->dev_lock);
+ ret = xdna->dev_info->ops->init(xdna);
+ mutex
…
> +++ b/drivers/accel/amdxdna/aie2_pci.c
> @@ -0,0 +1,182 @@
…
> +static int aie2_init(struct amdxdna_dev *xdna)
> +{
…
> + release_firmware(fw);
> + return 0;
I find the following statements more appropriate here
(so that a bit of redundant code can be avoided).
ret = 0;
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
The function msm_framebuffer_iova() can not fail, it always returns a
valid address. Drop the useless checks (that were already performed at
the time) and make dpu_format_populate_addrs() return void.
Signed-off-by: Dmitry Baryshkov
---
.../gpu
On 7/17/2024 3:09 PM, Dmitry Baryshkov wrote:
On Wed, 17 Jul 2024 at 23:15, Abhinav Kumar wrote:
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
The struct dpu_hw_fmt_layout defines hardware data layout (addresses,
sizes and pitches. Drop format field from this structure as it's not a
Mis
On 19/07/2024 20:26, Michal Wajdeczko wrote:
On 19.07.2024 17:37, Jocelyn Falempe wrote:
On 19/07/2024 17:28, Michal Wajdeczko wrote:
On 19.07.2024 14:20, Jocelyn Falempe wrote:
This breaks build if DRM_PANIC is not enabled.
Also add the missing include drm_crtc_internal.h in drm_pani
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
Move the call to dpu_format_populate_plane_sizes() to the atomic_check
step, so that any issues with the FB layout can be reported as early as
possible.
At the same time move the call to dpu_format_populate_addrs() to
dpu_plane_sspp_atomic_update(
On Fri, 19 Jul 2024 10:26:20 -0700, Lucas De Marchi wrote:
>
> On Fri, Jul 19, 2024 at 09:50:04AM GMT, Ashutosh Dixit wrote:
> > On Mon, 17 Jun 2024 18:45:57 -0700, Ashutosh Dixit wrote:
> >>
> >
> > Folks,
> >
> > The below is just an example from one of the earlier OA patches (already
> > merged)
Hello Stefan Schake,
Commit 766cc6b1f7fc ("drm/vc4: Add CTM support") from Apr 20, 2018
(linux-next), leads to the following Smatch static checker warning:
drivers/gpu/drm/vc4/vc4_kms.c:555 vc4_ctm_atomic_check()
warn: reusing outside iterator: 'i'
drivers/gpu/drm/vc4/vc4_kms.c
On 7/19/2024 9:36 AM, Ian Forbes wrote:
> This code was never updated to support Screen Targets.
> Fixes a bug where Xv playback displays a green screen instead of actual
> video contents when 3D acceleration is disabled in the guest.
>
> Fixes: c8261a961ece ("vmwgfx: Major KMS refactoring / clean
Memory intensive applications(which requires more tha 4GB) that wants
to offload tasks to DSP might have to split the tasks to multiple
user PD to make the resources available.
For every call to DSP, fastrpc driver passes the process tgid which
works as an identifier for the DSP to enqueue the tas
On 7/19/24 10:29 PM, Doug Anderson wrote:
> Hi,
>
> On Wed, Jul 17, 2024 at 3:07 AM Dmitry Baryshkov
> wrote:
>>
However it might be better to go other way arround.
Do we want for all the drivers to migrate to _multi()-kind of API? If
so, what about renaming the multi and non-mu
…
> +++ b/drivers/accel/amdxdna/aie2_pci.c
> @@ -0,0 +1,182 @@
…
> +static int aie2_init(struct amdxdna_dev *xdna)
> +{
…
> + const struct firmware *fw;
I suggest to take another software design option better into account
also according to the application of scope-based resource management.
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