Am 12.07.24 um 04:14 schrieb Huan Yang:
在 2024/7/12 9:59, Huan Yang 写道:
Hi Christian,
在 2024/7/11 19:39, Christian König 写道:
Am 11.07.24 um 11:18 schrieb Huan Yang:
Hi Christian,
Thanks for your reply.
在 2024/7/11 17:00, Christian König 写道:
Am 11.07.24 um 09:42 schrieb Huan Yang:
Some use
Hi Marek,
> >> Thank you for testing and keeping up with this. I will wait for more
> >> feedback if there is any (Frieder? Lucas? Michael?). If there are no
> >> objections, then I can merge it in a week or two ?
> >
> > I'll try to use your approach on the tc358775. Hopefully, I'll find
> > som
Hi Christian,
在 2024/7/12 15:10, Christian König 写道:
Am 12.07.24 um 04:14 schrieb Huan Yang:
在 2024/7/12 9:59, Huan Yang 写道:
Hi Christian,
在 2024/7/11 19:39, Christian König 写道:
Am 11.07.24 um 11:18 schrieb Huan Yang:
Hi Christian,
Thanks for your reply.
在 2024/7/11 17:00, Christian König
On 11/07/2024 23:00, Alice Ryhl wrote:
On Wed, Jul 10, 2024 at 4:01 PM Jocelyn Falempe wrote:
This patch adds a new panic screen, with a QR code and the kmsg data
embedded.
If DRM_PANIC_SCREEN_QR_CODE_URL is set, then the kmsg data will be
compressed with zlib and encoded as a numerical seg
On Thu, Jul 11, 2024 at 01:27:23PM -0600, Jeffrey Hugo wrote:
> On 7/11/2024 12:19 PM, Jeff Johnson wrote:
> > On 6/28/24 20:14, Jeff Johnson wrote:
> > > On 6/15/2024 2:01 PM, Jeff Johnson wrote:
> > > > With ARCH=powerpc, make allmodconfig && make W=1 C=1 reports:
> > > > WARNING: modpost: missin
Am 12.07.24 um 09:29 schrieb Huan Yang:
Hi Christian,
在 2024/7/12 15:10, Christian König 写道:
Am 12.07.24 um 04:14 schrieb Huan Yang:
在 2024/7/12 9:59, Huan Yang 写道:
Hi Christian,
在 2024/7/11 19:39, Christian König 写道:
Am 11.07.24 um 11:18 schrieb Huan Yang:
Hi Christian,
Thanks for your r
在 2024/7/12 15:41, Christian König 写道:
Am 12.07.24 um 09:29 schrieb Huan Yang:
Hi Christian,
在 2024/7/12 15:10, Christian König 写道:
Am 12.07.24 um 04:14 schrieb Huan Yang:
在 2024/7/12 9:59, Huan Yang 写道:
Hi Christian,
在 2024/7/11 19:39, Christian König 写道:
Am 11.07.24 um 11:18 schrieb Hu
Some ARM SOCs have a separate display controller and GPU, each with
different drivers. For mediatek mt8173, the GPU driver is powervr,
and the display driver is mediatek. In the case of mediatek mt8183,
the GPU driver is panfrost, and the display driver is mediatek.
With rockchip rk3288/rk3399, the
Enable CONFIG_DRM_ANALOGIX_ANX7625 in the arm64 defconfig to get
display driver probed on the mt8183-kukui-jacuzzi-juniper machine.
arch/arm64/configs/defconfig has CONFIG_DRM_ANALOGIX_ANX7625=m,
but drm-ci don't have initrd with modules, so add
CONFIG_DRM_ANALOGIX_ANX7625=y in CI arm64 config.
A
For mediatek mt8183, the display driver is mediatek, while the
gpu driver is panfrost. Currently, in drm-ci for mt8183, only
the gpu driver is tested. Refactor the existing mediatek jobs
and add support in drm-ci to test both display and gpu driver
for mt8183 and update xfails.
Since the correct d
For Amlogic Meson G12B (A311D) SOC the display driver is meson and
gpu driver is panfrost. Currently, in drm-ci for Meson G12B (A311D),
only the gpu driver is tested. Refactor the existing meson jobs
and add support in drm-ci to test both display and gpu driver for
Amlogic Meson G12B (A311D) and up
For mediatek mt8173, the display driver is mediatek, while the
gpu driver is powervr. Currently, in drm-ci for mt8173, only the
display driver is tested. Add support in drm-ci to test powervr
driver for mt8173. Powervr driver was merged in linux kernel,
but there's no mediatek support yet. So disab
For rockchip rk3288 and rk3399, the display driver is rockchip
and gpu driver is panfrost. Currently, in drm-ci for rockchip
rk3288 and rk3399, only the gpu driver is tested. Refactor
the existing rockchip jobs to test both display and gpu driver
and update xfails.
Since the correct driver name is
Hi,
This patch series aims to add Freescale i.MX8qxp Display Controller support.
The controller is comprised of three main components that include a blit
engine for 2D graphics accelerations, display controller for display output
processing, as well as a command sequencer.
Previous patch series
Freescale i.MX8qxp Display Controller is implemented as construction set of
building blocks with unified concept and standardized interfaces.
Document some processing units to support two display outputs.
ConstFrame, ExtDst, FetchLayer, FetchWarp and LayerBlend processing units
are in pixel engin
i.MX8qxp Display Controller display engine consists of all processing units
that operate in a display clock domain.
Signed-off-by: Liu Ying
---
v2:
* Drop fsl,dc-*-id DT properties. (Krzysztof)
* Drop port property. (Krzysztof)
* Fix register range sizes in example.
.../imx/fsl,imx8qxp-dc-displ
i.MX8qxp Display Controller pixel engine consists of all processing units
that operate in the AXI bus clock domain. Command sequencer and interrupt
controller of the Display Controller work with AXI bus clock, but they are
not in pixel engine.
Signed-off-by: Liu Ying
---
v2:
* Drop fsl,dc-*-id D
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit.
Signed-off-by: Liu Ying
---
v2:
* Drop unneeded "|". (Krzysztof)
.../fsl,imx8qxp-dc-intc.yaml | 318 ++
1 file changed, 318 insertions(+)
create
i.MX8qxp Display Controller(DC) is comprised of three main components that
include a blit engine for 2D graphics accelerations, display controller for
display output processing, as well as a command sequencer.
Signed-off-by: Liu Ying
---
v2:
* Drop fsl,dc-*-id DT properties from example. (Krzyszt
i.MX8qxp Display Controller display engine consists of all processing
units that operate in a display clock domain. Add minimal feature
support with FrameGen and TCon so that the engine can output display
timings. The display engine driver as a master binds FrameGen and
TCon drivers as components
i.MX8qxp Display Controller pixel engine consists of all processing
units that operate in the AXI bus clock domain. Add drivers for
ConstFrame, ExtDst, FetchLayer, FetchWarp and LayerBlend units, as
well as a pixel engine driver, so that two displays with primary
planes can be supported. The pixe
i.MX8qxp Display Controller has a built-in interrupt controller to support
Enable/Status/Preset/Clear interrupt bit. Add driver for it.
Signed-off-by: Liu Ying
---
v2:
* No change.
drivers/gpu/drm/imx/dc/Kconfig | 1 +
drivers/gpu/drm/imx/dc/Makefile | 2 +-
drivers/gpu/drm/imx/dc/dc-drv.
i.MX8qxp Display Controller(DC) is comprised of three main components that
include a blit engine for 2D graphics accelerations, display controller for
display output processing, as well as a command sequencer. Add kernel
mode setting support for the display controller part with two CRTCs and
two p
Add myself as the maintainer of i.MX8qxp Display Controller.
Signed-off-by: Liu Ying
---
v2:
* Improve file list. (Frank)
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 278c1ec148c1..487fb417fca7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
assigned-clock* properties can be used by default now, so allow them.
Signed-off-by: Liu Ying
---
v2:
* New patch as needed by MIPI/LVDS subsystems device tree.
.../devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml | 5 -
1 file changed, 5 deletions(-)
diff --git a/Documentation/dev
Document SCU controlled display pixel link child nodes.
Signed-off-by: Liu Ying
---
v2:
* New patch as needed by display controller subsystem device tree.
.../devicetree/bindings/firmware/fsl,scu.yaml | 20 +++
1 file changed, 20 insertions(+)
diff --git a/Documentation/devicet
Add display controller subsystem in i.MX8qxp SoC.
Signed-off-by: Liu Ying
---
v2:
* New patch. (Krzysztof)
.../arm64/boot/dts/freescale/imx8-ss-dc0.dtsi | 408 ++
.../boot/dts/freescale/imx8qxp-ss-dc.dtsi | 236 ++
arch/arm64/boot/dts/freescale/imx8qxp.dtsi| 25
The MIPI-LVDS combo subsystems are peripherals of pixel link MSI
bus in i.MX8qxp display controller subsystem. Add the MIPI-LVDS
combo subsystems.
Signed-off-by: Liu Ying
---
v2:
* New patch. (Francesco)
.../boot/dts/freescale/imx8qxp-ss-dc.dtsi | 4 +
.../dts/freescale/imx8qxp-ss-mipi-l
Enable display controller for i.MX8qxp MEK.
Signed-off-by: Liu Ying
---
v2:
* New patch. (Francesco)
arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
b/arch/arm64/boot/dts/freescale/imx8qxp-mek.d
MX8-DLVDS-LCD1 display module integrates a KOE TX26D202VM0BWA LCD panel
and a touch IC. Add an overlay to support the LCD panel on i.MX8qxp
MEK. mipi_lvds_0_ldb channel0 and mipi_lvds_1_ldb channel1 send odd
and even pixels to the panel respectively.
Signed-off-by: Liu Ying
---
v2:
* New patch.
Hi Daniel,
I'm not a Rust expert so I'll have to defer to others on Rust-style.
I'll try to concentrate on Mali-specific parts. Apologies if you feel
this is too early, but hopefully it gives some ideas on how to improve
before it actually gets merged.
On 10/07/2024 23:50, Daniel Almeida wrote:
>
…
> +++ b/drivers/gpu/drm/imx/dc/dc-crtc.c
> @@ -0,0 +1,578 @@
…
> +static void dc_crtc_queue_state_event(struct drm_crtc_state *crtc_state)
> +{t...@linutronix.de
…
> + spin_lock_irq(&crtc->dev->event_lock);
> + if (crtc_state->event) {
…
> + }
> + spin_unlock_irq(&crtc->dev->event
On 02/07/2024 14:26, Jocelyn Falempe wrote:
kmsg_dump doesn't forward the panic reason string to the kmsg_dumper
callback.
This patch adds a new struct kmsg_dump_detail, that will hold the
reason and description, and pass it to the dump() callback.
To avoid updating all kmsg_dump() call, it adds
Hello dri maintainers/developers,
This is a 31-day syzbot report for the dri subsystem.
All related reports/information can be found at:
https://syzkaller.appspot.com/upstream/s/dri
During the period, 3 new issues were detected and 0 were fixed.
In total, 21 issues are still open and 31 have been
On Wed, Jul 10, 2024 at 12:16:58PM -0700, Doug Anderson wrote:
> On Wed, Jul 10, 2024 at 12:03 PM Stephan Gerhold
> wrote:
> >
> > > 2. In theory you could make your compatible look like this:
> > >
> > > compatible = "samsung,atna45af01", "samsung,atna33xc20"
> > >
> > > ...which would say "I hav
On Wed, Jul 10, 2024 at 02:10:09PM GMT, Maxime Ripard wrote:
> On Fri, Jul 05, 2024 at 04:31:34PM GMT, Thierry Reding wrote:
> > On Thu, Jul 04, 2024 at 02:24:49PM GMT, Maxime Ripard wrote:
> > > On Fri, Jun 28, 2024 at 04:42:35PM GMT, Thierry Reding wrote:
> > > > On Fri, Jun 28, 2024 at 03:08:46P
Am 12.07.24 um 09:52 schrieb Huan Yang:
在 2024/7/12 15:41, Christian König 写道:
Am 12.07.24 um 09:29 schrieb Huan Yang:
Hi Christian,
在 2024/7/12 15:10, Christian König 写道:
Am 12.07.24 um 04:14 schrieb Huan Yang:
在 2024/7/12 9:59, Huan Yang 写道:
Hi Christian,
在 2024/7/11 19:39, Christian Kö
: 20240712-b4-v6-10-topic-innolux-3f0ef0fed4b1
Best regards,
--
Steffen Trumtrar
The G070ACE-LH3 is a 7" TFT Color LCD module with WLED backlight.
https://www.data-modul.com/sites/default/files/products/G070ACE-LH3-specification-12058417.pdf
Signed-off-by: Steffen Trumtrar
---
drivers/gpu/drm/panel/panel-simple.c | 35 +++
1 file changed, 35
Add Innolux G070ACE-LH3 7" WVGA (800x480) TFT LCD panel compatible string.
Signed-off-by: Steffen Trumtrar
---
Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
在 2024/7/12 18:59, Christian König 写道:
Am 12.07.24 um 09:52 schrieb Huan Yang:
在 2024/7/12 15:41, Christian König 写道:
Am 12.07.24 um 09:29 schrieb Huan Yang:
Hi Christian,
在 2024/7/12 15:10, Christian König 写道:
Am 12.07.24 um 04:14 schrieb Huan Yang:
在 2024/7/12 9:59, Huan Yang 写道:
Hi C
Add hwmon support for fan1_input attribute, which will expose fan speed
in RPM. With this in place we can monitor fan speed using lm-sensors tool.
$ sensors
i915-pci-0300
Adapter: PCI adapter
in0: 653.00 mV
fan1:3833 RPM
power1: N/A (max = 43.00 W)
energy1: 32.02 k
Jocelyn Falempe writes:
> On 02/07/2024 14:26, Jocelyn Falempe wrote:
>> kmsg_dump doesn't forward the panic reason string to the kmsg_dumper
>> callback.
>> This patch adds a new struct kmsg_dump_detail, that will hold the
>> reason and description, and pass it to the dump() callback.
>>
>> To a
Jocelyn Falempe writes:
> kmsg_dump doesn't forward the panic reason string to the kmsg_dumper
> callback.
> This patch adds a new struct kmsg_dump_detail, that will hold the
> reason and description, and pass it to the dump() callback.
>
> To avoid updating all kmsg_dump() call, it adds a kmsg_du
On Fri, Jun 28, 2024 at 10:24:32AM +, Omer Shpigelman wrote:
> We need the core driver to access the IB driver (and to the ETH driver as
> well). As you wrote, we can't use exported symbols from our IB driver nor
> rely on function pointers, but what about providing the core driver an ops
> st
The plane's opacity should be reseted while the plane
is disabled. It prevents from seeing a possible global
or layer background color set earlier.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/dri
The purpose of this mask is to simplify writing to the lxcr
register and not to forget any fields.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c
inde
The reload interrupt is not used by the driver. To avoid
unnecessary calls of the interrupt routine, don't enable it.
Solve small typo and add mask to simplify the driver.
Signed-off-by: Yannick Fertre
---
drivers/gpu/drm/stm/ltdc.c | 16 ++--
1 file changed, 6 insertions(+), 10 dele
Add "st,stm32mp25-ltdc" compatible for SOC MP25. This new SOC introduces
new clocks (bus, ref & lvds). Bus clock was separated from lcd clock.
New sources are possible for lcd clock (lvds / ref).
Signed-off-by: Yannick Fertre
---
.../bindings/display/st,stm32-ltdc.yaml | 29 +++
> -Original Message-
> From: Vivi, Rodrigo
> Sent: Thursday, July 11, 2024 11:39 PM
> To: Cavitt, Jonathan
> Cc: Gote, Nitin R ; Wilson, Chris P
> ; tursu...@ursulin.net; intel-
> g...@lists.freedesktop.org; dri-devel@lists.freedesktop.org; Shyti, Andi
> ; Das, Nirmoy ;
> janusz.krzyszto.
On July 12, 2024 2:59:30 AM PDT, Jocelyn Falempe wrote:
>Gentle ping, I need reviews from powerpc, usermod linux, mtd, pstore and
>hyperv, to be able to push it in the drm-misc tree.
Oops, I thought I'd Acked already!
Acked-by: Kees Cook
And, yeah, as mpe said, you're all good to take this
Hi Nitin,
> > > > We're seeing a GPU HANG issue on a CHV platform, which was caused by
> > > > bac24f59f454 ("drm/i915/execlists: Enable coarse preemption boundaries
> > for gen8").
> > > >
> > > > Gen8 platform has only timeslice and doesn't support a preemption
> > > > mechanism as engines do no
On 7/8/24 6:06 PM, Rajneesh Bhardwaj wrote:
> Limiting the allocation of higher order pages to the closest NUMA node
> and enabling direct memory reclaim provides not only failsafe against
> situations when memory becomes too much fragmented and the allocator is
> not able to satisfy the request fr
On Fri, Jul 12, 2024 at 01:05:55PM +0200, Steffen Trumtrar wrote:
> Add Innolux G070ACE-LH3 7" WVGA (800x480) TFT LCD panel compatible string.
>
> Signed-off-by: Steffen Trumtrar
Acked-by: Conor Dooley
signature.asc
Description: PGP signature
Am 12.07.24 um 15:40 schrieb Vlastimil Babka:
On 7/8/24 6:06 PM, Rajneesh Bhardwaj wrote:
Limiting the allocation of higher order pages to the closest NUMA node
and enabling direct memory reclaim provides not only failsafe against
situations when memory becomes too much fragmented and the alloca
On 12/07/2024 15:34, Kees Cook wrote:
On July 12, 2024 2:59:30 AM PDT, Jocelyn Falempe wrote:
Gentle ping, I need reviews from powerpc, usermod linux, mtd, pstore and
hyperv, to be able to push it in the drm-misc tree.
Oops, I thought I'd Acked already!
Acked-by: Kees Cook
And, yeah,
On 7/12/2024 1:31 AM, Greg Kroah-Hartman wrote:
On Thu, Jul 11, 2024 at 01:27:23PM -0600, Jeffrey Hugo wrote:
On 7/11/2024 12:19 PM, Jeff Johnson wrote:
On 6/28/24 20:14, Jeff Johnson wrote:
On 6/15/2024 2:01 PM, Jeff Johnson wrote:
With ARCH=powerpc, make allmodconfig && make W=1 C=1 reports
Hi Steven, thanks for the review!
>
> This is defining the ABI to userspace and as such we'd need a way of
> exporting this for userspace tools to use. The C approach is a header in
> include/uabi. I'd also suggest making it obvious this enum can't be
> rearranged (e.g. a comment, or assigning sp
On Fri, Jul 12, 2024 at 11:35:25AM -0300, Daniel Almeida wrote:
> Hi Steven, thanks for the review!
>
> >
> > This is defining the ABI to userspace and as such we'd need a way of
> > exporting this for userspace tools to use. The C approach is a header in
> > include/uabi. I'd also suggest making
On 11/07/2024 21:36, Doug Anderson wrote:
Hi,
On Wed, Jul 10, 2024 at 6:09 PM cong yang
wrote:
Hi,
Michael Walle 于2024年7月11日周四 03:38写道：
On Wed Jul 10, 2024 at 9:12 PM CEST, Doug Anderson wrote:
Hi,
On Wed, Jul 10, 2024 at 2:02 AM Michael Walle wrote:
On Wed Jul 10, 2024 at 10:47 AM C
> On 12 Jul 2024, at 11:53, Danilo Krummrich wrote:
>
> You could also just define those structures in a C header directly and use it
> from Rust, can't you?
>
Sure, I am open to any approach here. Although this looks a bit reversed to me.
i.e.: why should I declare these structs in a sepa
On Fri, Jul 12, 2024 at 12:13:15PM -0300, Daniel Almeida wrote:
>
>
> > On 12 Jul 2024, at 11:53, Danilo Krummrich wrote:
> >
> > You could also just define those structures in a C header directly and use
> > it
> > from Rust, can't you?
> >
>
>
> Sure, I am open to any approach here. Altho
Hi,
On Fri, Jul 12, 2024 at 7:56 AM wrote:
>
> On 11/07/2024 21:36, Doug Anderson wrote:
> > Hi,
> >
> > On Wed, Jul 10, 2024 at 6:09 PM cong yang
> > wrote:
> >>
> >> Hi,
> >>
> >> Michael Walle 于2024年7月11日周四 03:38写道：
> >>>
> >>> On Wed Jul 10, 2024 at 9:12 PM CEST, Doug Anderson wrote:
>
Building with Sparse enabled prints this warning for cpu_to_le16()
calls:
warning: incorrect type in assignment (different base types)
expected unsigned short [usertype]
got restricted __le16 [usertype]
And this warning for le16_to_cpu() calls:
warning: cast to restricted
The same pattern fixed by commit 15dba12c5659 ("drm/amd/display:
Implement bounds check for stream encoder creation in DCN301") was used
in other create_stream_encoder() functions.
Apply the same fix.
Signed-off-by: José Expósito
---
drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.
On Jul 04 2024, Zhaoxiong Lv wrote:
> The Elan ekth6a12nay touch screen chip same as Elan eKTH6915 controller
> has a reset gpio. The difference is that they have different
> post_power_delay_ms.
>
> Signed-off-by: Zhaoxiong Lv
> ---
> Documentation/devicetree/bindings/input/elan,ekth6915.yaml |
Hi Dave, Sima,
A few updates for new IPs, but mostly bug fixes.
The following changes since commit 62a05f4ae9c1fb70bc75d494c9c1c373d2c2e374:
Merge tag 'drm-msm-next-2024-07-04' of https://gitlab.freedesktop.org/drm/msm
into drm-next (2024-07-05 12:45:41 +0200)
are available in the Git reposi
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
If the dpu_format_populate_layout() fails, then FB is prepared, but not
cleaned up. This ends up leaking the pin_count on the GEM object and
causes a splat during DRM file closure:
msm_obj->pin_count
WARNING: CPU: 2 PID: 569 at drivers/gpu/drm/msm
On 12/07/2024 15:16, Yannick Fertre wrote:
> Add "st,stm32mp25-ltdc" compatible for SOC MP25. This new SOC introduces
> new clocks (bus, ref & lvds). Bus clock was separated from lcd clock.
> New sources are possible for lcd clock (lvds / ref).
>
> Signed-off-by: Yannick Fertre
> ---
> .../bindi
On 7/12/24 8:26 AM, Philipp Stanner wrote:
nouveau_sched_init() uses the function drm_sched_init(). The latter
function has parameters called "hang_limit" and "timeout" in its API
documentation.
nouveau_sched_init(), however, defines a variable called
"job_hang_limit" which is passed to drm_sche
Add detail description for the read_mpcc_state function in the
mpc_funcs struct to resolve the documentation warning.
A kernel-doc warning was addressed:
./drivers/gpu/drm/amd/display/dc/inc/hw/mpc.h:547: warning:
Function parameter or struct member 'read_mpcc_state' not
described in 'mpc_funcs'.
On Wed, Jul 3, 2024 at 12:14 AM wrote:
>
> On Tue, Jul 2, 2024 at 4:01 PM Luis Chamberlain wrote:
> >
> > On Tue, Jul 02, 2024 at 03:56:50PM -0600, Jim Cromie wrote:
> > > This fixes dynamic-debug support for DRM.debug, added via classmaps.
> > > commit bb2ff6c27bc9 (drm: Disable dynamic debug as
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
The commit b954fa6baaca ("drm/msm/dpu: Refactor rm iterator") removed
zero-init of the hw_ctl array, but didn't change the error condition,
that checked for hw_ctl[i] being NULL. Use indices check instead.
Fixes: b954fa6baaca ("drm/msm/dpu: Refact
On 7/12/2024 4:05 AM, Steffen Trumtrar wrote:
The G070ACE-LH3 is a 7" TFT Color LCD module with WLED backlight.
https://www.data-modul.com/sites/default/files/products/G070ACE-LH3-specification-12058417.pdf
Signed-off-by: Steffen Trumtrar
---
drivers/gpu/drm/panel/panel-simple.c | 35
On 7/6/2024 3:23 AM, Hironori KIKUCHI wrote:
Rename DSI_CMD* macros to ST7701_CMD*, and ST7701_DSI macro to
ST7701_WRITE, because they do not belong to DSI.
Signed-off-by: Hironori KIKUCHI
Hi Hironori,
LGTM,
Reviewed-by: Jessica Zhang
Thanks,
Jessica Zhang
---
drivers/gpu/drm/pane
On 6/30/2024 11:36 AM, Caleb Connolly wrote:
Some panels like the Samsung AMB655X use long write commands for all
non-standard messages and do not work when trying to use the appropriate
command type.
Support these panels by introducing a new helper to send commands of a
specific type, overri
On Fri, 5 Jul 2024 15:55:23 -0700 Andrew Morton
wrote:
> On Fri, 5 Jul 2024 22:11:14 + "Kasireddy, Vivek"
> wrote:
>
> > Hi Andrew and SJ,
> >
> > >
> > > >
> > > > I didn't look deep into the patch, so unsure if that's a valid fix,
> > > > though.
> > > > May I ask your thoughts?
> >
On Fri, 12 Jul 2024 at 22:41, Abhinav Kumar wrote:
> On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
> > The commit b954fa6baaca ("drm/msm/dpu: Refactor rm iterator") removed
> > zero-init of the hw_ctl array, but didn't change the error condition,
> > that checked for hw_ctl[i] being NULL. Use indi
On 7/12/2024 4:11 PM, Dmitry Baryshkov wrote:
On Fri, 12 Jul 2024 at 22:41, Abhinav Kumar wrote:
On 6/24/2024 2:13 PM, Dmitry Baryshkov wrote:
The commit b954fa6baaca ("drm/msm/dpu: Refactor rm iterator") removed
zero-init of the hw_ctl array, but didn't change the error condition,
that che
On Sat, 13 Jul 2024 at 01:32, Danilo Krummrich wrote:
>
> On Fri, Jul 12, 2024 at 12:13:15PM -0300, Daniel Almeida wrote:
> >
> >
> > > On 12 Jul 2024, at 11:53, Danilo Krummrich wrote:
> > >
> > > You could also just define those structures in a C header directly and
> > > use it
> > > from Rus
Hi Dave,
>
> I think I'm on the uapi should remain in C for now, we define uapi
> types with the kernel types and we have downstream tools to scan and
> parse them to deal with alignments and padding (I know FEX relies on
> it), so I think we should be bindgen from uapi headers into rust for
> no
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