On Mon, 03 Jun 2024, Ashutosh Dixit wrote:
> Fix compile with CONFIG_WERROR by explicitly computing the max number of
> 7.1 and 4.2 counters.
Nitpick, the warning you're hitting is unused-const-variable. Werror
just turns it into an error.
>
> In file included from ../drivers/gpu/drm/v3d/v3d_drv
On Tue, Jun 04, 2024 at 09:51:18AM +0800, Lu Baolu wrote:
> The domain allocated in msm_iommu_new() is for the @dev. Replace
> iommu_domain_alloc() with iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/gpu/drm/msm/msm_iommu.c | 7 +--
> 1 file chan
From: Peng Fan
If 'info->screen_buffer' locates in vmalloc address space, virt_to_page
will not be able to get correct results. With CONFIG_DEBUG_VM and
CONFIG_DEBUG_VIRTUAL enabled on ARM64, there is dump below:
[3.536043] [ cut here ]
[3.540716] virt_to_phys used
On 2024/6/4 09:51, Lu Baolu wrote:
Commit <909f4abd1097> ("iommu: Add new iommu op to create domains owned
by userspace") added a dedicated iommu op to allocate a user domain.
While IOMMUFD has already made use of this callback, other frameworks
like vfio/type1 and vDPA still use the paging domai
https://bugzilla.kernel.org/show_bug.cgi?id=201957
MasterCATZ (masterc...@hotmail.com) changed:
What|Removed |Added
CC||masterc...@hotmail.c
Am Sonntag, 2. Juni 2024, 17:57:12 CEST schrieb Andy Shevchenko:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
>
On Sun, 02 Jun 2024, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
Why do we think it's a good idea to increase and normalize the
On 6/3/24 00:57, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
[...]
> diff --git a/dri
On 6/2/24 17:57, Andy Shevchenko wrote:
> diff --git a/kernel/trace/trace_osnoise.c b/kernel/trace/trace_osnoise.c
> index a8e28f9b9271..7bed499effd3 100644
> --- a/kernel/trace/trace_osnoise.c
> +++ b/kernel/trace/trace_osnoise.c
> @@ -2230,9 +2230,9 @@ static ssize_t osnoise_options_write(struct
在 2024/6/2 23:57, Andy Shevchenko 写道:
Make two APIs look similar. Hence convert match_string() to be
a 2-argument macro. In order to avoid unneeded churn, convert
all users as well. There is no functional change intended.
Signed-off-by: Andy Shevchenko
---
Compile tested with `make allyesconfi
On Sun, Jun 02, 2024 at 06:57:12PM +0300, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
Acked-
On 02-06-24, 18:57, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
..
> drivers/phy/mediatek/phy-mtk-tphy.c | 8 ++--
Lu Baolu writes:
> An iommu domain is allocated in ath11k_ahb_fw_resources_init() and is
> attached to ab_ahb->fw.dev in the same function.
>
> Use iommu_paging_domain_alloc() to make it explicit.
>
> Signed-off-by: Lu Baolu
> ---
> drivers/net/wireless/ath/ath11k/ahb.c | 6 +++---
> 1 file cha
Hi,
On 6/2/24 5:57 PM, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
>
> Compile tested
ttm page fault handler ttm_bo_vm_fault_reserved() maps
TTM_BO_VM_NUM_PREFAULT more pages beforehand
due to the principle of locality.
However, on some platform the page faults are more costly, this
patch intends to increase the number of ttm pre-fault to relieve
the number of page faults.
When mu
Hi Marek,
Am Freitag, 31. Mai 2024, 22:42:03 CEST schrieb Marek Vasut:
> Document default DP port preemphasis configurable via new DT property
> "toshiba,pre-emphasis". This is useful in case the DP link properties
> are known and starting link training from preemphasis setting of 0 dB
> is not us
://lore.kernel.org/r/20240603095343.39588-4-jfalempe%40redhat.com
patch subject: [PATCH v2 3/3] drm/panic: Add a kmsg panic screen
config: i386-randconfig-141-20240604
(https://download.01.org/0day-ci/archive/20240604/202406041051.kuvqtzcd-...@intel.com/config)
compiler: gcc-13 (Ubuntu 13.2.0-4ubuntu3) 13.2.0
Hi Marek,
Am Freitag, 31. Mai 2024, 22:42:04 CEST schrieb Marek Vasut:
> Make the default DP port preemphasis configurable via new DT property
> "toshiba,pre-emphasis". This is useful in case the DP link properties
> are known and starting link training from preemphasis setting of 0 dB
> is not us
On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> diff --git a/net/core/devmem.c b/net/core/devmem.c
> index d82f92d7cf9ce..d5fac8edf621d 100644
> --- a/net/core/devmem.c
> +++ b/net/core/devmem.c
> @@ -32,6 +32,14 @@ static void net_devmem_dmabuf_free_chunk_owner(struct
> gen_pool *genpool
Merge the identical if/elif code blocks and remove the following two
warnings reported by make includecheck:
asm/ioctl.h is included more than once
linux/types.h is included more than once
Reverts commit 00c9672606f7 ("drm: Untangle __KERNEL__ guards") because
make headers_install
On Tue, Jun 04, 2024 at 04:49:34PM +0800, Zhu, Lingshan wrote:
> ttm page fault handler ttm_bo_vm_fault_reserved() maps
> TTM_BO_VM_NUM_PREFAULT more pages beforehand
> due to the principle of locality.
>
> However, on some platform the page faults are more costly, this
> patch intends to increase
On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> diff --git a/include/trace/events/page_pool.h
> b/include/trace/events/page_pool.h
> index 6834356b2d2ae..c5b6383ff2760 100644
> --- a/include/trace/events/page_pool.h
> +++ b/include/trace/events/page_pool.h
> @@ -42,51 +42,52 @@ TRACE_EVEN
Am 04.06.24 um 12:18 schrieb Huang Rui:
On Tue, Jun 04, 2024 at 04:49:34PM +0800, Zhu, Lingshan wrote:
ttm page fault handler ttm_bo_vm_fault_reserved() maps
TTM_BO_VM_NUM_PREFAULT more pages beforehand
due to the principle of locality.
However, on some platform the page faults are more costly,
The if conditions !A || A && B can be simplified to !A || B.
Fixes the following Coccinelle/coccicheck warnings reported by
excluded_middle.cocci:
WARNING !A || A && B is equivalent to !A || B
WARNING !A || A && B is equivalent to !A || B
WARNING !A || A && B is equivalent
This adds support for V4L2 M2M based driver for E5010 JPEG Encoder
which is a stateful JPEG encoder from Imagination technologies
and is present in TI AM62A SoC.
While adding support for it, following additional framework changes were
made:
- Moved reference quantization and huffman tables provid
On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> diff --git a/net/core/gro.c b/net/core/gro.c
> index 26f09c3e830b7..7b9d018f552bd 100644
> --- a/net/core/gro.c
> +++ b/net/core/gro.c
> @@ -422,6 +422,9 @@ static void gro_pull_from_frag0(struct sk_buff *skb, int
> grow)
> {
> struct
Add below rounding related macros:
round_closest_up(x, y) : Rounds x to closest multiple of y where y is a
power of 2, with a preference to round up in case two nearest values are
possible.
round_closest_down(x, y) : Rounds x to closest multiple of y where y is a
power of 2, with a preference to
Add documentation for rounding, scaling, absolute value and 32-bit division
related macros and functions exported by math.h header file.
Signed-off-by: Devarsh Thakkar
Reviewed-by: Andy Shevchenko
---
V12: Add Reviewed-by
V11: Fix title for math function header
V10: Patch introduced
V1->V9 (No c
From: Daniel Latypov
Add basic test coverage for files that don't require any config options:
* part of math.h (what seem to be the most commonly used macros)
* gcd.c
* lcm.c
* int_sqrt.c
* reciprocal_div.c
(Ignored int_pow.c since it's a simple textbook algorithm.)
These tests aren't particular
Add tests for round_closest_up/down and roundclosest macros which round
to nearest multiple of specified argument. These are tested with kunit
tool as shared here [1] :
Link: https://gist.github.com/devarsht/3f9042825be3da4e133b8f4eda067876 [1]
Signed-off-by: Devarsh Thakkar
Acked-by: Andy Shevch
On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> @@ -2317,6 +2318,213 @@ static int tcp_inq_hint(struct sock *sk)
> return inq;
> }
>
> +/* batch __xa_alloc() calls and reduce xa_lock()/xa_unlock() overhead. */
> +struct tcp_xa_pool {
> + u8 max; /* max <= MAX_SKB_
If neither of the flags to round down (V4L2_SEL_FLAG_LE) or round up
(V4L2_SEL_FLAG_GE) are specified by the user, then round to nearest
multiple of requested value while updating the crop rectangle coordinates.
Use the rounding macro which gives preference to rounding down in case two
nearest val
Use generic macro round_closest_up() for rounding closest to specified
value instead of using local macro round_closest().
There is no change from functionality point of view as round_closest_up()
is functionally same as the previously used local macro round_closest().
Signed-off-by: Devarsh Thak
Hi Marek,
Am Montag, 3. Juni 2024, 23:25:43 CEST schrieb Marek Vasut:
> On 6/3/24 2:18 PM, Alexander Stein wrote:
> > Hi Marek,
>
> Hi,
>
> > Am Freitag, 31. Mai 2024, 22:39:49 CEST schrieb Marek Vasut:
> >> This line_pixel_subtract is no longer needed now that the bridge can
> >> request and ob
Hi Marek,
Am Montag, 3. Juni 2024, 23:27:34 CEST schrieb Marek Vasut:
> On 6/3/24 2:45 PM, Alexander Stein wrote:
>
> Hi,
>
> >> @@ -1631,6 +1643,18 @@ static int tc_edp_atomic_check(struct drm_bridge
> >> *bridge,
> >> struct drm_crtc_state *crtc_state,
> >>
On 6/4/24 02:20, Barnabás Czémán wrote:
From: Daniil Titov
This GPU is found on SoCs such as MSM8937 (450 MHz), MSM8940 (475 MHz),
SDM439 (650 MHz).
Signed-off-by: Daniil Titov
Signed-off-by: Barnabás Czémán
---
This all looks very good, just a nit
[...]
+ /*
+
On Mon, Jun 3, 2024 at 4:56 PM Hans Verkuil wrote:
>
> On 03/06/2024 16:32, Paweł Anikiel wrote:
> > On Mon, Jun 3, 2024 at 9:57 AM Hans Verkuil
> > wrote:
> >>
> >> On 07/05/2024 17:54, Paweł Anikiel wrote:
> >>> Add v4l2 driver for the video interface present on the Google
> >>> Chameleon v3.
Hi Andy,
On Sun, Jun 02, 2024 at 06:57:12PM +0300, Andy Shevchenko wrote:
> diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c
> index 503773707e01..9cb350de30f0 100644
> --- a/drivers/acpi/scan.c
> +++ b/drivers/acpi/scan.c
> @@ -798,7 +798,7 @@ static bool acpi_info_matches_ids(struct acpi_d
On Tue, Jun 4, 2024 at 1:55 PM Konrad Dybcio wrote:
>
>
>
> On 6/4/24 02:20, Barnabás Czémán wrote:
> > From: Daniil Titov
> >
> > This GPU is found on SoCs such as MSM8937 (450 MHz), MSM8940 (475 MHz),
> > SDM439 (650 MHz).
> >
> > Signed-off-by: Daniil Titov
> > Signed-off-by: Barnabás Czémán
On Mon, Jun 3, 2024 at 10:37 AM Hans Verkuil wrote:
>
> On 07/05/2024 17:54, Paweł Anikiel wrote:
> > Add v4l2 subdev driver for the Intel Displayport receiver FPGA IP.
> > It is a part of the DisplayPort Intel FPGA IP Core, and supports
> > DisplayPort 1.4, HBR3 video capture and Multi-Stream Tra
Changes in v2:
- Fixed bindings to restrict number of power domains for MT8188's
GPU to three like MT8183(b).
This series adds support for MT8188's Mali-G57 MC3.
AngeloGioacchino Del Regno (2):
dt-bindings: gpu: mali-bifrost: Add compatible for MT8188 SoC
drm/panfrost: Add support for Mal
Add a compatible for the MediaTek MT8188 SoC, with an integrated
ARM Mali G57 MC3 (Valhall-JM) GPU.
Signed-off-by: AngeloGioacchino Del Regno
---
Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/Documentation/dev
MediaTek MT8188 has a Mali-G57 MC3 (Valhall-JM): add a new
compatible and platform data using the same supplies and the
same power domain lists as MT8183 (one regulator, three power
domains).
Signed-off-by: AngeloGioacchino Del Regno
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 9 +
1
On 04/06/2024 14:03, Paweł Anikiel wrote:
> On Mon, Jun 3, 2024 at 4:56 PM Hans Verkuil wrote:
>>
>> On 03/06/2024 16:32, Paweł Anikiel wrote:
>>> On Mon, Jun 3, 2024 at 9:57 AM Hans Verkuil
>>> wrote:
On 07/05/2024 17:54, Paweł Anikiel wrote:
> Add v4l2 driver for the video interf
Core in platform_driver_register() already sets the .owner, so driver
does not need to. Whatever is set here will be anyway overwritten by
main driver calling platform_driver_register().
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/exynos/exynos_dp.c | 1 -
1 file changed, 1 deletion(
On 27/05/2024 16:47, Alain Volmat wrote:
> Hi Krzysztof,
>
> thanks for your patch, sorry for the delay.
>
> On Sat, Mar 30, 2024 at 09:57:21PM +0100, Krzysztof Kozlowski wrote:
>> Core in platform_driver_register() already sets the .owner, so driver
>> does not need to. Whatever is set here wil
From: Noralf Trønnes
Add support for these pixel format property values:
- r5g6b5, RGB565
- b6x2g6x2r6x2, BGR666
BGR666 is presented to userspace as RGB888. The 2 LSB in each color
are discarded by the controller. The pixel is sent on the wire using
8 bits per word (little endian) so the control
From: Noralf Trønnes
The MIPI DBI 2.0 specification (2005) lists only two pixel formats for
the Type C Interface (SPI) and that is 3-bits/pixel RGB111 with
2 options for bit layout.
For Type A and B (parallel) the following formats are listed: RGB332,
RGB444, RGB565, RGB666 and RGB888 (some have
From: Noralf Trønnes
DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it
on the SPI bus using a 24 bits per word transfer. The problem with this
is that not all SPI controllers support 24 bpw.
Since DRM_FORMAT_RGB888 is stored in memory as little endian and the SPI
bus is b
From: Noralf Trønnes
mipi_dbi_machine_little_endian() should really have been called
mipi_dbi_framebuffer_little_endian() because that's the function it
performs. When I added support for these SPI displays I thought that the
framebuffers on big endian machines were also big endian, but I have
la
From: Noralf Trønnes
MIPI DCS write/set commands have 8 bit parameters except for the
write_memory commands where it depends on the pixel format.
drm_mipi_dbi does currently only support RGB565 which is 16-bit and it
has to make sure that the pixels enters the SPI bus in big endian format
since t
Hi,
In this version I've fixed up a commit message that I had forgotten to
write before sending and improved a struct member name.
See version 1 of the patchset for the full cover letter.
Signed-off-by: Noralf Trønnes
---
Changes in v4:
- Expand the commit message (Dmitry)
- s/emulation_format
On 6/3/24 18:51, Lu Baolu wrote:
An iommu domain is allocated in ath11k_ahb_fw_resources_init() and is
attached to ab_ahb->fw.dev in the same function.
Use iommu_paging_domain_alloc() to make it explicit.
Signed-off-by: Lu Baolu
Acked-by: Jeff Johnson
---
drivers/net/wireless/ath/ath11k
On 6/3/24 18:51, Lu Baolu wrote:
An iommu domain is allocated in ath10k_fw_init() and is attached to
ar_snoc->fw.dev in the same function. Use iommu_paging_domain_alloc() to
make it explicit.
Signed-off-by: Lu Baolu
nit: although the subject prefix you used probably matches the prefix in
git
+ath10k list for viibility
On 6/3/24 18:51, Lu Baolu wrote:
An iommu domain is allocated in ath10k_fw_init() and is attached to
ar_snoc->fw.dev in the same function. Use iommu_paging_domain_alloc() to
make it explicit.
Signed-off-by: Lu Baolu
---
drivers/net/wireless/ath/ath10k/snoc.c | 6 ++
On Tue, Jun 04, 2024 at 03:20:30PM +0200, Noralf Trønnes via B4 Relay wrote:
> From: Noralf Trønnes
>
> MIPI DCS write/set commands have 8 bit parameters except for the
> write_memory commands where it depends on the pixel format.
> drm_mipi_dbi does currently only support RGB565 which is 16-bit
On Tue, Jun 04, 2024 at 03:20:31PM +0200, Noralf Trønnes via B4 Relay wrote:
> From: Noralf Trønnes
>
> DRM_FORMAT_RGB888 is 24 bits per pixel and it would be natural to send it
> on the SPI bus using a 24 bits per word transfer. The problem with this
> is that not all SPI controllers support 24
https://bugzilla.kernel.org/show_bug.cgi?id=201957
--- Comment #101 from Mario Limonciello (AMD) (mario.limoncie...@amd.com) ---
#100:
You have a GFX10 product, this is not affected by amdgpu.mcbp=0/1. That's only
for GFX9. Please open your own issue for it. Also in the kernel bug tracker
plea
On Thu, May 16, 2024 at 01:55:26PM -0500, Andrew Halaney wrote:
> On Thu, May 16, 2024 at 08:20:05PM GMT, Akhil P Oommen wrote:
> > On Thu, May 16, 2024 at 08:15:34AM -0500, Andrew Halaney wrote:
> > > If I understand correctly, you don't need any memory barrier.
> > > writel()/readl()'s are ordere
Dave and Sima,
A single fix for a missing Local Memory Translation Table update for -rc3.
Thanks,
Thomas
drm-xe-fixes-2024-06-04:
Driver Changes:
- drm/xe/pf: Update the LMTT when freeing VF GT config
The following changes since commit 6c5cd0807c79eb4c0cda70b48f6be668a241d584:
drm/xe: Proper
On Wed, May 29, 2024 at 06:08:21PM -0700, Abhinav Kumar wrote:
>
>
> On 5/29/2024 5:02 PM, Dmitry Baryshkov wrote:
> > On Thu, 30 May 2024 at 00:57, Abhinav Kumar
> > wrote:
> > >
> > >
> > >
> > > On 5/23/2024 2:58 AM, Dmitry Baryshkov wrote:
> > > > On Thu, 23 May 2024 at 02:57, Abhinav Ku
On 04/06/2024 17:14, Dmitry Baryshkov wrote:
>>
>> I didnt follow why this is a link property. Sorry , I didnt follow the
>> split part.
>
> There is a link between the DSI host and the panel. I don't want to
> end up in a situation when the properties of the link are split
On Mon, 18 Mar 2024 21:39:23 +0100, Lucas Stach wrote:
> Address only transactions without any data are valid and should not
> be flagged as short transactions. Simply return the message size when
> no transaction errors occured.
>
>
Fixed checkpatch --strict formatting suggestions and applied,
Hi Andi,
Thanks for review.
On Tuesday, 4 June 2024 02:48:43 GMT+2 Andi Shyti wrote:
> Hi Janusz,
>
> On Mon, Jun 03, 2024 at 09:54:45PM +0200, Janusz Krzysztofik wrote:
> > CI has been sporadically reporting the following issue triggered by
> > igt@i915_selftest@live@hangcheck on ADL-P and simi
On Tue, Jun 04, 2024 at 05:22:03PM +0200, Krzysztof Kozlowski wrote:
> On 04/06/2024 17:14, Dmitry Baryshkov wrote:
> >>
> >> I didnt follow why this is a link property. Sorry , I didnt follow the
> >> split part.
> >
> > There is a link between the DSI host and the panel. I don
On Mon, Jun 3, 2024 at 11:30 PM Hailong Liu wrote:
> On 6/4/2024 2:06 AM, John Stultz wrote:
> > On Mon, Jun 3, 2024 at 10:21 AM Hailong Liu wrote:
> >> We now aim to improve priority dma-buf allocation. Consider android
> >> animations scene:
> >>
> >> when device is in low memory, Allocating dm
On 04/06/2024 17:32, Dmitry Baryshkov wrote:
> On Tue, Jun 04, 2024 at 05:22:03PM +0200, Krzysztof Kozlowski wrote:
>> On 04/06/2024 17:14, Dmitry Baryshkov wrote:
I didnt follow why this is a link property. Sorry , I didnt follow the
split part.
>>>
>>> There is
For future reference, since this is the second revision of this change,
the subject should have "[PATCH v2]".
On 6/1/2024 8:51 AM, Danish Prakash wrote:
Fixed a typo in the docs where 'phsyical' > was corrected to 'physical'.
Commit text should be in the present simple tense. You currently a
On Thu, May 30, 2024 at 10:36:57PM -0700, Chia-I Wu wrote:
> We can skip children resources when the parent resource does not cover
> the range.
>
> This should help vmf_insert_* users on x86, such as several DRM drivers.
> On my AMD Ryzen 5 7520C, when streaming data from cpu memory into amdgpu
>
On 20/05/2024 14:12, Dmitry Baryshkov wrote:
> Command mode panels provide TE signal back to the DSI host to signal
> that the frame display has completed and update of the image will not
> cause tearing. Usually it is connected to the first GPIO with the
> mdp_vsync function, which is the default.
From: Rob Clark
Add the SQE fw version to dmesg and devcoredump.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 32 +++--
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 2 ++
3 files changed, 33 ins
From: Tvrtko Ursulin
Move static const array into the source file to fix the "defined but not
used" errors.
The fix is perhaps not the prettiest due hand crafting the array sizes
in v3d_performance_counters.h, but I did add some build time asserts to
validate the counts look sensible, so hopeful
On Mon, 03 Jun 2024 15:29:48 PDT (-0700), nat...@kernel.org wrote:
Hi Palmer,
On Thu, May 30, 2024 at 07:57:42AM -0700, Palmer Dabbelt wrote:
From: Palmer Dabbelt
I get a handful of build errors along the lines of
linux/drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn32/display_mode_vba
Hi guys,
as already discussed on the mailing list Tvrtko and Friedrich stumbled
over a bunch of problems with the memory management. Especially that
move rate limit didn't seemed to work for VRAM|GTT BOs and causing bunch
of additional and unecessary overhead during CS.
This (not well tested) pat
This adds support to enable a placement only when a certain treshold of
moved bytes is reached. It's a context flag which will be handled
together with TTM_PL_FLAG_DESIRED and TTM_PL_FLAG_FALLBACK.
Signed-off-by: Christian König
---
drivers/gpu/drm/ttm/ttm_bo.c | 5 ++---
drivers/gpu/drm/
That is just a waste of time on APUs.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 8d8c39be6129..f
From: Tvrtko Ursulin
Currently the driver appears to be thinking that it will be attempting to
re-validate the evicted buffers on the next submission if they are not in
their preferred placement.
That however appears not to be true for the very common case of buffers
with allowed placements of V
The approach of having a separate WB slot for each submission doesn't
really work well and for example breaks GPU reset.
Use a status query packet for the fence update instead since those
should always succeed we can use the fence of the original packet to
signal the state of the operation.
Only
This should prevent buffer moves when the threshold is reached during
CS.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 36 --
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 22 +
2 files changed, 29 insertions(+), 29 deletions(-)
That should probably come last.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index f7b534
On Tue, 04 Jun 2024 12:13:15 +0200
Paolo Abeni wrote:
> On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> > diff --git a/net/core/devmem.c b/net/core/devmem.c
> > index d82f92d7cf9ce..d5fac8edf621d 100644
> > --- a/net/core/devmem.c
> > +++ b/net/core/devmem.c
> > @@ -32,6 +32,14 @@ static
On Tue, 4 Jun 2024 at 18:48, Rob Clark wrote:
>
> From: Rob Clark
>
> Add the SQE fw version to dmesg and devcoredump.
>
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 32 +++--
> drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
> drivers/gpu
On Tue, Jun 04, 2024 at 12:15:51PM -0400, Steven Rostedt wrote:
> On Tue, 04 Jun 2024 12:13:15 +0200
> Paolo Abeni wrote:
>
> > On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> > > diff --git a/net/core/devmem.c b/net/core/devmem.c
> > > index d82f92d7cf9ce..d5fac8edf621d 100644
> > > ---
On Tue, Jun 04, 2024 at 02:39:21PM +0200, AngeloGioacchino Del Regno wrote:
> Add a compatible for the MediaTek MT8188 SoC, with an integrated
> ARM Mali G57 MC3 (Valhall-JM) GPU.
>
> Signed-off-by: AngeloGioacchino Del Regno
>
Acked-by: Conor Dooley
Thanks,
Conor.
signature.asc
Description
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: d97496ca23a2d4ee80b7302849404859d9058bcd Add linux-next specific
files for 20240604
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202406041641.we3cct4c-...@intel.com
Error
On Tue, 4 Jun 2024 13:31:58 -0300
Jason Gunthorpe wrote:
> On Tue, Jun 04, 2024 at 12:15:51PM -0400, Steven Rostedt wrote:
> > On Tue, 04 Jun 2024 12:13:15 +0200
> > Paolo Abeni wrote:
> >
> > > On Thu, 2024-05-30 at 20:16 +, Mina Almasry wrote:
> > > > diff --git a/net/core/devmem.c b/
On Tue, Jun 04, 2024 at 09:51:27AM +0800, Lu Baolu wrote:
> usnic_uiom_alloc_pd() allocates a paging domain for a given device.
> In this case, iommu_domain_alloc(dev->bus) is equivalent to
> iommu_paging_domain_alloc(dev). Replace it as iommu_domain_alloc()
> has been deprecated.
>
> Signed-off-
On Tue, Jun 4, 2024 at 2:27 PM Barnabás Czémán wrote:
>
> On Tue, Jun 4, 2024 at 1:55 PM Konrad Dybcio wrote:
> >
> >
> >
> > On 6/4/24 02:20, Barnabás Czémán wrote:
> > > From: Daniil Titov
> > >
> > > This GPU is found on SoCs such as MSM8937 (450 MHz), MSM8940 (475 MHz),
> > > SDM439 (650 MHz
On Tue, Jun 04, 2024 at 09:51:14AM +0800, Lu Baolu wrote:
> Replace iommu_domain_alloc() with iommu_user_domain_alloc().
>
> Signed-off-by: Lu Baolu
> ---
> drivers/iommu/iommufd/hw_pagetable.c | 20 +---
> 1 file changed, 5 insertions(+), 15 deletions(-)
>
> diff --git a/driver
Hi Neil,
On Mon, Jun 03, 2024 at 10:46:16AM +0200, Neil Armstrong wrote:
> Hi,
>
> On Thu, 30 May 2024 23:14:02 +0200, Sam Ravnborg wrote:
> > Drop myself as reviewer of panel patches, to reflect the reality.
> >
> >
>
> Thanks, Applied to https://gitlab.freedesktop.org/drm/misc/kernel.git
>
On 6/4/24 17:48, Rob Clark wrote:
From: Rob Clark
Add the SQE fw version to dmesg and devcoredump.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 32 +++--
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gp
On 6/4/24 18:45, Barnabás Czémán wrote:
On Tue, Jun 4, 2024 at 2:27 PM Barnabás Czémán wrote:
On Tue, Jun 4, 2024 at 1:55 PM Konrad Dybcio wrote:
On 6/4/24 02:20, Barnabás Czémán wrote:
From: Daniil Titov
This GPU is found on SoCs such as MSM8937 (450 MHz), MSM8940 (475 MHz),
SDM439
On 6/4/24 1:35 PM, Alexander Stein wrote:
Hi Marek,
Hi,
Am Montag, 3. Juni 2024, 23:27:34 CEST schrieb Marek Vasut:
On 6/3/24 2:45 PM, Alexander Stein wrote:
Hi,
@@ -1631,6 +1643,18 @@ static int tc_edp_atomic_check(struct drm_bridge *bridge,
struct drm_crtc
On 6/4/24 11:49 AM, Alexander Stein wrote:
Hi,
@@ -2372,6 +2392,21 @@ static int tc_probe_edp_bridge_endpoint(struct tc_data
*tc)
tc->bridge.ops |= DRM_BRIDGE_OP_DETECT;
tc->bridge.ops |= DRM_BRIDGE_OP_EDID;
+ port = of_graph_get_port_by_id(dev->of_node, 2);
+
On 6/4/24 11:42 AM, Alexander Stein wrote:
Hi Marek,
Hi,
--- a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358767.yaml
@@ -98,6 +98,24 @@ properties:
reference to a valid eDP panel input
On 6/4/24 1:12 PM, Alexander Stein wrote:
Hi Marek,
Hi,
Am Montag, 3. Juni 2024, 23:25:43 CEST schrieb Marek Vasut:
On 6/3/24 2:18 PM, Alexander Stein wrote:
Hi Marek,
Hi,
Am Freitag, 31. Mai 2024, 22:39:49 CEST schrieb Marek Vasut:
This line_pixel_subtract is no longer needed now that
On Tue, Jun 4, 2024 at 7:06 PM Konrad Dybcio wrote:
>
>
>
> On 6/4/24 18:45, Barnabás Czémán wrote:
> > On Tue, Jun 4, 2024 at 2:27 PM Barnabás Czémán wrote:
> >>
> >> On Tue, Jun 4, 2024 at 1:55 PM Konrad Dybcio
> >> wrote:
> >>>
> >>>
> >>>
> >>> On 6/4/24 02:20, Barnabás Czémán wrote:
>
On 5/14/24 20:38, Akhil P Oommen wrote:
On Wed, May 08, 2024 at 07:46:31PM +0200, Konrad Dybcio wrote:
Memory barriers help ensure instruction ordering, NOT time and order
of actual write arrival at other observers (e.g. memory-mapped IP).
On architectures employing weak memory ordering, the
On 6/4/24 19:33, Barnabás Czémán wrote:
On Tue, Jun 4, 2024 at 7:06 PM Konrad Dybcio wrote:
On 6/4/24 18:45, Barnabás Czémán wrote:
On Tue, Jun 4, 2024 at 2:27 PM Barnabás Czémán wrote:
On Tue, Jun 4, 2024 at 1:55 PM Konrad Dybcio wrote:
On 6/4/24 02:20, Barnabás Czémán wrote:
F
On Tue, Jun 4, 2024 at 7:38 PM Konrad Dybcio wrote:
>
>
>
> On 6/4/24 19:33, Barnabás Czémán wrote:
> > On Tue, Jun 4, 2024 at 7:06 PM Konrad Dybcio
> > wrote:
> >>
> >>
> >>
> >> On 6/4/24 18:45, Barnabás Czémán wrote:
> >>> On Tue, Jun 4, 2024 at 2:27 PM Barnabás Czémán wrote:
>
> O
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