https://bugzilla.kernel.org/show_bug.cgi?id=218891
Bug ID: 218891
Summary: In function ‘dcn321_update_bw_bounding_box’ - warning:
the frame size of 1336 bytes is larger than 1280 bytes
Product: Drivers
Version: 2.5
Hardware
https://bugzilla.kernel.org/show_bug.cgi?id=218891
sander44 (ionut_n2...@yahoo.com) changed:
What|Removed |Added
Kernel Version||6.9.0
--
You may repl
On Sat, May 25, 2024 at 09:26:48AM +1200, Ryan Walklin wrote:
> On Sat, 25 May 2024, at 7:10 AM, Conor Dooley wrote:
>
> Thanks for the review!
>
> >> +
> >> +properties:
> >> + compatible:
> >> +const: wl-355608-a8
> >
> > You're missing a vendor prefix here. And when you add it, update the
> VCPU_RESERVED and LEGACY_X2APIC are not VMware hypercall commands.
> These are bits in return value of VMWARE_CMD_GETVCPU_INFO command.
> Change VMWARE_CMD_ prefix to GETVCPU_INFO_ one. …
Can such information be relevant for the addition of the tag “Fixes”?
Regards,
Markus
This is an effort to get rid of all multiplications from allocation
functions in order to prevent integer overflows [1][2].
The "struct dma_fence_array" can be refactored to add a flex array in order
to have the "callback structures allocated behind the array" be more
explicit.
Do so:
- makes
On Sun, 26 May 2024, at 3:22 AM, Conor Dooley wrote:
>>
>> Thanks, I don't actually know the vendor, would it be acceptable to just use
>> "wl"?
>
> You mean, "wl,355608-a8"? I did a wee bit of googling of the thing, and
> yeah, there's nothing that a surface level search turns up for it -
> othe
Hi Ryan,
How about to use "anbernic,rg35xx-panel" ?
It's not generic though, some other drivers use similar strings already.
Regards,
kikuchan.
1. Add mboxes property to define a GCE loopping thread as a secure IRQ
handler.
The CMDQ secure driver requests a mbox channel and sends a looping
command to the GCE thread. The looping command will wait for a secure
packet done event signal from secure world and then jump back to the
first instuct
Open secure cmdq_pkt APIs to support executing commands in secure world.
1. Add cmdq_sec_pkt_alloc_sec_data(), cmdq_sec_pkt_free_sec_data() and
cmdq_sec_pkt_set_data() to prepare the sec_data in cmdq_pkt that will
be referenced in the secure world.
2. Add cmdq_sec_insert_backup_cookie() and
To support secure video path feature, GCE have to read/write registgers
in the secure world. GCE will enable the secure access permission to the
HW who wants to access the secure content buffer.
Add CMDQ secure mailbox driver to make CMDQ client user is able to
sending their HW settings to the sec
From: Jason-jh Lin
For the Secure Video Path (SVP) feature, inculding the memory stored
secure video content, the registers of display HW pipeline and the
HW configure operations are required to execute in the secure world.
So using a CMDQ secure driver to make all display HW registers
configura
1. Add a loop flag for CMDQ packet struct.
CMDQ helper will use a loop flag to mark CMDQ packet as lopping command
and make current command buffer jumps to the beginning when GCE executes
to the end of command buffer.
2. Add a looping task handle flow in irq handler.
GCE irq occurs when GCE execut
Add cmdq_pkt_logic_command to support math operation.
cmdq_pkt_logic_command can append logic command to the CMDQ packet,
ask GCE to execute a arithmetic calculate instruction,
such as add, subtract, multiply, AND, OR and NOT, etc.
Note that all arithmetic instructions are unsigned calculations.
To support CMDQ secure driver, move some reuseable definition to header.
- define: e.g. CMDQ_GCE_NUM_MAX, CMDQ_THR_BASE, CMDQ_THR_SIZE.
- struct: e.g. cmdq_thread, cmdq, cmdq_task.
- include: e.g. .
Add "#include " for the function that takes
"struct mbox_chan * chan" as a parameter. That may occu
There are 2 kind of GCE event signal:
- The SW token means: a GCE event signal triggered by SW drivers.
e.g. SW driver append a GCE command to set a GCE event after a specific
GCE command. Or SW driver use CPU to write a event id to GCE register to
trigger the GCE event corresponding to that event
CMDQ driver will probe a secure CMDQ driver when has_sec flag
in platform data is true and its device node in dts has defined a
event id of CMDQ_SYNC_TOKEN_SEC_EOF.
Secure CMDQ driver support on mt8188 and mt8195 currently.
So add a has_secure flag to their driver data to probe it.
Signed-off-by:
On Sun, 26 May 2024, at 10:49 AM, きくちゃんさん wrote:
> Hi Ryan,
>
> How about to use "anbernic,rg35xx-panel" ?
> It's not generic though, some other drivers use similar strings already.
Could do, although I think it is used for more than one of the Anbernic
devices, so "anbernic,wl-355608-a8" might b
From: CK Hu
Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs
to be used by render nodes.
This patch also sets the RENDER driver feature.
TODO:
Drop this path after we change all the usages of this ioctl to
DMA_HEAP_IOCTL_ALLOC in the user sapce.
Signed-off-by: CK Hu
Signed-o
Add is_sec flag to identify current mtk_drm_plane is secure.
Add mtk_plane_is_sec_fb() to check current drm_framebuffer is secure.
Signed-off-by: Jason-JH.Lin
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_plane.c | 18 ++
drivers/gpu/drm/mediatek/mtk_plane.h |
To add secure flow support for mediatek-drm, each crtc have to
create a secure cmdq mailbox channel. Then cmdq packets with
display HW configuration will be sent to secure cmdq mailbox channel
and configured in the secure world.
Each crtc have to use secure cmdq interface to configure some secure
Add mtk_ddp_sec_write() to configure secure buffer information to
cmdq secure packet data and send to the secure world.
OVL and OVL_ADAPTOR need to use mtk_ddp_sec_write() instead of original
mtk_ddp_write() because the address in plane is secure handle not the real
buffer address.
The secure buf
Add DRM_MTK_GEM_CREATE_RESTRICTED flag for the user space to tell the
kernel space this dma buffer is restricted.
The user space can store this flag into the private data of the dma
buffer after allocating.
A restricted buffer is used to store the secure video content to support
secure video path
Add cmdq_insert_backup_cookie to append some commands before EOC:
1. Get GCE HW thread execute count from the GCE HW register.
2. Add 1 to the execute count and then store into a shared memory.
3. Set a software event siganl as secure irq to GCE HW.
Since the value of execute count + 1 is stored i
Add secure buffer control flow to mtk_drm_gem.
When user space takes DRM_MTK_GEM_CREATE_RESTRICTED flag and size
to create a mtk_drm_gem object, mtk_drm_gem will find a matched size
dma buffer from secure dma-heap and bind it to mtk_drm_gem object.
TODO:
1. Drop the mtk_gem_create_from_heap() aft
From: Jason-jh Lin
Memory Definitions:
secure memory - Memory allocated in the TEE (Trusted Execution
Environment) which is inaccessible in the REE (Rich Execution
Environment, i.e. linux kernel/userspace).
secure handle - Integer value which acts as reference to 'secure
memory'. Used in communic
On Sun, 26 May 2024 07:08:04 +0800, Jason-JH.Lin wrote:
> 1. Add mboxes property to define a GCE loopping thread as a secure IRQ
> handler.
> The CMDQ secure driver requests a mbox channel and sends a looping
> command to the GCE thread. The looping command will wait for a secure
> packet done ev
Hi Jason-JH.Lin,
kernel test robot noticed the following build warnings:
[auto build test WARNING on linus/master]
[also build test WARNING on next-20240523]
[cannot apply to robh/for-next krzk-dt/for-next
fujitsu-integration/mailbox-for-next v6.9]
[If your patch is applied to the wrong git tree
I haven't been able to follow or review the work on the driver for some
time now and I don't see the situation improving anytime soon. I'd like
to continue being listed as a reviewer.
Signed-off-by: Melissa Wen
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/M
28 matches
Mail list logo
