https://bugzilla.kernel.org/show_bug.cgi?id=209129
Ken Sharp (imwellcushtymel...@gmail.com) changed:
What|Removed |Added
CC||imwellcushtymel
On 07/12/2023 20:47, Konrad Dybcio wrote:
On 12/7/23 17:37, Neil Armstrong wrote:
Declare the displayport controller present on the Qualcomm SM8650 SoC
and connected to the USB3/DP Combo PHY.
Signed-off-by: Neil Armstrong
---
[...]
+ clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
On Thu, 7 Dec 2023 15:27:33 +0100
Maxime Ripard wrote:
> On Tue, Dec 05, 2023 at 10:51:06AM +0200, Pekka Paalanen wrote:
> > On Mon, 4 Dec 2023 13:17:06 +0100
> > Maxime Ripard wrote:
> >
> > > The current documentation of drm_atomic_state says that it's the "global
> > > state object". This
On 08/12/2023 04:38, Bjorn Andersson wrote:
On Thu, Dec 07, 2023 at 05:37:19PM +0100, Neil Armstrong wrote:
diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi
b/arch/arm64/boot/dts/qcom/sm8650.dtsi
[..]
+
+ mdss_dp0: displayport-controller@af54000 {
+
Hi Frieder
On Thu, Dec 7, 2023 at 5:58 PM Frieder Schrempf
wrote:
>
> On 07.12.23 15:16, Dario Binacchi wrote:
> > The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
> > platforms (i. e. not exynos).
>
> This also affects i.MX8MM, so better just mention i.MX in general in t
Hi Nathan,
On 2023-11-29 6:42 PM, Nathan Chancellor wrote:
> On Thu, Nov 23, 2023 at 02:23:01PM +, Conor Dooley wrote:
>> On Tue, Nov 21, 2023 at 07:05:15PM -0800, Samuel Holland wrote:
>>> RISC-V uses kernel_fpu_begin()/kernel_fpu_end() like several other
>>> architectures. Enabling hardware
With VRR, every atomic commit affecting a given display must trigger
a new scanout cycle, so that userspace is able to control the refresh
rate of the display. Before this commit, this was not the case for
atomic commits that only contain cursor plane properties.
Closes: https://gitlab.freedesktop
From: "alice.yuan"
When do 2592x1944 resolution capture, we found some times the
"BIT_STATFF_INT" is abnormal, the stat fifo is not full, but
still the DMA transfer done interrupts generate, at this time
we will get broken frames.
>From the reference manual of imx8mm, we know the STATFIFO full
i
From: Yang Guang
Convert kzalloc/memcpy operations to memdup makes for
cleaner code and avoids memcpy() failures
Signed-off-by: Chen Haonan
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/d
Sorry, it looks like I sent this too soon. I tested the patch on a
second PC and it doesn't fix the issue there.
Am Do., 7. Dez. 2023 um 19:25 Uhr schrieb Xaver Hugl :
>
> With VRR, every atomic commit affecting a given display must trigger
> a new scanout cycle, so that userspace is able to cont
Hi Christoph,
On 2023-11-22 2:40 AM, Christoph Hellwig wrote:
>> -select DRM_AMD_DC_FP if (X86 || LOONGARCH || (PPC64 && ALTIVEC) ||
>> (ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG))
>> +select DRM_AMD_DC_FP if ARM64 && KERNEL_MODE_NEON && !CC_IS_CLANG
>> +select DRM_AMD_DC_FP if PPC64
Hi Christoph,
On 2023-11-22 2:33 AM, Christoph Hellwig wrote:
> On Tue, Nov 21, 2023 at 07:05:13PM -0800, Samuel Holland wrote:
>> +static inline void kernel_fpu_begin(void)
>> +{
>> +preempt_disable();
>> +fstate_save(current, task_pt_regs(current));
>> +csr_set(CSR_SSTATUS, SR_FS);
>
On 07/12/23 22:28, Randy Dunlap wrote:
>
>
> On 12/7/23 01:52, Aradhya Bhatia wrote:
>> Hi Randy,
>>
>> Thanks for the patch!
>>
>> On 07/12/23 11:52, Randy Dunlap wrote:
>>> A few of the DRM_PANEL entries have become out of alphabetical order,
>>> so move them around a bit to restore alpha or
Hi,
On Fri, Dec 08, 2023 at 11:23:37AM +0800, Andy Yan wrote:
> 在 2023-12-08 11:00:31，"Keith Zhao" 写道：
> >
> >
> >On 2023/12/8 8:37, Andy Yan wrote:
> >> Hi Keth：
> >>
> >>
> >>
> >>
> >>
> >>
> >> 在 2023-12-07 18:48:13，"Keith Zhao" 写道：
> >>>
> >>>
> >>>On 2023/12/7 17:02, Andy Yan wrote:
On Fri, 21 Jul 2023 09:14:46 -0700, Ziqi Zhao wrote:
> The connector_set contains uninitialized values when allocated with
> kmalloc_array. However, in the "out" branch, the logic assumes that any
> element in connector_set would be equal to NULL if failed to
> initialize, which causes the bug repo
On 2023/12/8 8:52, Mina Almasry wrote:
> Overload the LSB of struct page* to indicate that it's a page_pool_iov.
>
> Refactor mm calls on struct page* into helpers, and add page_pool_iov
> handling on those helpers. Modify callers of these mm APIs with calls to
> these helpers instead.
>
> In are
On Fri, 08 Dec 2023 04:03:13 +0300, Dmitry Baryshkov wrote:
> The drm_atomic_helper_check_wb_encoder_state() function doesn't use
> encoder for anything other than getting the drm_device instance. The
> function's description talks about checking the writeback connector
> state, not the encoder sta
On Fri, 08 Dec 2023 04:03:14 +0300, Dmitry Baryshkov wrote:
> As the renamed drm_atomic_helper_check_wb_connector_state() now accepts
> drm_writeback_connector as the first argument (instead of drm_encoder),
> move the VKMS writeback atomic_check from drm_encoder_helper_funcs to
> drm_connector_hel
On Wed, 06 Dec 2023 17:37:24 +0300, Dan Carpenter wrote:
> This code dereferences "page->pvr_dev" and then checked for NULL on the
> next line. Re-order it to avoid a potential NULL pointer dereference.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
On Fri, 08 Dec 2023 08:30:34 +0800, Yang Li wrote:
> ./drivers/gpu/drm/imagination/pvr_fw_trace.c:251:2-3: Unneeded semicolon
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
On 08.12.23 08:57, Kasireddy, Vivek wrote:
Hi David,
On 05.12.23 06:35, Vivek Kasireddy wrote:
For drivers that would like to longterm-pin the pages associated
with a memfd, the pin_user_pages_fd() API provides an option to
not only pin the pages via FOLL_PIN but also to check and migrate
th
'wb_info' needs to be freed on error paths or it would leak the memory.
Smatch pointed this out.
Fixes: c81e13b929df ("drm/amd/display: Hande writeback request from userspace")
Signed-off-by: Harshit Mogalapalli
---
This is based on static analysis and only compile tested
---
drivers/gpu/drm/am
On Thu, 07 Dec 2023, kernel test robot wrote:
> Hello,
>
> kernel test robot noticed "assertion_failure" on:
>
> commit: 9bb66c179f50e61df20ba13c9b34ca17d00b05fb ("drm/i915: Reserve some
> kernel space per vm")
> git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
>
> in testcase: igt
So t
Am 07.12.23 um 16:11 schrieb Arunpravin Paneer Selvam:
Add clear page support in vram memory region.
The first patch looks good, but this here needs quite some work.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c| 13 +++--
.../gpu/drm/amd/amdg
From: Thierry Reding
Commit 12c9b05da918 ("drm/nouveau/imem: support allocations not
preserved across suspend") uses container_of() to cast from struct
nvkm_memory to struct nvkm_instobj, assuming that all instance objects
are derived from struct nvkm_instobj. For the gk20a family that's not
the
On 25 November 2023 at 01:35 pm, Christian Zigotzky wrote:
On 25 November 2023 at 01:22 pm, Christian Zigotzky wrote:
On 25 November 2023 at 12:09 pm, John Paul Adrian Glaubitz wrote:
On Sat, 2023-11-25 at 11:06 +0100, Christian Zigotzky wrote:
Could you please revert the v2 patch because of t
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> For YUV cases, setting the required format bits was missed
> out in the register programming. Lets fix it now in preparation
> of adding YUV formats support for writeback.
>
> changes in v2:
> - dropped the fixes tag as its not a fix but ad
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Since the type and usage of CSC matrices is spanning across DPU
> lets introduce a helper to the dpu_hw_util to return the CSC
> corresponding to the request type. This will help to add more
> supported CSC types such as the RGB to YUV one whic
On 12/06, Melissa Wen wrote:
> On 11/08, Harry Wentland wrote:
> > Unit testing this in VKMS shows that passing 0 into
> > this function returns -1, which is highly counter-
> > intuitive. Fix it by checking whether the input is
> > >= 0 instead of > 0.
> >
> Nice finding. Thanks!
>
> Could you a
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add CDM blocks to the sc7280 dpu_hw_catalog to support
> YUV format output from writeback block.
>
> changes in v2:
> - remove explicit zero assignment for features
> - move sc7280_cdm to dpu_hw_catalog from the sc7280
>
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add CDM blocks to the sc7280 dpu_hw_catalog to support
> YUV format output from writeback block.
>
> changes in v2:
> - remove explicit zero assignment for features
> - move sc7280_cdm to dpu_hw_catalog from the sc7280
>
On Wed, 8 Nov 2023 11:36:25 -0500
Harry Wentland wrote:
> v3:
> - Describe DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE (Sebastian)
> - Ask for clear documentation of colorop behavior (Sebastian)
>
> v2:
> - Update colorop visualizations to match reality (Sebastian, Alex Hung)
> - Updated wording (Pe
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add CDM blocks to the sm8250 dpu_hw_catalog to support
> YUV format output from writeback block.
>
> changes in v2:
> - re-use the cdm definition from sc7280
>
> Signed-off-by: Abhinav Kumar
> ---
> drivers/gpu/drm/msm/disp/dpu1/catal
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add the RM APIs necessary to initialize and allocate CDM
> blocks to be used by the rest of the DPU pipeline.
>
> changes in v2:
> - treat cdm_init() failure as fatal
> - fixed the commit text
>
> Signed-off-by: Abhinav Kumar
>
On Wed, 8 Nov 2023 11:36:26 -0500
Harry Wentland wrote:
> This patches introduces a new drm_colorop mode object. This
> object represents color transformations and can be used to
> define color pipelines.
>
> We also introduce the drm_colorop_state here, as well as
> various helpers and state tr
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Even though there is usually only one CDM block, it can be
> used by either HDMI, DisplayPort OR Writeback interfaces.
>
> Hence its allocation needs to be tracked properly by the
> resource manager to ensure appropriate availability of the
> b
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> CDM block will need its own logic to program the flush and active
> bits in the dpu_hw_ctl layer.
>
> Make necessary changes in dpu_hw_ctl to support CDM programming.
>
> changes in v2:
> - remove unused empty line
> - pass in c
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> In preparation of setting up CDM block, add the logic to disable it
> properly during encoder cleanup.
>
> changes in v2:
> - call update_pending_flush_cdm even when bind_pingpong_blk
> is not present
>
> Signed-off-by: Abhina
On Wed, 8 Nov 2023 11:36:27 -0500
Harry Wentland wrote:
> Add a read-only TYPE property. The TYPE specifies the colorop
> type, such as enumerated curve, 1D LUT, CTM, 3D LUT, PWL LUT,
> etc.
>
> v3:
> - Make TYPE a range property
> - Move enum drm_colorop_type to uapi header
> - Fix drm_get_c
On Wed, 8 Nov 2023 11:36:25 -0500
Harry Wentland wrote:
> v3:
> - Describe DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE (Sebastian)
> - Ask for clear documentation of colorop behavior (Sebastian)
>
> v2:
> - Update colorop visualizations to match reality (Sebastian, Alex Hung)
> - Updated wording (Pe
https://bugzilla.kernel.org/show_bug.cgi?id=218241
Bug ID: 218241
Summary: amdgpu: MODE2 reset
Product: Drivers
Version: 2.5
Kernel Version: 6.6.5
Hardware: AMD
OS: Linux
Status: NEW
Severity: normal
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Lets rename the existing wb2_formats array wb2_formats_rgb to indicate
> that it has only RGB formats and can be used on any chipset having a WB
> block.
>
> Introduce a new wb2_formats_rgb_yuv array to the catalog to
> indicate support for YUV
On Wed, 8 Nov 2023 11:36:28 -0500
Harry Wentland wrote:
> Signed-off-by: Harry Wentland
> ---
> drivers/gpu/drm/drm_atomic_uapi.c | 18 ++
> drivers/gpu/drm/drm_colorop.c | 39 +++
> include/drm/drm_colorop.h | 20
> 3 files c
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Add an API dpu_encoder_helper_phys_setup_cdm() which can be used by
> the writeback encoder to setup the CDM block.
>
> Currently, this is defined and used within the writeback's physical
> encoder layer however, the function can be modified to
On Wed, 8 Nov 2023 11:36:32 -0500
Harry Wentland wrote:
> We're adding a new enum COLOR PIPELINE property. This
> property will have entries for each COLOR PIPELINE by
> referencing the DRM object ID of the first drm_colorop
> of the pipeline. 0 disables the entire COLOR PIPELINE.
I didn't find
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> Reserve CDM blocks for writeback if the format of the output fb
> is YUV. At the moment, the reservation is done only for writeback
> but can easily be extended by relaxing the checks once other
> interfaces are ready to output YUV.
>
> changes
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
>
> CDM block comes with its own set of registers and operations
> which can be done. In-line with other hardware sub-blocks, this
I always thought that sub-blocks refer to the dpu_foo_sub_blks data,
which CDM doesn't have.
> change adds the dpu
On Fri, 8 Dec 2023 at 07:06, Abhinav Kumar wrote:
>
> Chroma Down Sampling (CDM) block is a hardware block in the DPU pipeline
> which among other things has a CSC block that can convert RGB input
> from the DPU to YUV data.
This block is more or less standard between all hw versions. I do not
ex
On Wed, 8 Nov 2023 11:36:34 -0500
Harry Wentland wrote:
> This patch introduces a VKMS color pipeline that includes two
> drm_colorops for named transfer functions. For now the only ones
> supported are sRGB EOTF, sRGB Inverse EOTF, and a Linear TF.
> We will expand this in the future but I don't
On Fri, Dec 08, 2023 at 10:08:28AM +0200, Pekka Paalanen wrote:
> On Thu, 7 Dec 2023 15:27:33 +0100
> Maxime Ripard wrote:
>
> > On Tue, Dec 05, 2023 at 10:51:06AM +0200, Pekka Paalanen wrote:
> > > On Mon, 4 Dec 2023 13:17:06 +0100
> > > Maxime Ripard wrote:
> > >
> > > > The current docume
On Wed, 8 Nov 2023 11:36:36 -0500
Harry Wentland wrote:
> With the introduction of the pre-blending color pipeline we
> can no longer have color operations that don't have a clear
> position in the color pipeline. We deprecate all existing
> plane properties. For upstream drivers those are:
> -
On Wed, 8 Nov 2023 11:36:37 -0500
Harry Wentland wrote:
> This type is used to support a 3x4 matrix in colorops. A 3x4
> matrix uses the last column as a "bias" column. Some HW exposes
> support for 3x4. The calculation looks like:
>
> out matrixin
> |R| |0 1 2 3 | | R |
> |G| =
This function may copy the pad0 field of struct hl_info_sec_attest to user
mode which has not been initialized, resulting in leakage of kernel heap
data to user mode. To prevent this, use kzalloc() to allocate and zero out
the buffer, which can also eliminate other uninitilized holes, if any.
Fixe
On Wed, 8 Nov 2023 11:36:39 -0500
Harry Wentland wrote:
> Certain operations require us to preserve values below 0.0 and
> above 1.0 (0x0 and 0x respectively in 16 bpc unorm). One
> such operation is a BT709 encoding operation followed by its
> decoding operation, or the reverse.
>
> We'll u
On Fri, 21 Jul 2023, Ziqi Zhao wrote:
> The connector_set contains uninitialized values when allocated with
> kmalloc_array. However, in the "out" branch, the logic assumes that any
> element in connector_set would be equal to NULL if failed to
> initialize, which causes the bug reported by Syzbot
On Wed, 8 Nov 2023 11:36:40 -0500
Harry Wentland wrote:
> We add two 3x4 matrices into the VKMS color pipeline. The reason
> we're adding matrices is so that we can test that application
> of a matrix and its inverse yields an output equal to the input
> image.
Would it not be better to mimic wh
Commit 3823119b9c2b ("drm/crtc: Fix uninit-value bug in
drm_mode_setcrtc") was supposed to fix use of an uninitialized variable,
but introduced another.
num_connectors is only initialized if crtc_req->count_connectors > 0,
but it's used regardless. Fix it.
Fixes: 3823119b9c2b ("drm/crtc: Fix unin
On Sun, 12 Nov 2023 19:43:59 +0100, Krzysztof Kozlowski wrote:
> Compatibles should not use quotes in the bindings.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/gpu/samsung-rotator.yaml | 9 +
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
Appli
On Wed, 8 Nov 2023 11:36:42 -0500
Harry Wentland wrote:
> A whole slew of tests for CTM handling that greatly helped in
> debugging the CTM code. The extent of tests might seem a bit
> silly but they're fast and might someday help save someone
> else's day when debugging this.
To be honest, this
On Fri, 8 Dec 2023 13:25:22 +0100
Maxime Ripard wrote:
> On Fri, Dec 08, 2023 at 10:08:28AM +0200, Pekka Paalanen wrote:
> > On Thu, 7 Dec 2023 15:27:33 +0100
> > Maxime Ripard wrote:
> >
> > > On Tue, Dec 05, 2023 at 10:51:06AM +0200, Pekka Paalanen wrote:
> > > > On Mon, 4 Dec 2023 13:17
On 04/12/2023 17:33, Boris Brezillon wrote:
> MMU and VM management is related and placed in the same source file.
>
> Page table updates are delegated to the io-pgtable-arm driver that's in
> the iommu subsystem.
>
> The VM management logic is based on drm_gpuva_mgr, and is assuming the
> VA spa
On Wed, 29 Nov 2023 15:43:57 +0100, Konrad Dybcio wrote:
> This series brings:
> - interconnect plumbing
> - display setup
>
> for QCM2290/QRB2210 and
>
> - CAN bus controller
> - HDMI display
> - wifi fw variant name
>
> [...]
Applied, thanks!
[04/12] dt-bindings: firmware: qcom,scm: Allow
https://bugzilla.kernel.org/show_bug.cgi?id=218241
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
On Fri, 08 Dec 2023 15:12:38 +0200, Jani Nikula wrote:
> Commit 3823119b9c2b ("drm/crtc: Fix uninit-value bug in
> drm_mode_setcrtc") was supposed to fix use of an uninitialized variable,
> but introduced another.
>
> num_connectors is only initialized if crtc_req->count_connectors > 0,
> but it's
On Fri, Dec 08, 2023 at 03:59:46PM +0200, Pekka Paalanen wrote:
> On Fri, 8 Dec 2023 13:25:22 +0100
> Maxime Ripard wrote:
>
> > On Fri, Dec 08, 2023 at 10:08:28AM +0200, Pekka Paalanen wrote:
> > > On Thu, 7 Dec 2023 15:27:33 +0100
> > > Maxime Ripard wrote:
> > >
> > > > On Tue, Dec 05, 202
On Sat, Dec 02, 2023 at 01:51:40PM +0100, Alex Bee wrote:
> For RK3128 the powerdomains PD_PERI, PD_SYS and PD_CRYPTO are currently
> missing.
> Add them.
>
> Signed-off-by: Alex Bee
> ---
> drivers/pmdomain/rockchip/pm-domains.c | 13 -
> include/dt-bindings/power/rk3128-power.h |
On 04/12/2023 17:33, Boris Brezillon wrote:
> Contains everything that's FW related, that includes the code dealing
> with the microcontroller unit (MCU) that's running the FW, and anything
> related to allocating memory shared between the FW and the CPU.
>
> A few global FW events are processed i
Hi Mina,
kernel test robot noticed the following build errors:
[auto build test ERROR on net-next/main]
url:
https://github.com/intel-lab-lkp/linux/commits/Mina-Almasry/net-page_pool-factor-out-releasing-DMA-from-releasing-the-page/20231208-085531
base: net-next/main
patch link:
https
Hi Mina,
kernel test robot noticed the following build warnings:
[auto build test WARNING on net-next/main]
url:
https://github.com/intel-lab-lkp/linux/commits/Mina-Almasry/net-page_pool-factor-out-releasing-DMA-from-releasing-the-page/20231208-085531
base: net-next/main
patch link
On Wed, Dec 06, 2023 at 12:43:14PM +0100, Uwe Kleine-König wrote:
> Hello,
>
> This series is based on Thierry's for-next.
>
> It starts with some cleanups that were all sent out separately already:
>
> - "pwm: Reduce number of pointer dereferences in pwm_device_request()"
>
> https://lore.
From: Chris Morgan
The AVCL register, according to the datasheet, comes in increments
of -0.2v between -4.4v (represented by 0x0) to -5.0v (represented
by 0x3). The current calculation is done by adding the defined
AVCL value in mV to -4400 and then dividing by 200 to get the register
value. Unfo
From: Chris Morgan
Add support for the Anbernic RG-ARC display panel as used in the
RG-ARC S and RG-ARC D handheld gaming devices from Anbernic.
Chris Morgan (3):
drm/panel: st7701: Fix AVCL calculation
dt-bindings: display: st7701: Add Anbernic RG-ARC panel
drm/panel: st7701: Add Anbernic
From: Chris Morgan
The Powkiddy RG-ARC is a series of 2 handheld devices, each with a 4
inch 480x640 display. Add support for the display.
Signed-off-by: Chris Morgan
---
drivers/gpu/drm/panel/panel-sitronix-st7701.c | 136 ++
1 file changed, 136 insertions(+)
diff --git a/dri
From: Chris Morgan
The RG-ARC panel is a panel specific to the Anbernic RG-ARC. It is 4
inches in size (diagonally) with a resolution of 480x640.
Signed-off-by: Chris Morgan
---
.../devicetree/bindings/display/panel/sitronix,st7701.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git
On Tue, Dec 05 2023 at 18:45, Yoshinori Sato wrote:
> +static void endisable_irq(struct irq_data *data, int enable)
bool enable?
> +{
> + struct sh7751_intc_priv *priv;
> + unsigned int irq;
> +
> + priv = irq_data_to_priv(data);
> +
> + irq = irqd_to_hwirq(data);
> + if (!is_
Included authors and latest (non-white-space) contributors to the drivers
in question along with relevant mailing list and respective (active in the
area) maintainers.
I already had risen the question in times when 4th (sic!) driver for the same
hardware was about to be pulled into upstream that w
Hi Mina,
kernel test robot noticed the following build warnings:
[auto build test WARNING on net-next/main]
url:
https://github.com/intel-lab-lkp/linux/commits/Mina-Almasry/net-page_pool-factor-out-releasing-DMA-from-releasing-the-page/20231208-085531
base: net-next/main
patch link
On Fri, Dec 8, 2023 at 1:30 AM Yunsheng Lin wrote:
>
>
> As mentioned before, it seems we need to have the above checking every
> time we need to do some per-page handling in page_pool core, is there
> a plan in your mind how to remove those kind of checking in the future?
>
I see 2 ways to remov
Hi Andy,
Am Donnerstag, 7. Dezember 2023, 08:59:06 CET schrieb Andy Yan:
> From: Andy Yan
>
> This patch sets aims at enable the VOP2 support on rk3588.
>
> Main feature of VOP2 on rk3588:
> Four video ports:
> VP0 Max 4096x2160
> VP1 Max 4096x2160
> VP2 Max 4096x2160
> VP3 Max 2048x1080
>
> 4
Unwinding loop in error path for this function uses unsigned limit
variable, causing the promotion of the signed counter variable.
--> 204 for (; pfn >= start_pfn; pfn--)
If start_pfn can be zero then this is an endless loop. I've seen this
code in
Hi Dave & Sima,
A rather late first drm-intel-gt-next PR towards v6.8.
As most significant change we have addition of the DRM fdinfo memory stats
functionality. Then DG2 and MTL workaround additions and fixes and a few
for older platforms as well. PMU WARN_ON splat cleanup.
The rest is mostly co
On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Since the type and usage of CSC matrices is spanning across DPU
lets introduce a helper to the dpu_hw_util to return the CSC
corresponding to the request type. This will help to add more
supporte
Hi Andy,
Am Donnerstag, 7. Dezember 2023, 09:02:47 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add vop dt node for rk3588.
>
> Signed-off-by: Andy Yan
> ---
>
> (no changes since v1)
>
> arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 96 +++
> 1 file changed, 96 insertions(+
On Fri, 8 Dec 2023 at 18:24, Abhinav Kumar wrote:
>
>
>
> On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
> > On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar
> > wrote:
> >>
> >> Since the type and usage of CSC matrices is spanning across DPU
> >> lets introduce a helper to the dpu_hw_util to return th
On 04/12/2023 17:33, Boris Brezillon wrote:
> Tiler heap growing requires some kernel driver involvement: when the
> tiler runs out of heap memory, it will raise an exception which is
> either directly handled by the firmware if some free heap chunks are
> available in the heap context, or passed b
Am Donnerstag, 7. Dezember 2023, 09:02:35 CET schrieb Andy Yan:
> From: Andy Yan
>
> Add a Rockchip RK3588 compatible
>
> Signed-off-by: Andy Yan
Reviewed-by: Heiko Stuebner
In the next iteration, please split this out into a separate patch and send
it to the iommu+dt maintainers.
Supportin
While writing the matching IGT suite I discovered that it's possible to
cause a kernel oops when using DRM_IOCTL_PVR_CREATE_HWRT_DATASET when
the call to hwrt_init_common_fw_structure() fails.
Use an unwind-type error path to avoid cleaning up the object using the
the release function before it is
On Mon, Dec 04, 2023 at 08:33:10PM +0800, Keith Zhao wrote:
> StarFive SoCs JH7110 display system:
> dc controller, hdmi controller,
> encoder, vout syscon.
What are yamls?
I prefer not using 'yaml' as yaml is lots of things that are not DT
schema.
Rob
A pair of fixes to the driver. First one is an improvement to dma_buf
handling based on a greater understanding of that framework. The second
is a reliability fix that allows some cards to boot.
Jeffrey Hugo (1):
accel/qaic: Implement quirk for SOC_HW_VERSION
Pranjal Ramajor Asha Kanojiya (1):
The SOC_HW_VERSION register in the BHI space is not correctly initialized
by the device and in many cases contains uninitialized data. The register
could contain 0x which is a special value to indicate a link
error in PCIe, therefore if observed, we could incorrectly think the
device is dow
From: Pranjal Ramajor Asha Kanojiya
Do not modify the size of dmabuf as it is immutable.
Fixes: ff13be830333 ("accel/qaic: Add datapath")
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/qaic/qaic_data.c | 6 ++
1 file c
On Wed, Dec 06, 2023 at 08:50:29PM +0800, Sui Jingfeng wrote:
> Hi,
>
>
> On 2023/12/4 20:33, Keith Zhao wrote:
> > StarFive SoCs JH7110 display system:
> > dc controller, hdmi controller,
> > encoder, vout syscon.
[...]
> > +description:
> > + The StarFive JH7110 SoC uses the HDMI signal tran
On 12/8/2023 3:54 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Reserve CDM blocks for writeback if the format of the output fb
is YUV. At the moment, the reservation is done only for writeback
but can easily be extended by relaxing the checks once other
inte
From: Pranjal Ramajor Asha Kanojiya
->queued field is used to track whether the BO is submitted to hardware for
DMA or not. Since same information can be retrieved using ->xfer_list field
of same structure remove ->queued as it is redundant.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed
The timesync channels have their struct fields out of order with the rest
of the channels. Fix them so there is a consistent style in the file.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
---
drivers/accel/qaic/mhi_controller.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(
From: Pranjal Ramajor Asha Kanojiya
Every time QAIC_MMAP_BO ioctl is called for a BO,
drm_gem_create_mmap_offset() is called. Calling
drm_gem_create_mmap_offset() more then once for a BO seems redundant.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeff
From: Pranjal Ramajor Asha Kanojiya
Offload the balancing of init and destroy calls to DRM managed APIs.
mutex destroy for ->cntl_mutex is not called during device release and
destroy workqueue is not called in error path of create_qdev(). So, use
DRM managed APIs to manage the release of resourc
From: Pranjal Ramajor Asha Kanojiya
->size in struct qaic_attach_slice_hdr is redundant since we have BO handle
and its size can be retrieved from base BO structure.
Signed-off-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Jeffrey Hugo
Signed-off-by: Jeffrey Hugo
---
drivers/accel/qaic/qaic
On 12/8/2023 8:27 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 18:24, Abhinav Kumar wrote:
On 12/8/2023 3:12 AM, Dmitry Baryshkov wrote:
On Fri, 8 Dec 2023 at 07:07, Abhinav Kumar wrote:
Since the type and usage of CSC matrices is spanning across DPU
lets introduce a helper to th
In probe() we create the drm_device, and then register the MHI controller.
In remove(), we should unregister the controller first, then remove the
drm_device. Update the remove() operations to match.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Pranjal Ramajor Asha Kanojiya
Reviewed-by: Carl Vander
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