Hi Conor,
...
> > > > > > The two properties:
> > > > > >
> > > > > > - max-brightness
> > > > > > - default brightness
> > > > > >
> > > > > > are not really required, so they can be removed from the "required"
> > > > > > section.
> > > > >
> > > > > Why are they not required? You need to provi
Add support for rendering the crosshairs in a buffer using the
big-endian RGB565 format.
Signed-off-by: Geert Uytterhoeven
---
v3:
- No changes,
v2:
- New.
---
tests/util/pattern.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/util/pattern.c b/tests/util/pattern.c
index aeac84a9
Add support for drawing the SMPTE and tiles test patterns in buffers
using big-endian formats.
For now this is limited to XRGB1555 and RGB565, which are the most
common big-endian formats.
Signed-off-by: Geert Uytterhoeven
---
v3:
- Increase indentation after definition of cpu_to_be16(),
v2:
Signed-off-by: Geert Uytterhoeven
---
v3:
- Update for suffix change from "be" to "_BE", cfr. commit
ffb9375a505700ad ("xf86drm: handle DRM_FORMAT_BIG_ENDIAN in
drmGetFormatName()"),
v2:
- New.
---
tests/util/format.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tests/util/
Cairo always uses native byte order for rendering.
Hence if the byte order of the frame buffer differs from the byte order
of the CPU, the frame buffer contents need to be byteswapped twice: once
before rendering, to convert to native byte order, and a second time
after rendering, to restore the f
DRM formats are defined to be little-endian, unless the
DRM_FORMAT_BIG_ENDIAN flag is set. Hence writes of multi-byte pixel
values need to take endianness into account.
Introduce a swap16() helper to byteswap 16-bit values, and a
cpu_to_le16() helper to convert 16-bit values from CPU-endian to
li
Add support for creating buffers using big-endian formats.
For now this is limited to XRGB1555 and RGB565, which are the most
common big-endian formats.
Signed-off-by: Geert Uytterhoeven
---
v3:
- No changes,
v2:
- New.
---
tests/modetest/buffers.c | 4
1 file changed, 4 insertions(+)
- sparc64-linux-gnu-gcc does not define __BIG_ENDIAN__ or SPARC, but
does define __sparc__, hence replace the check for SPARC by a check
for __sparc__,
- powerpc{,64,64}-linux-gnu-gcc does not define __ppc__ or __ppc64__,
but does define __BIG_ENDIAN__.
powerpc64le-linux-gnu-gcc
DRM formats are defined to be little-endian, unless the
DRM_FORMAT_BIG_ENDIAN flag is set. Hence writes of multi-byte pixel
values need to take endianness into account.
Introduce a swap32() helper to byteswap 32-bit values, and a
cpu_to_le32() helper to convert 32-bit values from CPU-endian to
li
When specifying a frame buffer format like "RG16_BE" (big-endian RG16),
modetest still uses the little-endian variant, as the format string is
truncated to four characters.
Fix this by increasing the format string size to 8 bytes (7 characters +
NUL terminator).
Signed-off-by: Geert Uytterhoeven
Hi all,
This patch series fixes some endianness issues in libdrm.
It has been tested on ARAnyM using a work-in-progress Atari DRM driver.
After this, the smpte and tiles modetest patterns and the pwetty markers
are rendered correctly using the XR24, RG16, and RG16BE formats on
big-endian s
Hi Jani,
On Mon, Oct 23, 2023 at 02:42:56PM +0300, Jani Nikula wrote:
> On Sat, 14 Oct 2023, Alvin Šipraga wrote:
> > @@ -457,6 +460,9 @@ static void adv7511_hpd_work(struct work_struct *work)
> > if (adv7511->connector.dev) {
> > if (status == connector_status_dis
On Wed, 2023-09-27 at 12:26 +0200, Thomas Zimmermann wrote:
> Unregister all in-kernel clients before unloading the i915 driver.
> For
> other drivers, drm_dev_unregister() does this automatically. As i915
> does not use this helper, it has to perform the call by itself.
>
> Note that there are cu
Hi,
On Tue, 24 Oct 2023, Salvatore Bonaccorso wrote:
Thanks for the excelent constructed report! I think it's best to
forward this directly to upstream including the people for the
bisected commit to get some idea.
Thanks for the quick reply!
Can you reproduce the issue with 6.5.8-1 in unsta
The SM8650 MDSS is very close from the MDSS 9.0.0 found
on the SM8550 SoC, with the following difference:
- DSI PHY 2.8.8, no significant differences
- DPU 10.0.0:
- Enhanced max_linewidth to 8k
- PINGPONG_8 & PINGPONG_9
- MERGE_3D_4
- DSC_4 & DSC_5, DSC_NATIVE_42x on DSC0/1
This patchset
Document the DSI PHY on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml
b/Documentation/devicetree/bindings/di
Document the DSI Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/dsi-controller-main.yaml
b/Documentat
Document the DPU Display Controller on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-dpu.yaml | 127 +
1 file changed, 127 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-dpu.yaml
b/Docu
Add Mobile Display Subsystem (MDSS) support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/msm_mdss.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 6865db1e3ce8..33947a2e313c 100644
--- a/
Document the Mobile Display Subsystem (MDSS) on the SM8650 Platform.
Signed-off-by: Neil Armstrong
---
.../bindings/display/msm/qcom,sm8650-mdss.yaml | 322 +
1 file changed, 322 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/msm/qcom,sm8650-mdss.y
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
.../drm/msm/disp/dpu1/catalog/dpu_10_0_sm8650.h| 458 +
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 23 ++
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 +
drivers
Add DSI Controller version 2.8.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 17 +
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 18 insertions(+)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_cfg.c
b/drivers/gpu
Add DSI PHY support for the SM8650 platform.
Signed-off-by: Neil Armstrong
---
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +++
3 files changed, 30 insertions(+)
diff
On 24/10/2023 22:30, Rob Herring wrote:
On Mon, Oct 23, 2023 at 04:40:05PM +0200, Alexandre Mergnat wrote:
Display Serial Interface for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
Signed-off-by: Alexandre Mergnat
---
Documentation/devicetree/bind
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
>
> Add DPU version 10.0 support for the SM8650 platform.
>
> Signed-off-by: Neil Armstrong
Thanks for your patch. Could you please rebase it on top of
https://patchwork.freedesktop.org/series/119804/ ?
> ---
> .../drm/msm/disp/dpu1/catalog/d
On Wed, 2023-09-27 at 12:26 +0200, Thomas Zimmermann wrote:
> Move functions within intel_fbdev.c to simplify later updates. Minor
> style fixes to make checkpatch happy, but no functional changes.
>
> v5:
> * style fixes (checkpatch)
>
> Signed-off-by: Thomas Zimmermann
Reviewed-by: Jo
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
>
> Add Mobile Display Subsystem (MDSS) support for the SM8650 platform.
>
> Signed-off-by: Neil Armstrong
Reviewed-by: Dmitry Baryshkov
> ---
> drivers/gpu/drm/msm/msm_mdss.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/
On 25/10/2023 09:49, Dmitry Baryshkov wrote:
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
Add DPU version 10.0 support for the SM8650 platform.
Signed-off-by: Neil Armstrong
Thanks for your patch. Could you please rebase it on top of
https://patchwork.freedesktop.org/series/119804/
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
>
> Add DSI PHY support for the SM8650 platform.
>
> Signed-off-by: Neil Armstrong
> ---
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.c | 2 ++
> drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 +
> drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 27 +
On Wed, 25 Oct 2023 at 10:35, Neil Armstrong wrote:
>
> Add DSI Controller version 2.8.0 support for the SM8650 platform.
>
> Signed-off-by: Neil Armstrong
> ---
> drivers/gpu/drm/msm/dsi/dsi_cfg.c | 17 +
> drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
> 2 files changed, 18 insertio
fix a typo in a comments.
Signed-off-by: Kunwu Chan
---
drivers/gpu/drm/drm_atomic_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_atomic_helper.c
b/drivers/gpu/drm/drm_atomic_helper.c
index 2444fc33dd7c..c3f677130def 100644
--- a/drivers/gpu
On 26/09/2023 23:03, Konrad Dybcio wrote:
On 26.09.2023 21:10, Danila Tikhonov wrote:
I think you mean by name downstream dt - sdmmagpie-gpu.dtsi
You can see the forked version of the mainline here:
https://github.com/sm7150-mainline/linux/blob/next/arch/arm64/boot/dts/qcom/sm7150.dtsi
All fd
Hi!
> > An orthogonal issue is labeling all of those regions. I think we should
> > start with fully obscured areas and maybe less readable ones like the
> > waterfall edges. Still, different features should live on different
> > masks – even if we don't attach meaningfull labels (like 'notch' or
Hi Thomas, One minor comment inline below.
On Wed, 2023-09-27 at 12:26 +0200, Thomas Zimmermann wrote:
> Initialize i915's fbdev client by giving an instance of struct
> drm_client_funcs to drm_client_init(). Also clean up with
> drm_client_release().
>
> Doing this in i915 prevents fbdev helpers
Hi,
On Tue, Oct 24, 2023 at 07:14:25PM +0200, Marco Pagani wrote:
> >> +static void drm_gem_shmem_test_obj_create_private(struct kunit *test)
> >> +{
> >> + struct fake_dev *fdev = test->priv;
> >> + struct drm_gem_shmem_object *shmem;
> >> + struct drm_gem_object *gem_obj;
> >> + struct dma_b
fix a misspelling of "concurrent".
Signed-off-by: Kunwu Chan
---
drivers/gpu/drm/imx/dcss/dcss-ctxld.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/dcss/dcss-ctxld.c
b/drivers/gpu/drm/imx/dcss/dcss-ctxld.c
index 3a84cb3209c4..28727a8cb7e3 100644
--- a/
Hi Andy,
On Tue, Oct 24, 2023 at 06:57:33PM +0300, Andy Shevchenko wrote:
> Move existing condition to while(), so it will be clear on what
> circumstances the loop is successfully finishing.
>
> Signed-off-by: Andy Shevchenko
Reviewed-by: Andi Shyti
Andi
Hi Andy,
On Tue, Oct 24, 2023 at 06:57:34PM +0300, Andy Shevchenko wrote:
> In the snippets like the following
>
> if (...)
> return / goto / break / continue ...;
> else
> ...
>
> the 'else' is redundant. Get rid of it.
>
> Signed-off-by: Andy Shevchenko
On Tue, Oct 24, 2023 at 06:57:35PM +0300, Andy Shevchenko wrote:
> Names of the MIPI sequence steps are sequential and defined, no
> need to check for the gaps. However in seq_name the MIPI_SEQ_END
> is missing. Add it there, and drop unneeded NULL check in
> sequence_name().
>
> Signed-off-by: An
From: Abel Vesa
In case of the eDP connection there is no subconnetor and as such no
subconnector property. Put drm_dp_set_subconnector_property() calls
under the !is_edp condition.
Fixes: bfcc3d8f94f4 ("drm/msm/dp: support setting the DP subconnector type")
Signed-off-by: Abel Vesa
Signed-off-
Fix two failovers in the DP subconnector's patch. I didn't notice that I
had another patch adding the property in my tree and later Abel pointed
out that we shouldn't use subconnector type for eDP panels.
Fixes since v1:
- Add Abel's patch.
Abel Vesa (1):
drm/msm/dp: don't touch DP subconnecto
While developing and testing the commit bfcc3d8f94f4 ("drm/msm/dp:
support setting the DP subconnector type") I had the patch [1] in my
tree. I haven't noticed that it was a dependency for the commit in
question. Mea culpa.
Since the patch has not landed yet (and even was not reviewed)
and since o
Hi Thomas, couple of inline commments/suggestions below.
On Wed, 2023-09-27 at 12:26 +0200, Thomas Zimmermann wrote:
> Move code from ad-hoc fbdev callbacks into DRM client functions
> and remove the old callbacks. The functions instruct the client
> to poll for changed output or restore the displ
From: Karol Wachowski
Setting a non-zero work point resets the IP hence IP_RESET
trigger is redundant.
Signed-off-by: Karol Wachowski
Reviewed-by: Stanislaw Gruszka
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/ivpu_hw_37xx.c | 4
drivers/accel/ivpu/ivpu_hw_40xx.c | 6 --
From: Andrzej Kacprowski
Add test_mode = 3 that add VPU_JOB_FLAGS_NULL_SUBMISSION_MASK
flag to the job send to the VPU device. Then the VPU will process
the job but won't execute commands (except the command to signal
the fence).
This can b used to estimate job processing overhead in the host
so
Various driver updates:
- FW api update
- suspend/resume optimizations
- dynamic valtage and freqency mode knob
- new test modes
Andrzej Kacprowski (5):
accel/ivpu: Add support for VPU_JOB_FLAGS_NULL_SUBMISSION_MASK
accel/ivpu: Pass D0i3 residency time to the VPU firmware
accel/ivpu/4
From: Krystian Pradzynski
Bump boot API to 4.20
Bump JSM API to 3.15
Signed-off-by: Krystian Pradzynski
Reviewed-by: Stanislaw Gruszka
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/ivpu_jsm_msg.c | 17 ++
drivers/accel/ivpu/vpu_boot_api.h | 90 -
drivers/accel/ivpu/vpu_js
Cleanup drm_driver declaration leftover.
Reviewed-by: Krystian Pradzynski
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/ivpu_drv.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/accel/ivpu/ivpu_drv.c b/drivers/accel/ivpu/ivpu_drv.c
index 790603017653..346dd7fdcacb 100644
From: Karol Wachowski
Change meaning of test_mode module parameter from integer value
to bitmask allowing setting different test features with corresponding
bits.
Signed-off-by: Karol Wachowski
Reviewed-by: Stanislaw Gruszka
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/ivpu_drv.c
From: Karol Wachowski
Split ivpu_ipc_send_receive() implementation to have a version
that does not call pm_runtime_resume_and_get(). That implementation
can be invoked when device is up and runtime resume is prohibited
(for example at the end of boot sequence).
Signed-off-by: Karol Wachowski
Re
From: Andrzej Kacprowski
The firmware needs to know the time spend in D0i3/D3 to
calculate telemetry data. The D0i3/D3 residency time is
calculated by the driver and passed to the firmware
in the boot parameters.
The driver also passes VPU perf counter value captured
right before entering D0i3 -
From: Andrzej Kacprowski
The driver needs to capture the D0i3 entry timestamp to
calculate D0i3 residency time.
The D0i3 residency time and the VPU timestamp are passed
to the firmware at D0i3 exit (warm boot).
Signed-off-by: Andrzej Kacprowski
Reviewed-by: Stanislaw Gruszka
Signed-off-by: St
From: Tomasz Rusinowicz
Add new debugfs file to set dvfs_mode FW boot parameter and restart
the FW to allow experimenting with DVFS (dynamic voltage & frequency
scaling).
Signed-off-by: Tomasz Rusinowicz
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/ivpu_debugfs.c | 28 +
From: Andrzej Kacprowski
The VPU needs non zero time to enter IDLE state after responding to
D0i3 entry message. If the driver does not wait for the VPU to enter
IDLE state it could cause warm boot failures.
Signed-off-by: Andrzej Kacprowski
Reviewed-by: Stanislaw Gruszka
Signed-off-by: Stanis
From: Andrzej Kacprowski
Currently the VPU firmware prepares for D0i3 every time the VPU
is entering D0i2 Idle state. This is not optimal as we might not
enter D0i3 every time we enter D0i2 Idle and this preparation
is quite costly.
This optimization moves D0i3 preparation to a dedicated
message
On 13/10/2023 11:25, Dan Carpenter wrote:
This NULL check was required when it was added, but we shuffled the code
around and now it's not. The inconsistent NULL checking triggers a
Smatch warning:
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c:847 mdp5_init() warn:
variable dereferenced be
On Mon, Oct 23, 2023 at 02:34:17PM +0100, Daniel Thompson wrote:
> On Sun, Oct 22, 2023 at 11:46:22AM +0100, Sean Young wrote:
> > On Sat, Oct 21, 2023 at 11:08:22AM +0200, Hans de Goede wrote:
> > > On 10/19/23 12:51, Uwe Kleine-König wrote:
> > > > On Wed, Oct 18, 2023 at 03:57:48PM +0200, Hans d
Javier, Dave, Sima,
On 23.10.23 00:54, Evan Preston wrote:
> On 2023-10-20 Fri 05:48pm, Huacai Chen wrote:
>> On Fri, Oct 20, 2023 at 5:35 PM Linux regression tracking (Thorsten
>> Leemhuis) wrote:
>>> On 09.10.23 10:54, Huacai Chen wrote:
On Mon, Oct 9, 2023 at 4:45 PM Bagas Sanjaya wrote:
Hi,
On Tue 20 Jun 23, 11:56, Sui Jingfeng wrote:
> Hi,
>
> On 2023/6/8 15:15, Paul Kocialkowski wrote:
> > Hi,
> >
> > On Thu 08 Jun 23, 10:42, Sui Jingfeng wrote:
> > > drm/logicvc driver is depend on REGMAP and REGMAP_MMIO, should select this
> > > two kconfig option, otherwise the driver fail
g_val, gamma->regs + DISP_GAMMA_CFG);
Hello CK,
something went wrong while you applied this patch: this writel became a readl,
breaking mtk_disp_gamma entirely. Please check:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/drivers/gpu/drm/mediatek/mtk_disp_gamma.c?h=n
add hdmi driver as encoder and connect
Signed-off-by: Keith Zhao
---
drivers/gpu/drm/verisilicon/Kconfig | 8 +-
drivers/gpu/drm/verisilicon/Makefile| 1 +
drivers/gpu/drm/verisilicon/starfive_hdmi.c | 949
drivers/gpu/drm/verisilicon/starfive_hdmi.h | 29
StarFive SoCs JH7110 display system:
lcd-controller bases verisilicon dc8200 IP,
and hdmi bases Innosilicon IP. Add bindings for them.
also update MAINTAINERS for dt-bindings
about this patch, I tested the dtbs_check and dt_binding_check
with the result pass.
Based on the feedback of the previous
add 2 crtcs and 8 planes in vs-drm
Signed-off-by: Keith Zhao
---
drivers/gpu/drm/verisilicon/Makefile |8 +-
drivers/gpu/drm/verisilicon/vs_crtc.c | 257
drivers/gpu/drm/verisilicon/vs_crtc.h | 43 +
drivers/gpu/drm/verisilicon/vs_dc.c| 1002
drivers/gpu/drm/veri
Implement drm device registration interface
Thomas Zimmermann wrote:
You are replacing almost all of the GEM DMA object's helper code.
Either inherit directly from drm_gem_object drop the dependency entirely,
or you could try to fit your code into GEM DMA as well
Eventually I found an answer and
This patch is a drm driver for Starfive Soc JH7110,
I am sending Drm driver part and HDMI driver part.
We used GEM framework for buffer management , and
for buffer allocation,we use DMA APIs.
the Starfive HDMI servers as interface between a LCD
Controller and a HDMI bus. A HDMI TX consists of o
Hello,
On Wed, Oct 25, 2023 at 10:53:27AM +0100, Sean Young wrote:
> On Mon, Oct 23, 2023 at 02:34:17PM +0100, Daniel Thompson wrote:
> > On Sun, Oct 22, 2023 at 11:46:22AM +0100, Sean Young wrote:
> > > On Sat, Oct 21, 2023 at 11:08:22AM +0200, Hans de Goede wrote:
> > > > On 10/19/23 12:51, Uwe
While the commit that was sent to the mailing lists was fine, something
happened during merge and the mtk_gamma_set() function got broken as
a writel() was turned into a readl().
Fix that by changing that back to the expected writel().
Fixes: a6b39cd248f3 ("drm/mediatek: De-commonize disp_aal/dis
For each modifier, add the corresponding description
Signed-off-by: Keith Zhao
---
include/uapi/drm/drm_fourcc.h | 57 +++
1 file changed, 57 insertions(+)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 8db7fd3f7..a580a848c 10064
Add the dc controller and hdmi node for the Starfive JH7110 SoC.
Signed-off-by: Keith Zhao
---
.../jh7110-starfive-visionfive-2.dtsi | 91 +++
arch/riscv/boot/dts/starfive/jh7110.dtsi | 41 +
2 files changed, 132 insertions(+)
diff --git a/arch/riscv/boot/dt
Hi David,
EVoC is on hold at the current moment due to some bureaucracy issues.
I'm CCing other possible mentors, but at the moment, I'm not sure if a
EVoC project is possible.
Best Regards,
- Maíra
On 10/24/23 22:57, DAVID WALTERS wrote:
Hello,
I have a draft of a proposal that I would lik
Hi Thomas, couple of minor comments and a question below.
On Wed, 2023-09-27 at 12:26 +0200, Thomas Zimmermann wrote:
> Replace all code that initializes or releases fbdev emulation
> throughout the driver. Instead initialize the fbdev client by a
> single call to i915_fbdev_setup() after i915 has
On Tue, 24 Oct 2023, Andi Shyti wrote:
> Hi Jani,
>
>> > static void rc6_res_reg_init(struct intel_rc6 *rc6)
>> > {
>> > - memset(rc6->res_reg, INVALID_MMIO_REG.reg, sizeof(rc6->res_reg));
>>
>> That's just bollocks. memset() is byte granularity, while
>> INVALID_MMIO_REG.reg is u32. If the va
On Thu, Oct 19, 2023 at 02:19:51PM +0300, Dmitry Baryshkov wrote:
> On Thu, 19 Oct 2023 at 12:26, Maxime Ripard wrote:
> >
> > On Mon, Oct 16, 2023 at 07:53:48PM +0300, Dmitry Baryshkov wrote:
> > > The MIPI DSI links do not fully fall into the DRM callbacks model.
> >
> > Explaining why would hel
On 23/10/2023 12:09, Maxime Ripard wrote:
On Fri, Oct 20, 2023 at 01:33:59AM -0300, Helen Koike wrote:
On 19/10/2023 13:51, Helen Koike wrote:
On 19/10/2023 06:46, Maxime Ripard wrote:
Flaky tests can be very difficult to reproduce after the facts, which
will make it even harder to ever fix
On 25/10/2023 12:39, Keith Zhao wrote:
> StarFive SoCs JH7110 display system:
A nit, subject: drop second/last, redundant "yamls for". The
"dt-bindings" prefix is already stating that these are bindings, so
format is fixed.
> lcd-controller bases verisilicon dc8200 IP,
> and hdmi bases Innosilico
On 04/10/2023 18:59, Teres Alexis, Alan Previn wrote:
On Thu, 2023-09-28 at 13:46 +0100, Tvrtko Ursulin wrote:
On 27/09/2023 17:36, Teres Alexis, Alan Previn wrote:
Thanks for taking the time to review this Tvrtko, replies inline below.
alan:snip
Main concern is that we need to be sure th
The buffer_sel, voffset and hoffset values are calculated from u32
values and might overflow under certain conditions.
Move them to u32 definitions instead of u8/u16 to avoid the issue.
Signed-off-by: Paul Kocialkowski
Reported-by: Dan Carpenter
Fixes: efeeaefe9be5 ("drm: Add support for the Lo
Use the existing macro instead of redefining it.
Signed-off-by: Paul Kocialkowski
---
drivers/gpu/drm/logicvc/logicvc_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/logicvc/logicvc_regs.h
b/drivers/gpu/drm/logicvc/logicvc_regs.h
index 4aae27e9ba2b..0f
On Wed, Oct 25, 2023 at 6:08 PM Thorsten Leemhuis
wrote:
>
> Javier, Dave, Sima,
>
> On 23.10.23 00:54, Evan Preston wrote:
> > On 2023-10-20 Fri 05:48pm, Huacai Chen wrote:
> >> On Fri, Oct 20, 2023 at 5:35 PM Linux regression tracking (Thorsten
> >> Leemhuis) wrote:
> >>> On 09.10.23 10:54, Hua
Both the drm_buddy and drm_mm tests have been converted from selftest to
kunit recently.
However, a significant portion of them are trying to exert some part of
their API over a huge number of iterations and with random variations of
their parameters. They are thus more a way to discover new bugs
Most of those suites are undocumented and aren't really clear about what
they are testing. Let's add a TODO entry as a future task to get started
into KUnit and DRM.
Signed-off-by: Maxime Ripard
---
Documentation/gpu/todo.rst | 17 +
1 file changed, 17 insertions(+)
diff --git a
Huacai Chen writes:
Hello,
> On Wed, Oct 25, 2023 at 6:08 PM Thorsten Leemhuis
> wrote:
[...]
>>
>> This additional report makes me wonder if we should revert the culprit
>> (60aebc9559492c ("drivers/firmware: Move sysfb_init() from
>> device_initcall to subsys_initcall_sync") [v6.5-rc1]). Bu
On 25.10.23 15:23, Huacai Chen wrote:
> On Wed, Oct 25, 2023 at 6:08 PM Thorsten Leemhuis
> wrote:
>>
>> Javier, Dave, Sima,
>>
>> On 23.10.23 00:54, Evan Preston wrote:
>>> On 2023-10-20 Fri 05:48pm, Huacai Chen wrote:
On Fri, Oct 20, 2023 at 5:35 PM Linux regression tracking (Thorsten
On Wed, Oct 25, 2023 at 06:39:56PM +0800, Keith Zhao wrote:
> +static struct drm_crtc_state *
> +vs_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
> +{
> + struct vs_crtc_state *ori_state;
> + struct vs_crtc_state *state;
> +
> + if (!crtc->state)
> + return NULL;
> +
>
Add kernel documentation for the dc_stream_forward_crc_window
Signed-off-by: Sagar Vashnav
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c
b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 17
On Wed, Oct 25, 2023 at 06:39:57PM +0800, Keith Zhao wrote:
> +static int starfive_hdmi_setup(struct starfive_hdmi *hdmi,
> +struct drm_display_mode *mode)
> +{
> + hdmi_modb(hdmi, STARFIVE_BIAS_CONTROL, STARFIVE_BIAS_ENABLE,
> STARFIVE_BIAS_ENABLE);
> + hdmi_wr
Hi,
On 2023/10/25 18:11, Paul Kocialkowski wrote:
Hi,
On Tue 20 Jun 23, 11:56, Sui Jingfeng wrote:
Hi,
On 2023/6/8 15:15, Paul Kocialkowski wrote:
Hi,
On Thu 08 Jun 23, 10:42, Sui Jingfeng wrote:
drm/logicvc driver is depend on REGMAP and REGMAP_MMIO, should select this
two kconfig option
On Wed, Oct 25, 2023 at 09:47:07AM -0300, Helen Koike wrote:
> > > > > + # Version: 6.6-rc1
> > > > > + # Failure Rate: 100
> > >
> > > Maybe also:
> > >
> > ># Pipeline url:
> > > https://gitlab.freedesktop.org/helen.fornazier/linux/-/pipelines/1014435
> >
> > Sounds like a good idea yeah
Flaky tests can be very difficult to reproduce after the facts, which
will make it even harder to ever fix.
Let's document the metadata we agreed on to provide more context to
anyone trying to address these fixes.
Link:
https://lore.kernel.org/dri-devel/CAPj87rPbJ1V1-R7WMTHkDat2A4nwSd61Df9mdGH2P
Hi,
On Tue, Oct 24, 2023 at 04:09:52PM -0300, Carlos Eduardo Gallo Filho wrote:
> The dev_private member of drm_device is deprecated and its use should
> be avoided. Stop using it by embedding the drm_device onto a mock struct
> with a void pointer like dev_private, using it instead.
>
> Also sta
Hi,
On Tue, Oct 24, 2023 at 04:09:53PM -0300, Carlos Eduardo Gallo Filho wrote:
> Extend the existing test case to cover:
> 1. Invalid flag atribute in the struct drm_mode_fb_cmd2.
> 2. Pixel format which requires non-linear modifier with
> DRM_FORMAT_MOD_LINEAR set.
> 3. Non-zero buffer offset fo
Hi,
while working on the GuC TLB invalidation these days, I just
wished I had the two helpers I am submitting today:
gt_to_guc()
guc_to_i915()
Now I have them, at the next GuC TLB invalidation my life will be
easier :-)
Andi
Changelog:
==
- add the gt_to_guc() helper and change
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