On Mon, 23 Oct 2023 20:36:39 +
Simon Ser wrote:
> This is already uAPI, xserver parses it. It's useful to document
> since user-space might want to lookup the parent connector.
>
> Additionally, people (me included) have misunderstood the PATH
> property for being stable across reboots, but
On Fri, 2023-10-20 at 07:52 -0500, Rob Herring wrote:
> Use preferred device_get_match_data() instead of of_match_device() to
> get the driver match data in a single step. With this, adjust the
> includes to explicitly include the correct headers. That also serves as
> preparation to remove implici
ttm_tt_init returns -ENOMEM when out of memory.
Signed-off-by: Kenjiro Nakayama
---
include/drm/ttm/ttm_tt.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/drm/ttm/ttm_tt.h b/include/drm/ttm/ttm_tt.h
index a4eff85b1f44..243232be87b8 100644
--- a/include/drm/ttm/ttm_t
Hi Conor,
...
> On Mon, Oct 23, 2023 at 09:28:03AM +, Flavio Suligoi wrote:
> > > On Fri, Oct 20, 2023 at 03:54:33PM +0200, Flavio Suligoi wrote:
> > > > The two properties:
> > > >
> > > > - max-brightness
> > > > - default brightness
> > > >
> > > > are not really required, so they can be r
Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
Add secure layer config support for ovl_adaptor and sub driver mdp_rdma.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 3 +++
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 11 ---
drivers/gpu/drm/me
Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
Add mtk_ddp_sec_write to configure secure buffer information to
cmdq secure packet data.
Then secure cmdq driver will use these information to configure
curresponding secure DRAM address to HW overlay in secure world.
Signed-off-by: Jason-JH.Lin
---
Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
Add secure buffer control flow to mtk_drm_gem.
When user space takes DRM_MTK_GEM_CREATE_ENCRYPTED flag and size
to create a mtk_drm_gem object, mtk_drm_gem will find a matched size
dma buffer from secure dma-heap and bind it to mtk_drm_gem object.
Sig
Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
Add secure layer config support for ovl.
Signed-off-by: Jason-JH.Lin
---
drivers/gpu/drm/mediatek/mtk_disp_drv.h | 3 ++
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 31 +--
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c |
Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
Add DRM_MTK_GEM_CREATED_ENCRYPTTED flag to allocate a secure buffer
to support secure video path feature.
You have a typo in both the commit description and the title. Please fix.
Signed-off-by: Jason-JH.Lin
---
include/uapi/drm/mediatek_drm.h |
Il 23/10/23 06:45, Jason-JH.Lin ha scritto:
From: CK Hu
Add an interface to allocate MediaTek GEM buffers, allow the IOCTLs
to be used by render nodes.
This patch also sets the RENDER driver feature.
Signed-off-by: CK Hu
Signed-off-by: Nicolas Boichat
Signed-off-by: Philipp Zabel
Signed-off
Am 23.10.23 um 22:16 schrieb Danilo Krummrich:
Use drm_WARN() and drm_WARN_ON() variants to indicate drivers the
context the failing VM resides in.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/drm_gpuvm.c| 32 ++
drivers/gpu/drm/nouveau/nouveau_u
Hi Jonas,
On Mon, 2023-10-23 at 21:11 +, Jonas Karlman wrote:
> Use of DRM_FORMAT_RGB888 and DRM_FORMAT_BGR888 on e.g. RK3288, RK3328
> and RK3399 result in wrong colors being displayed.
>
> The issue can be observed using modetest:
>
> modetest -s @:1920x1080-60@RG24
> modetest -s @:192
[AMD Official Use Only - General]
Hi Aravind,
Is it allowed to register multiple genl families per drm_device? Also, is it
allowed to customize error type and even error counter (status)?
SOC might integrate different type of controllers that report error in
different types. Also, the controll
On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
wrote:
> Are DP MST port numbers guaranteed to be tied to the physical hardware
> configuration (e.g. how cables are connected) and therefore stable
> across reboots? What about stable across kernel upgrades?
>
> If I knew that, I could pe
Il 23/10/23 16:40, amerg...@baylibre.com ha scritto:
From: Fabien Parent
MT8365 requires an additional clock for DPI. Add support for that
additional clock.
Signed-off-by: Fabien Parent
Signed-off-by: Alexandre Mergnat
I'm not convinced that this is right... at all.
From a fast check of t
Il 23/10/23 16:40, Alexandre Mergnat ha scritto:
Display PWM for MT8365 is compatible with MT8183. Then, add MT8365 binding
along with MT8183 SoC.
MT8365's Display PWM controller IP is the same as MT8183: blah blah blah :-)
because saying that it is compatible doesn't mean that it is the same..
Il 23/10/23 16:40, amerg...@baylibre.com ha scritto:
From: Fabien Parent
Add DRM support for MT8365 SoC.
Signed-off-by: Fabien Parent
Signed-off-by: Alexandre Mergnat
Reviewed-by: AngeloGioacchino Del Regno
Hello Conor
On 23/10/2023 19:38, Conor Dooley wrote:
Yo,
On Mon, Oct 23, 2023 at 04:40:11PM +0200, Alexandre Mergnat wrote:
According to the Mediatek datasheet, the display PWM block has a power
domain.
Datasheet for which soc? The mt8173? Is it valid for all devices in this
binding?
I can
Add check for the return value of of_find_device_by_node() and return
the error if it fails in order to avoid NULL pointer dereference.
Fixes: e94236cde4d5 ("drm/tegra: dsi: Add ganged mode support")
Signed-off-by: Chen Ni
---
drivers/gpu/drm/tegra/dsi.c | 4 +++-
1 file changed, 3 insertions(+)
On Mon, Oct 23, 2023 at 10:40 PM Alexandre Mergnat
wrote:
>
> Display Color for MT8365 is compatible with another SoC.
> Then, add MT8365 binding along with MT8183 SoC.
This unfortunately doesn't match what the patch is doing.
ChenYu
> Signed-off-by: Alexandre Mergnat
> ---
> Documentation/de
Hi,
On Thu, Oct 19, 2023 at 10:38:31AM +0200, Javier Martinez Canillas wrote:
> Maxime Ripard writes:
> > On Wed, Oct 11, 2023 at 04:38:07PM +0200, Thierry Reding wrote:
> >> From: Thierry Reding
> >> This contains two patches that bring simplefb up to feature parity with
> >> simpledrm. The pat
On Thu, Oct 19, 2023 at 01:51:59PM -0300, Helen Koike wrote:
>
>
> On 19/10/2023 06:46, Maxime Ripard wrote:
> > Flaky tests can be very difficult to reproduce after the facts, which
> > will make it even harder to ever fix.
> >
> > Let's document the metadata we agreed on to provide more contex
On Mon, 23 Oct 2023 10:59:20 +0200, Dario Binacchi wrote:
> Replace 'pack' with 'back'.
>
>
Applied to drm/drm-misc (drm-misc-next).
Thanks!
Maxime
On Fri, Oct 20, 2023 at 01:33:59AM -0300, Helen Koike wrote:
> On 19/10/2023 13:51, Helen Koike wrote:
> > On 19/10/2023 06:46, Maxime Ripard wrote:
> > > Flaky tests can be very difficult to reproduce after the facts, which
> > > will make it even harder to ever fix.
> > >
> > > Let's document th
Hi Marco,
On Mon, Oct 23, 2023 at 06:45:40PM +0200, Marco Pagani wrote:
> This patch introduces an initial KUnit test suite for GEM objects
> backed by shmem buffers.
>
> Signed-off-by: Marco Pagani
> ---
> drivers/gpu/drm/Kconfig| 1 +
> drivers/gpu/drm/tests/Makefile
On 24/10/2023 11:40, Chen-Yu Tsai wrote:
On Mon, Oct 23, 2023 at 10:40 PM Alexandre Mergnat
wrote:
Display Color for MT8365 is compatible with another SoC.
Then, add MT8365 binding along with MT8183 SoC.
This unfortunately doesn't match what the patch is doing.
Yeah, I fixed it for v2.
On Wed, Oct 18, 2023 at 05:41:22PM +0800, Andy Yan wrote:
> From: Andy Yan
>
>
> This is a preparation for the upcoming support for rk3588 vop.
>
> Patch 1 make the bpp calculation covery more format
> Patch 2 remove formats that are unsupported by cluster windows
> Patch 3 add more formats
> P
Hi Iago,
On 10/24/23 02:57, Iago Toral wrote:
El lun, 23-10-2023 a las 07:58 -0300, Maíra Canal escribió:
Currently, we are only warning the user if the BIN or RENDER jobs
don't
finish before we unregister V3D. We must wait for all jobs to finish
before unregistering. Therefore, warn the user i
On Mon, Oct 16, 2023 at 11:59 AM Geert Uytterhoeven
wrote:
>
> Hi David, Daniel,
>
> The following changes since commit 389af786f92ecdff35883551d54bf4e507ffcccb:
>
> Merge tag 'drm-intel-next-2023-09-29' of
> git://anongit.freedesktop.org/drm/drm-intel into drm-next (2023-10-04
> 13:55:1
Since the kfree handling was removed[1], this patch removes the
instruction comment.
[1] 3507932390bb drm/ttm: move default BO destructor into VMWGFX v2
Signed-off-by: Kenjiro Nakayama
---
drivers/gpu/drm/ttm/ttm_bo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drive
Add a quirk for Synaptics MST hubs, which require a workaround - at leat
on i915 - for some modes, on which the hub applies HBLANK expansion.
These modes will only work by enabling DSC decompression for them, a
follow-up patch will do this in i915.
v2:
- Fix the quirk name in its docbook descripti
Add helpers drivers can use to calculate the BW allocation overhead -
due to SSC, FEC, DSC and data alignment on symbol cycles - and the
channel coding efficiency - due to the 8b/10b, 128b/132b encoding. On
128b/132b links the FEC overhead is part of the coding efficiency, so
not accounted for in t
The VC4 mock helpers allocate the CRTC, encoders and connectors using a
call to kunit_kzalloc(), but the DRM device they are attache to survives
for longer than the test itself which leads to use-after-frees reported
by KASAN.
Switch to drmm_kzalloc to tie the lifetime of these objects to the main
On Fri, 20 Oct 2023 at 11:19, Simon Ser wrote:
> This new IOCTL allows callers to close a framebuffer without
> disabling planes or CRTCs. This takes inspiration from Rob Clark's
> unref_fb IOCTL [1] and DRM_MODE_FB_PERSIST [2].
>
> User-space patch for wlroots available at [3]. IGT test available
As drm_vma_node_is_allowed() searches @tag in the list,
this patch corrects the comment.
Signed-off-by: Kenjiro Nakayama
---
drivers/gpu/drm/drm_vma_manager.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_vma_manager.c
b/drivers/gpu/drm/drm_vma_manager.
Widely used variable names can be used by macro users, potentially
leading to name collisions.
Suffix locals used inside the macros with an underscore, to reduce the
collision potential.
Suggested-by: Lucas De Marchi
Signed-off-by: Michał Winiarski
---
include/linux/iosys-map.h | 44 +++
On 10/24/23 10:45, Christian König wrote:
Am 23.10.23 um 22:16 schrieb Danilo Krummrich:
Use drm_WARN() and drm_WARN_ON() variants to indicate drivers the
context the failing VM resides in.
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/drm_gpuvm.c | 32 ++--
Hi Nirmoy,
On Mon, Oct 23, 2023 at 02:13:05PM +0200, Nirmoy Das wrote:
> I915_PRIORITY_NORMAL is 0 so use that instead for better
> readability.
>
> Cc: John Harrison
> Signed-off-by: Nirmoy Das
Reviewed-by: Andi Shyti
Andi
Hi:
On 10/24/23 16:49, Christopher Obbard wrote:
Hi Jonas,
On Mon, 2023-10-23 at 21:11 +, Jonas Karlman wrote:
Use of DRM_FORMAT_RGB888 and DRM_FORMAT_BGR888 on e.g. RK3288, RK3328
and RK3399 result in wrong colors being displayed.
The issue can be observed using modetest:
modetest -s
On Mon, Oct 23, 2023 at 8:59 PM Stephen Rothwell wrote:
>
> Hi all,
>
> On Thu, 19 Oct 2023 12:06:18 +1100 Stephen Rothwell
> wrote:
> >
> > On Tue, 10 Oct 2023 12:43:57 +1100 Stephen Rothwell
> > wrote:
> > >
> > > After merging the amdgpu tree, today's linux-next build (x86_64
> > > allmodco
Add compatible name for MediaTek MT8188 MDP-RDMA.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,mdp-rdma.yaml| 6 +-
1 file changed, 5 insertions(+), 1 deletion(-
Add compatible name for MediaTek MT8188 VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicet
Add MT8188 VDOSYS0 and VDOSYS1 reset control bits.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Signed-off-by: Hsiao Chien Sung
---
include/dt-bindings/reset/mt8188-resets.h | 75 +++
1 file changed, 75 insertions(+)
diff --git a/include/dt-bindin
Return the result of clk_prepare_enable() instead of
always returns 0.
Fixes: f8946e2b6bb2 ("drm/mediatek: Add display MDP RDMA support for MT8195")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_mdp_rdma.c | 3 +--
Sort OVL adaptor components' names in alphabetical order.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/g
- Add register definitions for MT8188
- Add VDOSYS1 routing table
- Update MUTEX definitions accordingly
- Set VSYNC length from 0x40 (default) to 1 since ETHDR is bypassed
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 126 +++
Add compatible name for MediaTek MT8188 ETHDR.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../bindings/display/mediatek/mediatek,ethdr.yaml | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
Padding is a new hardware module on MediaTek MT8188,
add dt-bindings for it.
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../display/mediatek/mediatek,padding.yaml| 81 +++
1 file changed,
Add component ID to component match structure so we can
configure them with a for-loop.
The main reason we do such code refactoring is that
there is a new hardware component called "Padding" since
MT8188, while MT8195 doesn't have this module, we can't
use the original logic to manage the componen
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of clock control significantly.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adapt
Add MT8188 Padding to OVL adaptor to probe the driver.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 26 +++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/mediatek
- Add Padding components
- Add Mutex module definitions for Padding
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mtk-mutex.c | 16
include/linux/soc/mediatek/mtk-mmsys.h | 8
2 files changed, 24 insertions(+)
Do not reset Merge while using CMDQ because reset API doesn't
wait for frame done event as CMDQ does and could lead to
underrun when the layer is switching off.
Fixes: aaf94f7c3ae6 ("drm/mediatek: Add display merge async reset control")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Add compatible name for MediaTek MT8188 MERGE.
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
Reviewed-by: CK Hu
Signed-off-by: Hsiao Chien Sung
---
.../devicetree/bindings/display/mediatek/mediatek,merge.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/D
This series is based on mediatek-drm-next branch of
kernel/git/chunkuang.hu/linux.git.
Changes in v11:
- Change "mtk-padding" to "mtk-disp-padding" for consistency
- Remove patch "drm/mediatek: Remove ineffectual power management codes
for backward compatibility
Changes in v10:
- Remove "Review
Add MT8188 reset bit map for VDOSYS0 and VDOSYS1.
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/soc/mediatek/mt8188-mmsys.h | 84 +
drivers/soc/mediatek/mtk-mmsys.c| 7 ++-
2 files changed, 90 insertions(+), 1 deletion(-)
By registering component related functions to the pointers,
we can easily manage them within a for-loop and simplify the
logic of component start/stop process.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adap
- Adjust indentation to align with other files
- Sort device table in alphabetical order
- Add sentinel to device table
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
drivers/gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 15 ---
1 file c
DPI input is in 1T2P mode on both MT8195 and MT8188.
Remove the redundant driver data to align the settings, or
the screen will glitch.
Fixes: 2847cd7e6403 ("drm/mediatek: Add mt8188 dpi compatibles and platform
data")
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by:
Rename OVL_ADAPTOR_TYPE_RDMA to OVL_ADAPTOR_TYPE_MDP_RDMA
to align the naming rule of mtk_ovl_adaptor_comp_id.
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao Chien Sung
---
.../gpu/drm/mediatek/mtk_disp_ovl_adaptor.c | 22 +--
1 file changed,
- The mmsys_dev_num in MT8188 VDOSYS0 was set to 1 since
VDOSYS1 was not available before. Increase it to support
VDOSYS1 in display driver.
- Add compatible name for MT8188 VDOSYS1
(shares the same driver data with MT8195 VDOSYS1)
Reviewed-by: CK Hu
Reviewed-by: AngeloGioacchino Del Regno
- Reset ID must starts from 0 and be consecutive, but
the reset bits in our hardware design is not continuous,
some bits are left unused, we need a map to solve the problem
- Use old style 1-to-1 mapping if .rst_tb is not defined
Reviewed-by: AngeloGioacchino Del Regno
Signed-off-by: Hsiao C
Padding is a new display module on MT8188, it provides ability
to add pixels to width and height of a layer with specified colors.
Due to hardware design, Mixer in VDOSYS1 requires width of a layer
to be 2-pixel-align, or 4-pixel-align when ETHDR is enabled,
we need Padding to deal with odd width.
Different from OVL, OVL adaptor is a pseudo device so we didn't
define it in the device tree, consequently, pm_runtime_resume_and_get()
called by .atomic_enable() powers on no device. For this reason, we
implement a function to power on the RDMAs in OVL adaptor, and the
system will make sure the IO
On Tue, Oct 24, 2023 at 09:03:22AM +, Simon Ser wrote:
> On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
> wrote:
>
> > Are DP MST port numbers guaranteed to be tied to the physical hardware
> > configuration (e.g. how cables are connected) and therefore stable
> > across reboots? Wh
On Tue, Oct 24, 2023 at 01:07:10PM +0200, Michał Winiarski wrote:
Widely used variable names can be used by macro users, potentially
leading to name collisions.
Suffix locals used inside the macros with an underscore, to reduce the
collision potential.
Suggested-by: Lucas De Marchi
Signed-off-b
On Tue, 24 Oct 2023 16:03:27 +0300
Ville Syrjälä wrote:
> On Tue, Oct 24, 2023 at 09:03:22AM +, Simon Ser wrote:
> > On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
> > wrote:
> >
> > > Are DP MST port numbers guaranteed to be tied to the physical hardware
> > > configuration (e.
On Tue, Oct 24, 2023 at 04:12:34PM +0300, Pekka Paalanen wrote:
> On Tue, 24 Oct 2023 16:03:27 +0300
> Ville Syrjälä wrote:
>
> > On Tue, Oct 24, 2023 at 09:03:22AM +, Simon Ser wrote:
> > > On Tuesday, October 24th, 2023 at 09:36, Pekka Paalanen
> > > wrote:
> > >
> > > > Are DP MST por
On Thu, Aug 10, 2023 at 04:44:45PM +0200, Alexander Stein wrote:
> Hi everyone,
>
> while working on i.MX6Q based board
> (arch/arm/boot/dts/nxp/imx/imx6q-mba6a.dts)
> I noticed several warnings on dtbs_check. The first 5 patches should be pretty
> much straight forward.
> I'm not 100% sure on th
I've just tested this series, and it is working perfectly. For the two
patches of the series:
Acked-by: Jose Maria Casanova Crespo
Thanks Maíra for taking care of upstreaming this feature.
Chema
El 5/9/23 a las 23:06, Maíra Canal escribió:
This patchset exposes GPU usages stats both globall
Hi,
On Mon, Oct 23, 2023 at 10:25:50AM -0700, Doug Anderson wrote:
> On Mon, Oct 23, 2023 at 9:31 AM Yuran Pereira
> wrote:
> >
> > Since "Clean up checks for already prepared/enabled in panels" has
> > already been done and merged [1], I think there is no longer a need
> > for this item to be i
On Tue, Oct 24, 2023 at 07:53:38AM +, Flavio Suligoi wrote:
> > On Mon, Oct 23, 2023 at 09:28:03AM +, Flavio Suligoi wrote:
> > > > On Fri, Oct 20, 2023 at 03:54:33PM +0200, Flavio Suligoi wrote:
> > > > > The two properties:
> > > > >
> > > > > - max-brightness
> > > > > - default brightne
Hi Chris,
Am Freitag, 20. Oktober 2023, 17:03:08 CEST schrieb Chris Morgan:
> On Thu, Oct 19, 2023 at 07:45:17PM +0200, Heiko Stübner wrote:
> > Hey Chris,
> >
> > Am Donnerstag, 19. Oktober 2023, 16:43:56 CEST schrieb Chris Morgan:
> > > On Thu, Oct 19, 2023 at 11:21:47AM +0200, Krzysztof Kozlow
Move existing condition to while(), so it will be clear on what
circumstances the loop is successfully finishing.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i
Extract a common soc_gpio_exec() helper that may be used by a few SoCs.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 49 +++-
1 file changed, 27 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
b/drive
Names of the MIPI sequence steps are sequential and defined, no
need to check for the gaps. However in seq_name the MIPI_SEQ_END
is missing. Add it there, and drop unneeded NULL check in
sequence_name().
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 3 ++-
1 f
Drop unused vlv_iosf_sb_read() and vlv_iosf_sb_write().
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/vlv_sideband.c | 17 -
drivers/gpu/drm/i915/vlv_sideband.h | 3 ---
2 files changed, 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/vlv_sideband.c
b/drivers/gpu/d
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 0bd50d719b00 ("pinctrl:
cherryview: prevent concurrent access to GPIO controllers") for
the details. Taking all this into con
On Wed, Oct 18, 2023 at 03:52:36PM +0300, Andy Shevchenko wrote:
> On Wed, Oct 18, 2023 at 11:09:35AM +0200, Hans de Goede wrote:
> > On 10/18/23 07:10, Andy Shevchenko wrote:
...
> > Yes I should be able to find a device or 2 which poke GPIOs from the
> > VBT MIPI sequences. Unfortunately I don'
In the snippets like the following
if (...)
return / goto / break / continue ...;
else
...
the 'else' is redundant. Get rid of it.
Signed-off-by: Andy Shevchenko
---
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 58 ++--
1 file c
It's a dirty hack in the driver that pokes GPIO registers behind
the driver's back. Moreoever it might be problematic as simultaneous
I/O may hang the system, see the commit 40ecab551232 ("pinctrl:
baytrail: Really serialize all register accesses") for the details.
Taking all this into consideratio
DSI code for VBT has a set of ugly GPIO hacks, one of which is direct
talking to GPIO IP behind the actual driver's back. A second attempt
to fix that is here.
If I understood correctly, my approach should work in the similar way as
the current IOSF GPIO.
Hans, I believe you have some devices tha
From: Tvrtko Ursulin
Skeleton controller without any functionality.
Signed-off-by: Tvrtko Ursulin
---
include/linux/cgroup_drm.h| 9 ++
include/linux/cgroup_subsys.h | 4 +++
init/Kconfig | 7
kernel/cgroup/Makefile| 1 +
kernel/cgroup/drm.c
From: Tvrtko Ursulin
This series contains a proposal for a DRM cgroup controller which implements a
weight based hierarchical GPU usage budget approach and is similar in concept to
some of the existing controllers like CPU and IO.
Motivation mostly comes from my earlier proposal where I identifi
From: Tvrtko Ursulin
To enable propagation of settings from the cgroup DRM controller to DRM
and vice-versa, we need to start tracking to which cgroups DRM clients
belong.
Signed-off-by: Tvrtko Ursulin
---
drivers/gpu/drm/drm_file.c | 6
include/drm/drm_file.h | 6
include/linu
From: Tvrtko Ursulin
Add a driver callback and core helper which allow querying the time spent
on GPUs for processes belonging to a group.
Signed-off-by: Tvrtko Ursulin
---
include/drm/drm_drv.h | 28
kernel/cgroup/drm.c | 20
2 files changed
From: Tvrtko Ursulin
Add a new callback via which the drm cgroup controller is notifying the
drm core that a certain process is above its allotted GPU time.
Signed-off-by: Tvrtko Ursulin
---
include/drm/drm_drv.h | 8
kernel/cgroup/drm.c | 16
2 files changed, 24 i
From: Tvrtko Ursulin
Similar to CPU scheduling, implement a concept of weight in the drm cgroup
controller.
Uses the same range and default as the CPU controller - CGROUP_WEIGHT_MIN,
CGROUP_WEIGHT_DFL and CGROUP_WEIGHT_MAX.
Later each cgroup is assigned a time budget proportionaly based on the
From: Tvrtko Ursulin
To support container use cases where external orchestrators want to make
deployment and migration decisions based on GPU load and capacity, we can
expose the GPU load as seen by the controller in a new drm.active_us
field. This field contains a monotonic cumulative time cgrou
From: Tvrtko Ursulin
To reduce the number of tracking going on, especially with drivers which
will not support any sort of control from the drm cgroup controller side,
lets express the funcionality as opt-in and use the presence of
drm_cgroup_ops as activation criteria.
Signed-off-by: Tvrtko Urs
From: Tvrtko Ursulin
When notified by the drm core we are over our allotted time budget, i915
instance will check if any of the GPU engines it is reponsible for is
fully saturated. If it is, and the client in question is using that
engine, it will throttle it.
For now throttling is done simplist
From: Karol Wachowski
Move sequence of masking and unmasking global interrupts from buttress
interrupt handler to generic one that handles both VPUIP and BTRS
interrupts. Unmasking global interrupts will re-trigger MSI for any
pending interrupts.
Lack of this sequence will cause the driver to mi
On Tue, Oct 24, 2023 at 06:57:38PM +0300, Andy Shevchenko wrote:
> It's a dirty hack in the driver that pokes GPIO registers behind
> the driver's back. Moreoever it might be problematic as simultaneous
> I/O may hang the system, see the commit 0bd50d719b00 ("pinctrl:
> cherryview: prevent concurre
On 10/15/23 10:27, Geert Uytterhoeven wrote:
Currently drm_client_buffer_addfb() uses the legacy drm_mode_addfb(),
which uses bpp and depth to guess the wanted buffer format.
However, drm_client_buffer_addfb() already knows the exact buffer
format, so there is no need to convert back and forth be
On 10/24/23 07:56, Maxime Ripard wrote:
The VC4 mock helpers allocate the CRTC, encoders and connectors using a
call to kunit_kzalloc(), but the DRM device they are attache to survives
for longer than the test itself which leads to use-after-frees reported
by KASAN.
Switch to drmm_kzalloc to tie
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