Hi
Am 12.09.23 um 22:22 schrieb Janne Grunau via B4 Relay:
From: Janne Grunau
Multiple power domains need to be handled explicitly in each driver. The
driver core can not handle it automatically since it is not aware of
power sequencing requirements the hardware might have. This is not a
probl
Changes since v4:
- Rebase on v6.6-rc1
- Remove any unnecessary DTS settings.
- Adjust the usage of MOD and clock in blending components.
Changes since v3:
- Depend on :
[1] https://patchwork.kernel.org/project/linux-media/list/?series=719841
- Suggested by Krzysztof, integrating all newly added
On 2023-09-14 15:00, Maxime Ripard wrote:
On Wed, Sep 13, 2023 at 07:35:57PM +0300, José Pekkarinen wrote:
On 2023-09-13 17:41, mrip...@kernel.org wrote:
> On Wed, Sep 13, 2023 at 05:01:40PM +0300, José Pekkarinen wrote:
> > On 2023-09-13 12:50, Maxime Ripard wrote:
> > > Hi,
> > >
> > > On Wed,
---
drivers/staging/fbtft/fb_ra8875.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/staging/fbtft/fb_ra8875.c
b/drivers/staging/fbtft/fb_ra8875.c
index 398bdbf53c9a..658f915b8528 100644
--- a/drivers/staging/fbtft/fb_ra8875.c
+++ b/drivers/staging/fbtft/f
On Tue, 2023-09-12 at 10:16 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:56, Moudy Ho wrote:
> > Due to the same hardware design, MDP RDMA needs to
> > be integra
Add configuration of more components in MT8195 MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_reg_aal.h | 25 ++
.../platform/mediatek/mdp3/mdp_reg_color.h| 31 +++
.../media/platform/mediatek/mdp3/mdp_reg_fg.h | 23 +
.../platform/mediatek/mdp3/mdp_reg_hdr
Changes since v4:
- Rebase on v6.6-rc1
- Organize identical hardware components into their respective files.
Hi,
The purpose of this patch is to separate the MDP3-related bindings from
the original mailing list mentioned below:
https://lore.kernel.org/all/20230208092209.19472-1-moudy...@mediatek.
Hi Angelo,
On Tue, 2023-09-12 at 11:18 +0200, AngeloGioacchino Del Regno wrote:
> Il 12/09/23 09:57, Moudy Ho ha scritto:
> > MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
> > These sets coordinate and control the clock, power, and
> > register settings needed for the components of MDP3.
> >
>
Due to the same hardware design, MDP RDMA needs to
be integrated into the same binding.
Signed-off-by: Moudy Ho
---
.../display/mediatek/mediatek,mdp-rdma.yaml | 88 ---
.../bindings/media/mediatek,mdp3-rdma.yaml| 5 +-
2 files changed, 3 insertions(+), 90 deletions(-)
de
On Tue, Sep 12, 2023 at 08:55:31AM +0200, Krzysztof Kozlowski wrote:
> On 11/09/2023 18:47, John Watts wrote:
> > On Mon, Sep 11, 2023 at 01:49:39PM +0200, Krzysztof Kozlowski wrote:
> >> If the other panel has exactly the same case, then yes, you can do like
> >> this. But it depends on the bindin
In some chips, MDP3 has the ability to utilize two pipelines to
parallelly process a single frame.
To enable this feature, multiple CMDQ clients and packets need to
be configured at the same time.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 8 +
.../platform/med
Increasing the number of sets built by MMSYS and MUTEX in MT8195
will enable the creation of more pipelines in MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 80 ---
.../platform/mediatek/mdp3/mtk-mdp3-core.h| 7 ++
2 files changed, 60 inse
Extend the component settings used in MT8195 MDP3.
Additionally, it is crucial to read all component settings in
a specific manner to ensure that shared memory data structure lengths
are aligned across different platforms.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c
MT8195 has two MMSYS sets, VPPSYS0 and VPPSYS1.
These sets coordinate and control the clock, power, and
register settings needed for the components of MDP3.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 44 +--
.../platform/mediatek/mdp3/mtk-mdp3-com
SM7150 has 5 power levels which correspond to 5 speed-bin values: 0,
128, 146, 167, 172. Speed-bin value is calulated as FMAX/4.8MHz round up
to zero decimal places.
The vendor's FW GMU is called a618_gmu.bin. And also a618 on SM7150 uses
a615 zapfw.
Add this as machine = "qcom,sm7150", because s
Introduce more MDP3 components present in MT8195.
Signed-off-by: Moudy Ho
---
.../display/mediatek/mediatek,aal.yaml| 2 +-
.../display/mediatek/mediatek,color.yaml | 2 +-
.../display/mediatek/mediatek,merge.yaml | 1 +
.../display/mediatek/mediatek,ovl.yaml| 2 +-
Some components act as bridges only and do not require full configuration.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 8 +++
.../platform/mediatek/mdp3/mtk-mdp3-cfg.h | 1 +
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 58 ++-
3 files cha
On Tue, 2023-09-12 at 10:23 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:57, Moudy Ho wrote:
> > Add device nodes for Media Data Path 3 (MDP3) modules.
> >
> > S
The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
programmable switching frequency to optimize efficiency.
The brightness can be controlled either by I2C commands (called "analog"
mode) or by a PWM input signal (PWM mode).
This driver supports both modes.
For DT configura
The amount of MDP3 driver probes is determined by the registered
clocks of MMSYS.
Since MT8195 MDP3 utilizes VPPSYS0 and VPPSYS1, it's necessary to
prevent multiple driver registrations.
Signed-off-by: Moudy Ho
---
drivers/media/platform/mediatek/mdp3/mdp_cfg_data.c | 1 +
drivers/media/platfor
Hi Krzysztof,
On Tue, 2023-09-12 at 10:19 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:56, Moudy Ho wrote:
> > Introduce more MDP3 components present in MT8195.
On Wed, Sep 13, 2023 at 02:34:38PM -0700, Jessica Zhang wrote:
> Hi John,
>
> Having a separate panel_regs_len field seems a bit unnecessary to me.
>
> Looks like it's only being called in the panel prepare() and I don't seen
> any reason why we shouldn't just call the ARRAY_SIZE() macro there.
The Monolithic Power (MPS) MP3309C is a WLED step-up converter, featuring a
programmable switching frequency to optimize efficiency.
The brightness can be controlled either by I2C commands (called "analog"
mode) or by a PWM input signal (PWM mode).
This driver supports both modes.
For device drive
In the source files drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bit.c:26 and
drivers/gpu/drm/nouveau/nvkm/subdev/i2c/bus.c:214 refer to
configuration options "CONFIG_NOUVEAU_I2C_INTERNAL" and
"CONFIG_NOUVEAU_I2C_INTERNAL_DEFAULT" for conditional compilation,
but these configuration options are not d
The configuration of the MT8195 components in the shared memory
is defined in the header file "mdp_sm_mt8195.h".
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_sm_mt8195.h| 283 ++
.../platform/mediatek/mdp3/mtk-img-ipi.h | 4 +
2 files changed, 287 inserti
After setting up the second set of MMSYS (VPPSYS1), it is necessary
to have a corresponding second set of MUTEX (MUTEX2) to assist in
handling SOF/EOF.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 64 ---
.../platform/mediatek/mdp3/mtk-mdp3-core.c
Similarly to the drm_exec_test module, the drm_modes_test
shows the following output on dmesg on load:
[ 5556.674834] KTAP version 1
[ 5556.674841] 1..1
[ 5556.675317] KTAP version 1
[ 5556.675321] # Subtest: drm_modes_analog_tv
[ 5556.675323] # module: drm_modes_test
[ 5556.675327]
Hello,
Upgrading to Linux 6.5 on a Lenovo ThinkPad L570 (Integrated Intel HD
Graphics 620 (rev 02), Intel(R) Core(TM) i7-7500U) results in a blank
screen after boot until the display manager starts... if it does start
at all. Using the nomodeset kernel parameter seems to be a workaround.
I'v
On 2023-09-13 17:41, mrip...@kernel.org wrote:
On Wed, Sep 13, 2023 at 05:01:40PM +0300, José Pekkarinen wrote:
On 2023-09-13 12:50, Maxime Ripard wrote:
> Hi,
>
> On Wed, Sep 13, 2023 at 11:32:23AM +0300, José Pekkarinen wrote:
> > Running drm_exec_test by modprobing the module I
> > observe th
Certain chips can combine several components to form complex virtual
units with advanced functions.
These components require simultaneous configuration of their MODs and
clocks.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mtk-mdp3-cmdq.c| 10 +-
.../platform/mediatek/mdp3/
Running drm_exec_test by modprobing the module I
observe the following output:
[ 424.471936] KTAP version 1
[ 424.471942] 1..1
[ 424.472446] KTAP version 1
[ 424.472450] # Subtest: drm_exec
[ 424.472453] # module: drm_exec_test
[ 424.472459] 1..7
[ 424.479082]
=
On 2023-09-13 12:50, Maxime Ripard wrote:
Hi,
On Wed, Sep 13, 2023 at 11:32:23AM +0300, José Pekkarinen wrote:
Running drm_exec_test by modprobing the module I
observe the following output:
[ 424.471936] KTAP version 1
[ 424.471942] 1..1
[ 424.472446] KTAP version 1
[ 424.472450] #
Add device nodes for Media Data Path 3 (MDP3) modules.
Signed-off-by: Moudy Ho
---
arch/arm64/boot/dts/mediatek/mt8195.dtsi | 378 +++
1 file changed, 378 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
b/arch/arm64/boot/dts/mediatek/mt8195.dtsi
index 4d
Support for multiple RDMA/WROT waits for GCE events.
Signed-off-by: Moudy Ho
---
.../media/platform/mediatek/mdp3/mdp_cfg_data.c | 2 ++
.../platform/mediatek/mdp3/mtk-mdp3-comp.c | 17 +++--
.../platform/mediatek/mdp3/mtk-mdp3-core.h | 2 ++
3 files changed, 15 insertion
Modeset mutex unlock is missing in drm_dp_mst_detect_port function.
This will lead to deadlock if calling the function multiple times in
an atomic operation, for example, getting imultiple MST ports status
for a DP MST bonding scenario.
Signed-off-by: Ramya SR
---
drivers/gpu/drm/display/drm_dp_
In order to generalize the node names, the DMA-related nodes
corresponding to MT8183 MDP3 need to be corrected.
Fixes: 60a2fb8d202a ("arm64: dts: mt8183: add MediaTek MDP3 nodes")
Signed-off-by: Moudy Ho
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 6 --
1 file changed, 4 insertions(+), 2
On Thu, Sep 14, 2023 at 09:37:31PM -0700, Kees Cook wrote:
> On Thu, Sep 14, 2023 at 08:52:21PM +, Justin Stitt wrote:
> > `strncpy` is deprecated for use on NUL-terminated destination strings [1].
> >
> > We should prefer more robust and less ambiguous string interfaces.
> >
> > Since `chan-
Add MT8195 MDP3 basic configuration in file "mdp_cfg_data.c"
and corresponding driver data.
Signed-off-by: Moudy Ho
---
.../platform/mediatek/mdp3/mdp_cfg_data.c | 666 ++
.../platform/mediatek/mdp3/mtk-mdp3-cfg.h | 1 +
.../platform/mediatek/mdp3/mtk-mdp3-comp.c|
On Tue, 2023-09-12 at 10:21 +0200, Krzysztof Kozlowski wrote:
>
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
> On 12/09/2023 09:58, Moudy Ho wrote:
> > Add MT8195 MDP3 basic configuration in file "mdp_cfg_data.c"
> >
On Mon, Sep 11, 2023 at 11:41:12AM +0200, Krzysztof Kozlowski wrote:
> Missing reg. Probably also port.
Hello again,
I've been working on v2 of this series and done some initial cleanup.
Right now it looks a bit like this:
> allOf:
> - $ref: panel-common.yaml#
> - $ref: /schemas/spi/spi-per
The DMA-related nodes RDMA/WROT in MDP3 should be changed to generic names.
In addition, fix improper space indent in example.
Fixes: 4ad7b39623ab ("media: dt-binding: mediatek: add bindings for MediaTek
MDP3 components")
Signed-off-by: Moudy Ho
Acked-by: Rob Herring
---
.../bindings/media/med
On Wed, Sep 13, 2023 at 02:43:43PM -0700, Jessica Zhang wrote:
> Hi John,
>
> Just curious, what do you mean by these registers being mostly unknown?
>
> I do see them specified in the online specs -- some even seem to map to
> existing MIPI_DCS_* enums (ex. 0x01 to MIPI_DCS_SOFT_RESET, and 0x04
On Tue, Sep 12, 2023 at 4:22 PM Janne Grunau via B4 Relay
wrote:
>
> From: Janne Grunau
>
> Multiple power domains need to be handled explicitly in each driver. The
> driver core can not handle it automatically since it is not aware of
> power sequencing requirements the hardware might have. This
Thanks for the feedback Bagas,
"Then checkpatch is wrong, " lol
Ill double check my SoB.
Angus
On Wed, Sep 13, 2023 at 11:32 AM Bagas Sanjaya wrote:
> On Wed, Sep 13, 2023 at 11:02:13AM +1000, Angus Gardner wrote:
> > ---
> > drivers/staging/fbtft/fb_ra8875.c | 11 ---
> > 1 file ch
Thomas Zimmermann writes:
> Hi
>
> Am 14.09.23 um 21:51 schrieb Javier Martinez Canillas:
>> The driver uses a naming convention where functions for struct drm_*_funcs
>> callbacks are named ssd130x_$object_$operation, while the callbacks for
>> struct drm_*_helper_funcs are named ssd130x_$object
Hi
Am 11.09.23 um 22:52 schrieb Arnd Bergmann:
From: Arnd Bergmann
As a result of the recent Kconfig reworks, the default settings for the
framebuffer interfaces changed in unexpected ways:
Configurations that leave CONFIG_FB disabled but use DRM now get
DRM_FBDEV_EMULATION by default. This a
Ping for a review.
I'd like to get at least the first two patches into the DRM git tree.
The PPC patches could later be merged through another tree.
Best regards
Thomas
Am 12.09.23 um 15:48 schrieb Thomas Zimmermann:
Clean up and rename fb_pgprotect() to work without struct file. Then
refact
On Wed, Sep 13, 2023 at 03:02:26PM +0300, Jaak Ristioja wrote:
> Hello,
>
> Upgrading to Linux 6.5 on a Lenovo ThinkPad L570 (Integrated Intel HD
> Graphics 620 (rev 02), Intel(R) Core(TM) i7-7500U) results in a blank screen
> after boot until the display manager starts... if it does start at all.
On Fri, Aug 25, 2023 at 12:19 PM Stanislaw Gruszka
wrote:
>
> On Wed, Aug 23, 2023 at 12:23:08AM +, Justin Stitt wrote:
> > `strncpy` is deprecated for use on NUL-terminated destination strings [1].
> >
> > A suitable replacement is `strscpy` [2] due to the fact that it
> > guarantees NUL-term
On Sat, Sep 16, 2023 at 02:54:51PM +0200, Hans de Goede wrote:
> Hi All,
>
> Some vlv/chv tablets ship with Android as factory OS. The factory OS
> BSP style kernel on these tablets does not use the normal x86 hw
> autodetection instead it hardcodes a whole bunch of things including
> using panel
Hi Jacopo Mondi,
Looks like you are happy with my response for V10. I will send V11 soon.
Cheers,
Biju
> -Original Message-
> From: Biju Das
> Sent: Friday, September 8, 2023 2:24 PM
> Subject: RE: [PATCH v10 3/4] drm: renesas: Add RZ/G2L DU Support
>
> Hi Jacopo Mondi,
>
> Thanks for
Currently EXPORT_*_SIMPLE_DEV_PM_OPS() use EXPORT_*_DEV_PM_OPS() set of
macros to export dev_pm_ops symbol, which export the symbol in case
CONFIG_PM=y but don't take CONFIG_PM_SLEEP into consideration.
Since _SIMPLE_ variants of _PM_OPS() do not include runtime PM handles
and are only used in cas
Introduce a new set of export macros for _SIMPLE_ variants of _PM_OPS(),
which export dev_pm_ops symbol only in case CONFIG_PM_SLEEP=y and discard
it otherwise.
Fixes: 34e1ed189fab ("PM: Improve EXPORT_*_DEV_PM_OPS macros")
Signed-off-by: Raag Jadav
---
include/linux/pm.h | 43 ++
Rename EXPORT_*_DEV_PM_OPS() macros to EXPORT_*_RUNTIME_PM_OPS()
and while at it, move them to pm_runtime.h.
This is done in conjunction with the introduction of
EXPORT_*_SIMPLE_PM_OPS() set of macros, to make things less confusing.
This makes both _RUNTIME_ and _SIMPLE_ variants of export macros m
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/iio/accel/fxls8962af-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/accel/fxls8962af-core.c
b/drivers/iio/accel/fxls8962af-core.c
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/iio/gyro/fxas21002c_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/gyro/fxas21002c_core.c
b/drivers/iio/gyro/fxas21002c_core.c
in
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/iio/imu/inv_icm42600/inv_icm42600_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
b/drivers/i
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
b/drivers/iio/imu/inv_m
With original macro being renamed to EXPORT_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/gpu/drm/imx/dcss/dcss-dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/imx/dcss/dcss-dev.c
b/drivers/gpu/drm/imx/dcss/dcss-dev.c
in
With original macro being renamed to EXPORT_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/mfd/arizona-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/arizona-core.c b/drivers/mfd/arizona-core.c
index 19a0adf8ce3d..1d36deb1b7
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/mfd/cs42l43.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mfd/cs42l43.c b/drivers/mfd/cs42l43.c
index 37b23e9bae82..b84adde9f89e 100644
--
With original macro being renamed to EXPORT_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
sound/soc/codecs/cs35l41.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c
index 4bc64ba71cd6..651aeaa6a5
Hi Raag,
Le lundi 18 septembre 2023 à 13:39 +0530, Raag Jadav a écrit :
> Rename EXPORT_*_DEV_PM_OPS() macros to EXPORT_*_RUNTIME_PM_OPS()
> and while at it, move them to pm_runtime.h.
> This is done in conjunction with the introduction of
> EXPORT_*_SIMPLE_PM_OPS() set of macros, to make things l
> -Original Message-
> From: Michael Tretter
> Sent: Friday, September 8, 2023 6:48 PM
> To: 대인기/Tizen Platform Lab(SR)/삼성전자
> Cc: 'Inki Dae' ; 'Neil Armstrong'
> ; 'Robert Foss' ; 'Jonas
> Karlman' ; dri-devel@lists.freedesktop.org; linux-
> ker...@vger.kernel.org; 'Jernej Skrabec' ;
Il 18/09/23 09:00, Hsiao Chien Sung ha scritto:
Fix an issue that plane coordinate was not saved when
calling async update.
Fixes: 920fffcc8912 ("drm/mediatek: update cursors by using async atomic
update")
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
On Mon, Sep 18, 2023 at 10:20:29AM +0200, Paul Cercueil wrote:
> Le lundi 18 septembre 2023 à 13:39 +0530, Raag Jadav a écrit :
> > Rename EXPORT_*_DEV_PM_OPS() macros to EXPORT_*_RUNTIME_PM_OPS()
> > and while at it, move them to pm_runtime.h.
> > This is done in conjunction with the introduction
Thomas Zimmermann writes:
> Hi
>
> Am 11.09.23 um 22:52 schrieb Arnd Bergmann:
>> From: Arnd Bergmann
>>
>> As a result of the recent Kconfig reworks, the default settings for the
>> framebuffer interfaces changed in unexpected ways:
>>
>> Configurations that leave CONFIG_FB disabled but use D
Il 18/09/23 09:10, Hsiao Chien Sung ha scritto:
For CRTCs that doesn't support rotation should still return
DRM_MODE_ROTATE_0. Since both OVL and OVL adaptor on MTK chip
doesn't support rotation, return the capability of the
hardware accordingly.
Fixes: df577118 ("drm/mediatek: Support 180 d
Fix linker error if FB=m about missing fb_io_read and fb_io_write. The
linker's error message suggests that this config setting has already
been broken for other symbols.
All errors (new ones prefixed by >>):
sh4-linux-ld: drivers/video/fbdev/sh7760fb.o: in function `sh7760fb_probe':
Il 18/09/23 10:41, Hsiao Chien Sung ha scritto:
ETHDR 9-bit alpha should be disabled by default,
otherwise alpha blending will not work.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
Il 18/09/23 10:41, Hsiao Chien Sung ha scritto:
Add register definitions for GCE so users can use them
as a buffer to store data.
Signed-off-by: Hsiao Chien Sung
Reviewed-by: AngeloGioacchino Del Regno
From: Ofir Bitton
During ECC event handling, Memory wrapper id was mistakenly
printed as block id. Fix the print and in addition fetch the actual
block-id from firmware.
Signed-off-by: Ofir Bitton
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2.
From: Benjamin Dotan
coresight ETF blocks have different size. As a result, sync packets
need to be aligned based on fifo size.
Signed-off-by: Benjamin Dotan
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2_coresight.c | 9 -
1 file chang
From: Dafna Hirschfeld
Because it is not used and also, for graceful reset to work
those ioctls should run on the compute device.
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/device.c | 13 -
dri
From: Dafna Hirschfeld
Fix two typos
Signed-off-by: Dafna Hirschfeld
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/device.c | 2 +-
drivers/accel/habanalabs/common/habanalabs.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Hen Alon
Add tsc clock to clock sync info, to enable using this clock for
sampling and sync it with device time.
Signed-off-by: Hen Alon
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/common/habanalabs_ioctl.c | 1 +
include/uapi/drm/habanalabs_accel.h
From: Tomer Tayar
For Gaudi1 the exported dma-buf is always composed of a single page, and
therefore the exported size is equal to this page's size.
When calling alloc_sgt_from_device_pages(), we pass 0 as the exported
size and internally calculate it as "number of pages * page size".
This makes
From: farah kassabri
After the heartbeat mechanism is now expanded to be used also
for EQ health check, we shouldn't send heartbeat messages
to FW before driver allow events to be received from FW.
Because if the driver will send two heartbeats before it enables
events to be received from FW, th
From: Moti Haimovski
Print to kernel log any device power mode changes events reported by
the FW.
Signed-off-by: Moti Haimovski
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
drivers/accel/habanalabs/gaudi2/gaudi2.c | 12
.../habanalabs/include/gaudi2/gaudi2
From: Tomer Tayar
The 'exported_size' member in 'struct hl_vm_phys_pg_pack' is used to
keep the exported dma-buf size, to be later used when the buffer is
mapped.
However it is possible that the same phys_pg_pack will be exported more
than once, and independently of when the mapping takes place.
From: David Meriin
The CPUCP interface is moved to a shared folder outside of accel as
a pre-requisite to upstream the NIC drivers that will also include
this file.
Signed-off-by: David Meriin
Reviewed-by: Oded Gabbay
Signed-off-by: Oded Gabbay
---
MAINTAINERS
From: farah kassabri
This is the second patch for applying the eq health check mechanism
which will add support for the interrupt flow for gaudi2 asic.
More info about the interrupt mechanism:
set a dedicated msix for the eq error interrupt, and add
interrupt handler for it.
when FW detects some
From: farah kassabri
Add mechanism for fw eq health check. this will be done using two flows:
using the heartbeat mechanism and raising a dedicated interrupt to
indicate an eq failure like EQ full.
This patch will add implementation for the eq heartbeat for gaudi2 asic.
More info about the heart
On Sat, 2023-09-16 at 17:32 +0300, Dan Carpenter wrote:
> On Fri, Sep 08, 2023 at 09:59:40PM +0200, Philipp Stanner wrote:
> > +static inline void *memdup_array_user(const void __user *src,
> > size_t n, size_t size)
> > +{
> > + size_t nbytes;
> > +
> > + if (unlikely(check_mul_overflo
From: Tomer Tayar
alloc_sgt_from_device_pages() includes relatively many parameters, and
in a subsequent change another offset parameter is going to be added.
Using structure fields directly when calling this function, and in
hl_map_dmabuf() it is done twice, makes it a little bit difficult to
un
From: Tomer Tayar
It is currently allowed for a user to export dma-buf with size and
offset that are not multiples of PAGE_SIZE.
The exported memory is mapped for the importer device, and there it will
be rounded to PAGE_SIZE, leading to actually exporting more than the
user intended to.
To make
Il 18/09/23 11:09, CK Hu (胡俊光) ha scritto:
On Mon, 2023-09-18 at 16:42 +0800, Hsiao Chien Sung wrote:
Add OVL compatible name for MT8195.
Reviewed-by: CK Hu
but it's weird to put this patch into IGT series. Without this patch,
mt8195 drm driver does not work not only IGT.
The driver does
Thomas Zimmermann writes:
Hello Thomas,
> Fix linker error if FB=m about missing fb_io_read and fb_io_write. The
> linker's error message suggests that this config setting has already
> been broken for other symbols.
>
> All errors (new ones prefixed by >>):
>
> sh4-linux-ld: drivers/vide
On 16/09/2023 15:09, nerdopolis wrote:
On Friday, September 15, 2023 4:28:20 AM EDT Jocelyn Falempe wrote:
This introduces a new drm panic handler, which displays a message when a panic
occurs.
So when fbcon is disabled, you can still see a kernel panic.
This is one of the missing feature, whe
On 14/09/2023 23:38, Adrián Larumbe wrote:
> The drm-stats fdinfo tags made available to user space are drm-engine,
> drm-cycles, drm-max-freq and drm-curfreq, one per job slot.
>
> This deviates from standard practice in other DRM drivers, where a single
> set of key:value pairs is provided for t
On 18/9/23 09:09, Raag Jadav wrote:
With original macro being renamed to EXPORT_NS_GPL_RUNTIME_PM_OPS(),
use the new macro.
Signed-off-by: Raag Jadav
---
drivers/iio/accel/fxls8962af-core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iio/accel/fxls8962af-core.
On 14/09/2023 23:38, Adrián Larumbe wrote:
> A new DRM GEM object function is added so that drm_show_memory_stats can
> provide more accurate memory usage numbers.
>
> Ideally, in panfrost_gem_status, the BO's purgeable flag would be checked
> after locking the driver's shrinker mutex, but drm_sho
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