Am 23.08.23 um 05:27 schrieb Matthew Brost:
[SNIP]
That is exactly what I want to avoid, tying the TDR to the job is what some
AMD engineers pushed for because it looked like a simple solution and made
the whole thing similar to what Windows does.
This turned the previous relatively clean sched
On 8/23/23 12:46, Tomasz Figa wrote:
CAUTION: Email originated externally, do not click links or open attachments
unless you recognize the sender and know the content is safe.
Hi Hsia-Jun,
On Tue, Aug 22, 2023 at 8:14 PM Hsia-Jun Li wrote:
Hello
I would like to introduce a usage of SHM
Convert list_for_each() to list_for_each_entry() so that the pos
list_head pointer and list_entry() call are no longer needed, which
can reduce a few lines of code. No functional changed.
Signed-off-by: Jinjie Ruan
---
drivers/video/fbdev/core/fbsysfs.c | 8 ++--
drivers/video/fbdev/core/mo
On Wed, Aug 23, 2023 at 02:45:53AM +, Ying Liu wrote:
> On Tuesday, August 22, 2023 7:47 PM Maxime Ripard wrote:
> >
> > Hi,
>
> Hi Maxime,
>
> Thanks for your review.
>
> >
> > On Tue, Aug 22, 2023 at 04:59:44PM +0800, Liu Ying wrote:
> > > This patch adds bindings for i.MX8qxp/qm Displ
On Tue, 22 Aug 2023, Alex Hung wrote:
> On 2023-08-22 06:01, Jani Nikula wrote:
>> Over the past years I've been trying to unify the override and firmware
>> EDID handling as well as EDID property updates. It won't work if drivers
>> do their own random things.
> Let's check how to replace these r
Reference common panel bindings to bring descriptions of common fields
like panel-timing.
Signed-off-by: Krzysztof Kozlowski
---
.../bindings/display/panel/advantech,idk-2121wr.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git
a/Documentation/devicetree/bindings/display/panel/
On Tue, 22 Aug 2023 17:49:08 +0200
Jocelyn Falempe wrote:
> On 22/08/2023 10:20, Pekka Paalanen wrote:
> > On Mon, 21 Aug 2023 17:55:33 +0200
> > Maxime Ripard wrote:
> >
> >> Hi Pekka,
> >>
> >> Thanks for answering
> >>
> >> On Fri, Aug 18, 2023 at 04:24:15PM +0300, Pekka Paalanen wrote:
Add schema with common properties shared among dual display panel ICs.
Signed-off-by: Krzysztof Kozlowski
---
v2:
https://lore.kernel.org/all/20230502120036.47165-1-krzysztof.kozlow...@linaro.org/
v1:
https://lore.kernel.org/all/20230416153929.356330-1-krzysztof.kozlow...@linaro.org/
Changes
The panel-common schema does not define what "ports" property is, so
bring the definition by referencing the panel-common-dual.yaml. Panels
can be single- or dual-link, depending on the compatible, thus add
if:then:else: block narrowing ports per variant.
Signed-off-by: Krzysztof Kozlowski
---
The panel-common schema does not define what "ports" property is, so
bring the definition by referencing the panel-common-dual.yaml. Panels
can be single- or dual-link, thus require only one port@0.
Signed-off-by: Krzysztof Kozlowski
---
Changes since v2:
1. Use panel-common-dual
Changes since
Support IGT (Intel GPU Tools) in Mediatek DisplayPort driver
Signed-off-by: Shuijing Li
---
drivers/gpu/drm/mediatek/mtk_dsi.c | 20
1 file changed, 20 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c
b/drivers/gpu/drm/mediatek/mtk_dsi.c
index 7d5250351193..a4
Hi Krzysztof,
Thank you for the patch.
On Wed, Aug 23, 2023 at 10:14:58AM +0200, Krzysztof Kozlowski wrote:
> Add schema with common properties shared among dual display panel ICs.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> v2:
> https://lore.kernel.org/all/20230502120036.47165-1-krz
On Wed, Aug 23, 2023 at 4:25 PM Shuijing Li wrote:
>
> Support IGT (Intel GPU Tools) in Mediatek DisplayPort driver
The commit message makes little sense.
First of all, you are changing the DSI driver, not the DisplayPort driver.
Second, the subject should say what was changed. In this case it
On Monday, August 21, 2023 9:34:52 AM EDT Jocelyn Falempe wrote:
> On 13/08/2023 04:20, nerdopolis wrote:
> > On Wednesday, August 9, 2023 3:17:27 PM EDT Jocelyn Falempe wrote:
> >> This introduces a new drm panic handler, which displays a message when a
> >> panic occurs.
> >> So when fbcon is di
On Wednesday, August 23, 2023 3:32 PM Maxime Ripard wrote:
>
> On Wed, Aug 23, 2023 at 02:45:53AM +, Ying Liu wrote:
> > On Tuesday, August 22, 2023 7:47 PM Maxime Ripard
> wrote:
> > >
> > > Hi,
> >
> > Hi Maxime,
> >
> > Thanks for your review.
> >
> > >
> > > On Tue, Aug 22, 2023 at 04
On 21/08/2023 17:09, Robin Murphy wrote:
> On 2023-08-14 11:54, Steven Price wrote:
> [...]
>>> +/**
>>> + * panthor_gpu_l2_power_on() - Power-on the L2-cache
>>> + * @ptdev: Device.
>>> + *
>>> + * Return: 0 on success, a negative error code otherwise.
>>> + */
>>> +int panthor_gpu_l2_power_on(str
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR". Correct it
to keep consistent format and avoid copy-paste issues.
Signed-off-by: Krzysztof Kozlowski
---
drivers/gpu/drm/drm_client.c| 2 +-
drivers/gpu/dr
There is a spelling mistake in variable throtting_events, rename
it to throttling_events.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/amd/pm/swsmu/smu11/arcturus_ppt.c| 6 +++---
drivers/gpu/drm/amd/pm/swsmu/smu13/aldebaran_ppt.c | 6 +++---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13
On Wed, 23 Aug 2023 10:14:59 +0200, Krzysztof Kozlowski wrote:
> The panel-common schema does not define what "ports" property is, so
> bring the definition by referencing the panel-common-dual.yaml. Panels
> can be single- or dual-link, thus require only one port@0.
>
> Signed-off-by: Krzysztof
On 23/08/2023 10:11, Pekka Paalanen wrote:
On Tue, 22 Aug 2023 17:49:08 +0200
Jocelyn Falempe wrote:
On 22/08/2023 10:20, Pekka Paalanen wrote:
On Mon, 21 Aug 2023 17:55:33 +0200
Maxime Ripard wrote:
Hi Pekka,
Thanks for answering
On Fri, Aug 18, 2023 at 04:24:15PM +0300, Pekka Paalan
On 21/08/2023 18:56, Robin Murphy wrote:
> On 2023-08-14 12:18, Steven Price wrote:
>> On 11/08/2023 20:26, Robin Murphy wrote:
>>> On 2023-08-11 17:56, Daniel Stone wrote:
Hi,
On 11/08/2023 17:35, Robin Murphy wrote:
> On 2023-08-09 17:53, Boris Brezillon wrote:
>> +obj-$(CO
Support IGT (Intel GPU Tools) in Mediatek DSI driver.
According to the description of MIPI Alliance Specification for D-PHY
Version 1.1, the maximum supported data rate is 1.5Gbps, so add mode_valid
callback to dsi bridge to filter out the data rate exceeding the
Specification.
Signed-off-by: Shu
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: dri-devel On Behalf Of Colin
Ian King
Sent: Wednesday, August 23, 2023 5:03 PM
To: Deucher, Alexander ; Koenig, Christian
; Pan, Xinhui ; David Airlie
; Daniel Vetter ; Lazar, Lijo
- Add a new API to the backing store/allocator to longterm-pin the page.
For example, something along the lines of shmem_pin_mapping_page_longterm()
for shmem as suggested by Daniel. A similar one needs to be added for
hugetlbfs as well.
This may also be reasonable.
Sounds reasonable
On 23/08/2023 10:34, Laurent Pinchart wrote:
> Hi Krzysztof,
>
> Thank you for the patch.
>
> On Wed, Aug 23, 2023 at 10:14:58AM +0200, Krzysztof Kozlowski wrote:
>> Add schema with common properties shared among dual display panel ICs.
>>
>> Signed-off-by: Krzysztof Kozlowski
>>
>> ---
>>
>> v2
On 23/08/2023 11:08, Rob Herring wrote:
>
> On Wed, 23 Aug 2023 10:14:59 +0200, Krzysztof Kozlowski wrote:
>> The panel-common schema does not define what "ports" property is, so
>> bring the definition by referencing the panel-common-dual.yaml. Panels
>> can be single- or dual-link, thus require
Dor Askayo (1):
nouveau: add interface to make buffer objects global
James Zhu (2):
xf86drm: update DRM_NODE_NAME_MAX supporting more nodes
xf86drm: use drm device name to identify drm node type
Jan Beich (1):
meson: drop pthread-stubs dependency on BSDs
Jonathan Gray (1)
On Wed, Aug 23, 2023 at 11:35:24AM +0200, Krzysztof Kozlowski wrote:
> On 23/08/2023 10:34, Laurent Pinchart wrote:
> > Hi Krzysztof,
> >
> > Thank you for the patch.
> >
> > On Wed, Aug 23, 2023 at 10:14:58AM +0200, Krzysztof Kozlowski wrote:
> >> Add schema with common properties shared among d
Hi Brandon,
A few nits I've found where I'm getting some kernel locking errors, when
running this new series.
On 8/18/23 10:43, Brandon Pollack wrote:
From: Jim Shargo
This change supports multiple CRTCs, encoders, connectors instead of one
of each per device.
Since ConfigFS-based devices
On Tuesday, August 8th, 2023 at 17:04, James Zhu wrote:
> I have a MR for libdrm to support drm nodes type up to 2^MINORBITS
> nodes which can work with these patches,
>
> https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/305
FWIW, this MR has been merged, so in theory this kernel patch
On Wednesday, August 23rd, 2023 at 12:53, Simon Ser wrote:
> On Tuesday, August 8th, 2023 at 17:04, James Zhu jam...@amd.com wrote:
>
> > I have a MR for libdrm to support drm nodes type up to 2^MINORBITS
> > nodes which can work with these patches,
> >
> > https://gitlab.freedesktop.org/mesa/d
Assume 8bpc is supported if Sink claims DSC support.
Also consider bpc constraint coming from EDID while computing
input BPC for DSC.
Ankit Nautiyal (2):
drm/display/dp: Default 8 bpc support when DSC is supported
drivers/drm/i915: Honor limits->max_bpp while computing DSC max input
bpp
As per DP v1.4, a DP DSC Sink device shall support 8bpc in DPCD 6Ah.
Apparently some panels that do support DSC, are not setting the bit for
8bpc.
So always assume 8bpc support by DSC decoder, when DSC is claimed to be
supported.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/display/drm_dp_
Edid specific BPC constraints are stored in limits->max_bpp. Honor these
limits while computing the input bpp for DSC.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/int
Hi Danilo,
kernel test robot noticed the following build warnings:
[auto build test WARNING on ad1367f831f8743746a1f49705c28e36a7c95525]
url:
https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-nouveau-uapi-don-t-pass-NO_PREFETCH-flag-implicitly/20230823-074237
base
On Wed, Aug 23, 2023 at 11:53:56AM +0200, Krzysztof Kozlowski wrote:
> On 23/08/2023 11:08, Rob Herring wrote:
> >
> > On Wed, 23 Aug 2023 10:14:59 +0200, Krzysztof Kozlowski wrote:
> >> The panel-common schema does not define what "ports" property is, so
> >> bring the definition by referencing t
https://bugzilla.kernel.org/show_bug.cgi?id=217664
--- Comment #23 from Alex Deucher (alexdeuc...@gmail.com) ---
Is the system accessible on resume? I.e., can you get ssh access if the
display is not active?
--
You may reply to this email to add a comment.
You are receiving this mail because:
Hi Steven, thanks for your feedback.
On 21.08.2023 16:56, Steven Price wrote:
>> We calculate the amount of time the GPU spends on a job with ktime samples,
>> and then add it to the cumulative total for the open DRM file, which is
>> what will be eventually exposed through the 'fdinfo' DRM file d
Allow A7xx SKUs, such as the A730 GPU found on SM8450 and friends.
They use GMU for all things DVFS, just like most A6xx GPUs.
Reviewed-by: Krzysztof Kozlowski
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
Documentation/devicet
This series attempts to introduce Adreno 700 support (with A730 and A740
found on SM8450 and SM8550 respectively), reusing much of the existing
A6xx code. This submission largely lays the groundwork for expansion and
more or less gives us feature parity (on the kernel side, that is) with
existing A
When booting the GMU, the QMP mailbox should be pinged about some tunables
(e.g. adaptive clock distribution state). To achieve that, a reference to
it is necessary. Allow it and require it with A730.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Acked-by: Krzysz
Add support for Adreno 730, also known as GEN7_0_x, found on SM8450.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 126 -
drivers/gpu/drm/msm/adreno/a6xx_h
Provide the necessary alternations to mostly support state dumping on
A7xx. Newer GPUs will probably require more changes here. Crashdumper
and debugbus remain untested.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/
A7xx GPUs are - from kernel's POV anyway - basically another generation
of A6xx. They build upon the A650/A660_family advancements, skipping some
writes (presumably more values are preset correctly on reset), adding
some new ones and changing others.
One notable difference is the introduction of a
The QMP mailbox expects to be notified of the ACD (Adaptive Clock
Distribution) state. Get a handle to the mailbox at probe time and
poke it at GMU resume.
Since we don't fully support ACD yet, hardcode the message to "val: 0"
(state = disabled).
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-
Some GPUs - particularly A7xx ones - are really really stubborn and
sometimes take a longer-than-expected time to finish unhalting GBIF.
Note that this is not caused by the request a few lines above.
Poll for the unhalt ack to make sure we're not trying to write bits to
an essentially dead GPU th
The GMU on the A7xx series is pretty much the same as on the A6xx parts.
It's now "smarter", needs a bit less register writes and controls more
things (like inter-frame power collapse) mostly internally (instead of
us having to write to G[PM]U_[CG]X registers from APPS)
The only difference worth m
Add some missing definitions required for A7 support.
This may be substituted with a mesa header sync.
Tested-by: Neil Armstrong # on SM8550-QRD
Tested-by: Dmitry Baryshkov # sm8450
Signed-off-by: Konrad Dybcio
---
drivers/gpu/drm/msm/adreno/a6xx.xml.h | 9 +
drivers/gpu/drm/msm/a
A740 builds upon the A730 IP, shuffling some values and registers
around. More differences will appear when things like BCL are
implemented.
adreno_is_a740_family is added in preparation for more A7xx GPUs,
the logic checks will be valid resulting in smaller diffs.
Tested-by: Neil Armstrong # on
On Wed, Aug 23, 2023 at 4:11 PM Hsia-Jun Li wrote:
>
>
>
> On 8/23/23 12:46, Tomasz Figa wrote:
> > CAUTION: Email originated externally, do not click links or open
> > attachments unless you recognize the sender and know the content is safe.
> >
> >
> > Hi Hsia-Jun,
> >
> > On Tue, Aug 22, 2023
On Wed, 23 Aug 2023 10:11:07 +0200, Krzysztof Kozlowski wrote:
> Reference common panel bindings to bring descriptions of common fields
> like panel-timing.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../bindings/display/panel/advantech,idk-2121wr.yaml | 3 +++
> 1 file changed,
https://bugzilla.kernel.org/show_bug.cgi?id=217664
Mario Limonciello (AMD) (mario.limoncie...@amd.com) changed:
What|Removed |Added
CC||mari
Hi Simon,
Thanks! Yes, this kernel patch should work with latest libdrm.
Best regards!
James Zhu
On 2023-08-23 06:53, Simon Ser wrote:
On Tuesday, August 8th, 2023 at 17:04, James Zhu wrote:
I have a MR for libdrm to support drm nodes type up to 2^MINORBITS
nodes which can work with these
On 8/23/23 04:53, Faith Ekstrand wrote:
On Tue, Aug 22, 2023 at 6:41 PM Danilo Krummrich mailto:d...@redhat.com>> wrote:
Currently, NO_PREFETCH is passed implicitly through
drm_nouveau_gem_pushbuf_push::length and drm_nouveau_exec_push::va_len.
Since this is a direct representation
Hi,
On Sun, Aug 13, 2023 at 1:51 AM Biju Das wrote:
>
> The driver has ID table, but still it uses device_get_match_data()
> for retrieving match data. Replace device_get_match_data->
> i2c_get_match_data() for retrieving OF/ACPI/I2C match data by adding
> match data for ID table similar to OF t
Hi Doug Anderson,
> Subject: Re: [PATCH] drm/bridge/analogix/anx78xx: Extend match data support
> for ID table
>
> Hi,
>
> On Sun, Aug 13, 2023 at 1:51 AM Biju Das
> wrote:
> >
> > The driver has ID table, but still it uses device_get_match_data()
> > for retrieving match data. Replace device_
On Wed, Aug 23, 2023 at 09:10:51AM +0200, Christian König wrote:
> Am 23.08.23 um 05:27 schrieb Matthew Brost:
> > [SNIP]
> > > That is exactly what I want to avoid, tying the TDR to the job is what
> > > some
> > > AMD engineers pushed for because it looked like a simple solution and made
> > > t
Hi Brandon,
On 8/18/23 10:43, Brandon Pollack wrote:
From: Jim Shargo
This change adds the basic scaffolding for ConfigFS, including setting
up the default directories. It does not allow for the registration of
configfs-backed devices, which is complex and provided in a follow-up
commit.
This
On 2023-08-23 01:49, Christian König wrote:
Am 22.08.23 um 20:27 schrieb Philip Yang:
On 2023-08-22 05:43, Christian König wrote:
Am 21.08.23 um 22:02 schrieb Philip Yang:
Without unsigned long typecast, the size is passed in as zero if page
array size >= 4GB, nr_pages >= 0x10, then sg
On Wed, Aug 23, 2023 at 11:26 AM Matthew Brost wrote:
>
> On Wed, Aug 23, 2023 at 09:10:51AM +0200, Christian König wrote:
> > Am 23.08.23 um 05:27 schrieb Matthew Brost:
> > > [SNIP]
> > > > That is exactly what I want to avoid, tying the TDR to the job is what
> > > > some
> > > > AMD engineers
On Tue, Aug 22, 2023 at 11:53:24AM -0700, John Harrison wrote:
> On 8/11/2023 11:20, Zhanjun Dong wrote:
> > This attempts to avoid circular locking dependency between flush delayed
> > work and intel_gt_reset.
> > When intel_gt_reset was called, task will hold a lock.
> > To cacel delayed work her
Hi Ankit,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-tip/drm-tip]
[also build test WARNING on linus/master v6.5-rc7 next-20230823]
[cannot apply to drm-intel/for-linux-next drm-intel/for-linux-next-fixes
drm-misc/drm-misc-next]
[If your patch is
On Wed, Aug 23, 2023 at 5:36 PM Biju Das wrote:
> > On Sun, Aug 13, 2023 at 1:51 AM Biju Das
> > wrote:
...
> > It seems like this is a sign that nobody is actually using the i2c match
> > table.
You can't know. The I2C ID table allows to instantiate a device from
user space by supplying it's
On Wed, Aug 23, 2023 at 7:52 PM Andy Shevchenko
wrote:
> On Wed, Aug 23, 2023 at 5:36 PM Biju Das wrote:
> > > On Sun, Aug 13, 2023 at 1:51 AM Biju Das
> > > wrote:
...
> > > It seems like this is a sign that nobody is actually using the i2c match
> > > table.
>
> You can't know. The I2C ID ta
LGTM!
Reviewed-by: Maaz Mombasawala
Maaz Mombasawala (VMware)
On 8/17/2023 9:13 PM, Zack Rusin wrote:
From: Zack Rusin
vmw_bo_unreference sets the input buffer to null on exit, resulting in
null ptr deref's on the subsequent drm gem put calls.
This went unnoticed because only very old users
Hi,
On Wed, Aug 23, 2023 at 9:53 AM Andy Shevchenko
wrote:
>
> On Wed, Aug 23, 2023 at 5:36 PM Biju Das wrote:
> > > On Sun, Aug 13, 2023 at 1:51 AM Biju Das
> > > wrote:
>
> ...
>
> > > It seems like this is a sign that nobody is actually using the i2c match
> > > table.
>
> You can't know. Th
On Wed, Aug 23, 2023 at 11:41:19AM -0400, Alex Deucher wrote:
> On Wed, Aug 23, 2023 at 11:26 AM Matthew Brost
> wrote:
> >
> > On Wed, Aug 23, 2023 at 09:10:51AM +0200, Christian König wrote:
> > > Am 23.08.23 um 05:27 schrieb Matthew Brost:
> > > > [SNIP]
> > > > > That is exactly what I want t
On Fri, Aug 18, 2023 at 05:06:42PM -0300, André Almeida wrote:
> Create a section that specifies how to deal with DRM device resets for
> kernel and userspace drivers.
>
> Signed-off-by: André Almeida
>
> ---
>
> v7 changes:
> - s/application/graphical API contex/ in the robustness part (Miche
On 8/23/2023 09:00, Daniel Vetter wrote:
On Tue, Aug 22, 2023 at 11:53:24AM -0700, John Harrison wrote:
On 8/11/2023 11:20, Zhanjun Dong wrote:
This attempts to avoid circular locking dependency between flush delayed
work and intel_gt_reset.
When intel_gt_reset was called, task will hold a lock
On Tue, Aug 22, 2023 at 03:41:17PM +, Deucher, Alexander wrote:
[Public]
-Original Message-
From: Sasha Levin
Sent: Tuesday, August 22, 2023 7:36 AM
To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
Cc: Deucher, Alexander ; Kuehling, Felix
; Koenig, Christian ;
Mike Lothian
Hi Rodrigo,
Em 23/08/2023 14:31, Rodrigo Vivi escreveu:
On Fri, Aug 18, 2023 at 05:06:42PM -0300, André Almeida wrote:
Create a section that specifies how to deal with DRM device resets for
kernel and userspace drivers.
Signed-off-by: André Almeida
---
v7 changes:
- s/application/graphica
On Wed, Aug 23, 2023 at 8:14 PM Doug Anderson wrote:
> On Wed, Aug 23, 2023 at 9:53 AM Andy Shevchenko
> wrote:
> > On Wed, Aug 23, 2023 at 5:36 PM Biju Das wrote:
...
> > No. Please, do not remove the I2C ID table. It had already been
> > discussed a few years ago.
>
> If you really want the
Currently, NO_PREFETCH is passed implicitly through
drm_nouveau_gem_pushbuf_push::length and drm_nouveau_exec_push::va_len.
Since this is a direct representation of how the HW is programmed it
isn't really future proof for a uAPI. Hence, fix this up for the new
uAPI and split up the va_len field o
Hi,
On Wed, Aug 23, 2023 at 10:10 AM Andy Shevchenko
wrote:
>
> > No. Please, do not remove the I2C ID table. It had already been
> > discussed a few years ago.
> >
> > > Yes, it make sense, as it saves some memory
>
> Okay, reading code a bit, it seems that it won't work with purely i2c
> ID mat
On 2023-08-22 11:41, Deucher, Alexander wrote:
[Public]
-Original Message-
From: Sasha Levin
Sent: Tuesday, August 22, 2023 7:37 AM
To: linux-ker...@vger.kernel.org; sta...@vger.kernel.org
Cc: Deucher, Alexander ; Kuehling, Felix
; Koenig, Christian ;
Mike Lothian ; Sasha Levin ; Pan,
On Mon, Aug 21, 2023 at 11:27:29AM +0200, Maxime Ripard wrote:
> On Tue, Aug 15, 2023 at 11:12:46AM +0300, Jani Nikula wrote:
> > On Mon, 14 Aug 2023, Imre Deak wrote:
> > > On Sun, Aug 13, 2023 at 03:41:30PM +0200, Linux regression tracking
> > > (Thorsten Leemhuis) wrote:
> > > Hi,
> > >
> > >>
On 8/23/23 09:21, Jinjie Ruan wrote:
Convert list_for_each() to list_for_each_entry() so that the pos
list_head pointer and list_entry() call are no longer needed, which
can reduce a few lines of code. No functional changed.
Signed-off-by: Jinjie Ruan
applied.
Thanks!
Helge
On Wed, Aug 23, 2023 at 1:17 PM Danilo Krummrich wrote:
> Currently, NO_PREFETCH is passed implicitly through
> drm_nouveau_gem_pushbuf_push::length and drm_nouveau_exec_push::va_len.
>
> Since this is a direct representation of how the HW is programmed it
> isn't really future proof for a uAPI.
@Mahfooz, Hamza
can you respin with the NULL check?
Alex
On Wed, Aug 16, 2023 at 10:25 AM Christian König
wrote:
>
> Am 16.08.23 um 15:41 schrieb Hamza Mahfooz:
> >
> > On 8/16/23 01:55, Christian König wrote:
> >>
> >>
> >> Am 15.08.23 um 19:26 schrieb Hamza Mahfooz:
> >>> fbcon requires that
Sure - you're also welcome to push the first two patches after fixing the
indentation if you'd like
On Wed, 2023-08-23 at 03:19 +, Lin, Wayne wrote:
> [Public]
>
> Thanks, Lyude!
> Should I push another version to fix the indention?
>
> > -Original Message-
> > From: Lyude Paul
> >
On Tue, Aug 22, 2023 at 11:48 AM Rafael J. Wysocki wrote:
>
> On Tue, Aug 22, 2023 at 8:02 PM Rob Clark wrote:
> >
> > From: Rob Clark
> >
> > In the process of adding lockdep annotation for drm GPU scheduler's
> > job_run() to detect potential deadlock against shrinker/reclaim, I hit
> > this l
On 8/23/23 16:51, Alex Deucher wrote:
@Mahfooz, Hamza
can you respin with the NULL check?
sure.
Alex
On Wed, Aug 16, 2023 at 10:25 AM Christian König
wrote:
Am 16.08.23 um 15:41 schrieb Hamza Mahfooz:
On 8/16/23 01:55, Christian König wrote:
Am 15.08.23 um 19:26 schrieb Hamza Mahf
From: Rob Clark
This is a re-post of the remaining patches from:
https://patchwork.freedesktop.org/series/114490/
Part of the hold-up of the remaining uabi patches was compositor
support, but now an MR for kwin exists:
https://invent.kde.org/plasma/kwin/-/merge_requests/4358
The syncobj user
From: Rob Clark
The initial purpose is for igt tests, but this would also be useful for
compositors that wait until close to vblank deadline to make decisions
about which frame to show.
The igt tests can be found at:
https://gitlab.freedesktop.org/robclark/igt-gpu-tools/-/commits/fence-deadline
From: Rob Clark
Add a new flag to let userspace provide a deadline as a hint for syncobj
and timeline waits. This gives a hint to the driver signaling the
backing fences about how soon userspace needs it to compete work, so it
can adjust GPU frequency accordingly. An immediate deadline can be
g
From: Rob Clark
This consists of simply storing the most recent deadline, and adding an
ioctl to retrieve the deadline. This can be used in conjunction with
the SET_DEADLINE ioctl on a fence fd for testing. Ie. create various
sw_sync fences, merge them into a fence-array, set deadline on the
fe
https://bugzilla.kernel.org/show_bug.cgi?id=217664
--- Comment #25 from popus_czy_to_ty (pentelja...@o2.pl) ---
sudo add-apt-repository ppa:cappelikan/ppa
sudo apt update
sudo apt install mainline
sudo mainline
lsd@Crawler-E25:~$ sudo mainline install 6.4.11
mainline 1.4.8
Updating Kernels...
P
On Wed, Aug 09, 2023 at 06:34:01AM +0800, Sui Jingfeng wrote:
> From: Sui Jingfeng
>
> v1:
> * Various improve.
> v2:
> * More fixes, optimizations and improvements.
>
> Sui Jingfeng (11):
> PCI/VGA: Use unsigned type for the io_state variable
> PCI: Add the pci_get_class_masked
On Fri, Aug 18, 2023 at 4:35 AM Sarah Walker wrote:
>
> This patch series adds the initial DRM driver for Imagination Technologies
> PowerVR
> GPUs, starting with those based on our Rogue architecture. It's worth pointing
> out that this is a new driver, written from the ground up, rather than a
https://bugzilla.kernel.org/show_bug.cgi?id=217664
--- Comment #26 from Mario Limonciello (AMD) (mario.limoncie...@amd.com) ---
I've never used that tool before, ut please make sure that you have all the
necessary packages installed. You need both the linux-image and linux-modules
packages.
--
On Wed, Aug 23, 2023 at 01:26:09PM -0400, Rodrigo Vivi wrote:
> On Wed, Aug 23, 2023 at 11:41:19AM -0400, Alex Deucher wrote:
> > On Wed, Aug 23, 2023 at 11:26 AM Matthew Brost
> > wrote:
> > >
> > > On Wed, Aug 23, 2023 at 09:10:51AM +0200, Christian König wrote:
> > > > Am 23.08.23 um 05:27 sch
The prev pointer in __drm_gpuva_sm_map() was used to implement automatic
merging of mappings. Since automatic merging did not make its way
upstream, remove this leftover.
Fixes: e6303f323b1a ("drm: manager to keep track of GPUs VA mappings")
Signed-off-by: Danilo Krummrich
---
drivers/gpu/drm/dr
Hi Matt,
On 8/11/23 04:31, Matthew Brost wrote:
As a prerequisite to merging the new Intel Xe DRM driver [1] [2], we
have been asked to merge our common DRM scheduler patches first.
This a continuation of a RFC [3] with all comments addressed, ready for
a full review, and hopefully in state whi
These GPU registers will be used when programming the cycle counter, which
we need for providing accurate fdinfo drm-cycles values to user space.
Signed-off-by: Adrián Larumbe
---
drivers/gpu/drm/panfrost/panfrost_regs.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/pa
The drm-stats fdinfo tags made available to user space are drm-engine,
drm-cycles, drm-max-freq and drm-curfreq, one per job slot.
This deviates from standard practice in other DRM drivers, where a single
set of key:value pairs is provided for the whole render engine. However,
Panfrost has separat
Some BO's might be mapped onto physical memory chunkwise and on demand,
like Panfrost's tiler heap. In this case, even though the
drm_gem_shmem_object page array might already be allocated, only a very
small fraction of the BO is currently backed by system memory, but
drm_show_memory_stats will the
This patch series adds fdinfo support to the Panfrost DRM driver. It will
display a series of key:value pairs under /proc/pid/fdinfo/fd for render
processes that open the Panfrost DRM file.
The pairs contain basic drm gpu engine and memory region information that
can either be cat by a privileged
The current implementation will try to pick the highest available
unit. This is rather unflexible, and allowing drivers to display BO size
statistics through fdinfo in units of their choice might be desirable.
The new argument to drm_show_memory_stats is to be interpreted as the
integer multiplier
A new DRM GEM object function is added so that drm_show_memory_stats can
provider more accurate memory usage numbers.
Ideally, in panfrost_gem_status, the BO's purgeable flag would be checked
after locking the driver's shrinker mutex, but drm_show_memory_stats takes
over the drm file's object hand
BO's RSS is updated every time new pages are allocated and mapped for the
object, either in its entirety at creation time for non-heap buffers, or
else on demand for heap buffers at GPU page fault's IRQ handler.
Same calculations had to be done for imported PRIME objects, since backing
storage for
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