Hi
Am 04.05.23 um 13:59 schrieb Sui Jingfeng:
Hi,
I tested the whole patch set on a LS3A5000(LoongArch)machine with efifb
driver,
with both fbtest and fbdev of IGT, The test result say passed and I can
not see anything wired happen.
Tested-by: Sui Jingfeng
Thanks for testing.
On
Hi
Am 04.05.23 um 10:08 schrieb Arnd Bergmann:
On Thu, May 4, 2023, at 09:45, Thomas Zimmermann wrote:
Fbdev provides helpers for framebuffer I/O, such as fb_readl(),
fb_writel() or fb_memcpy_to_fb(). The implementation of each helper
depends on the architecture, but they are all equivalent to
Hi
Am 04.05.23 um 17:37 schrieb Sam Ravnborg:
Hi Thomas,
On Thu, May 04, 2023 at 09:45:37AM +0200, Thomas Zimmermann wrote:
Replace include statements for with . Fixes
the coding style: if a header is available in asm/ and linux/, it
is preferable to include the header from linux/. This only
https://bugzilla.kernel.org/show_bug.cgi?id=217398
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
On 2023-05-04 22:30:07, Teres Alexis, Alan Previn wrote:
> On Thu, 2023-04-27 at 16:48 -0700, Teres Alexis, Alan Previn wrote:
> > Because of the additional firmware, component-driver and
> > initialization depedencies required on MTL platform before a
> > PXP context can be created, UMD calling fo
No functional modification involved.
./drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c:146:2-3: Unneeded semicolon.
Reported-by: Abaci Robot
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4871
Signed-off-by: Jiapeng Chong
---
drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c | 2 +-
1 file changed, 1 insert
> The DPHY timings are currently hard coded. Since the input
> clock can be variable, the phy timings need to be variable
> too. Add an additional variable to the driver data to enable
> this feature to prevent breaking boards that don't support it.
>
> The phy_mipi_dphy_get_default_config functi
https://bugzilla.kernel.org/show_bug.cgi?id=217398
--- Comment #5 from a1bert (a1b...@atlas.cz) ---
https://gitlab.freedesktop.org/drm/amd/-/issues/2543
--
You may reply to this email to add a comment.
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Am 05.05.23 um 05:03 schrieb ye.xingc...@zte.com.cn:
From: Ye Xingchen
convert the fget() use to fdget().
Well the rational is missing. Why should we do that?
Christian.
Signed-off-by: Ye Xingchen
---
drivers/dma-buf/sync_file.c | 10 +-
1 file changed, 5 insertions(+), 5 dele
A recent change to use dynamic GPIO base allocation in the
OMAP GPIO driver caused a regression in some OMAP1 boards.
This series fixes up the Nokia 770 board from 2005:
https://en.wikipedia.org/wiki/Nokia_770_Internet_Tablet
I don't know how urgent the fix is, you decide. For me,
it is fair if fr
The Nokia 770 is using GPIOs from the global numberspace on the
CBUS node to pass down to the LCD controller. This regresses when we
let the OMAP GPIO driver use dynamic GPIO base.
The Nokia 770 now has dynamic allocation of IRQ numbers, so this
needs to be fixed for it to work.
As this is the on
The platform devices on the Nokia 770 is using some
board-specific IRQs that get statically assigned to platform
devices in the boardfile.
This does not work with dynamic IRQ chip bases.
Utilize the NULL device to define some board-specific
GPIO lookups and use these to immediately look up the
sa
A recent change to the OMAP driver making it use a dynamic GPIO
base created problems with some old OMAP1 board files, among
them Nokia 770, SX1 and also the OMAP2 Nokia n8x0.
Fix up all instances of GPIOs being used for the MMC driver
by pushing the handling of power, slot selection and MMC
"cove
On Thu, 4 May 2023 17:25:57 -0400
Harry Wentland wrote:
> We have steered away for a long time now from driver-specific KMS APIs
> for good reasons but never codified our stance. With the proposal of
> new, driver-specific color management uAPIs [1] it is important to
> outline the requirements f
On Thu, May 04, 2023 at 08:34:07AM +0200, Konrad Dybcio wrote:
>
>
> On 3.05.2023 22:32, Akhil P Oommen wrote:
> > On Tue, May 02, 2023 at 11:40:26AM +0200, Konrad Dybcio wrote:
> >>
> >>
> >> On 2.05.2023 09:49, Akhil P Oommen wrote:
> >>> On Sat, Apr 01, 2023 at 01:54:43PM +0200, Konrad Dybcio
On 04-05-23, 17:19, Palmer Dabbelt wrote:
> From: Palmer Dabbelt
>
> This trips up a maybe-uninitialized warning, but it's actually just not
> used.
Thanks but this is already fixed by 714dd3c29a22 ("phy: mediatek: hdmi:
mt8195: fix uninitialized variable usage in pll_calc") in phy/next and
shou
On 13-04-23, 14:46, Guillaume Ranquet wrote:
> I've received a report from kernel test report [1] that a variable was used
> unitialized in the mtk8195 hdmi phy code.
>
> I've upon fixing that issue found out that the clock rate calculation
> was erroneous since the calculus was moved to div_u64.
On 14-04-23, 08:22, Tom Rix wrote:
> clang reports
> drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:298:6: error: variable
> 'ret' is uninitialized when used here [-Werror,-Wuninitialized]
> if (ret)
> ^~~
> ret should have been set by the preceding call to mtk_hdmi_pll_set_hw.
I
Hi Linus,
kernel test robot noticed the following build errors:
[auto build test ERROR on 348551ddaf311c76b01cdcbaf61b6fef06a49144]
url:
https://github.com/intel-lab-lkp/linux/commits/Linus-Walleij/Input-ads7846-Convert-to-use-software-nodes/20230505-162601
base
On 04/05/2023 17:06, Yang, Fei wrote:
> On 04/05/2023 00:02, fei.y...@intel.com wrote:
>> From: Fei Yang
>>
>> Currently the KMD is using enum i915_cache_level to set caching
policy for
>> buffer objects. This is flaky because the PAT index which really
controls
>> the caching behavior
Hi Linus,
kernel test robot noticed the following build errors:
[auto build test ERROR on 348551ddaf311c76b01cdcbaf61b6fef06a49144]
url:
https://github.com/intel-lab-lkp/linux/commits/Linus-Walleij/Input-ads7846-Convert-to-use-software-nodes/20230505-162601
base
On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
> On Thu, 4 May 2023 17:25:57 -0400
> Harry Wentland wrote:
>
> > We have steered away for a long time now from driver-specific KMS APIs
> > for good reasons but never codified our stance. With the proposal of
> > new, driver-specifi
On 5.05.2023 10:46, Akhil P Oommen wrote:
> On Thu, May 04, 2023 at 08:34:07AM +0200, Konrad Dybcio wrote:
>>
>>
>> On 3.05.2023 22:32, Akhil P Oommen wrote:
>>> On Tue, May 02, 2023 at 11:40:26AM +0200, Konrad Dybcio wrote:
On 2.05.2023 09:49, Akhil P Oommen wrote:
> On Sat,
A recent change to use dynamic GPIO base allocation in the
OMAP GPIO driver caused a regression in some OMAP1 boards.
This series fixes up the Nokia 770 board from 2005:
https://en.wikipedia.org/wiki/Nokia_770_Internet_Tablet
I don't know how urgent the fix is, you decide. For me,
it is fair if fr
The Nokia 770 is using GPIOs from the global numberspace on the
CBUS node to pass down to the LCD controller. This regresses when we
let the OMAP GPIO driver use dynamic GPIO base.
The Nokia 770 now has dynamic allocation of IRQ numbers, so this
needs to be fixed for it to work.
As this is the on
A recent change to the OMAP driver making it use a dynamic GPIO
base created problems with some old OMAP1 board files, among
them Nokia 770, SX1 and also the OMAP2 Nokia n8x0.
Fix up all instances of GPIOs being used for the MMC driver
by pushing the handling of power, slot selection and MMC
"cove
The platform devices on the Nokia 770 is using some
board-specific IRQs that get statically assigned to platform
devices in the boardfile.
This does not work with dynamic IRQ chip bases.
Utilize the NULL device to define some board-specific
GPIO lookups and use these to immediately look up the
sa
On Fri, 5 May 2023 12:16:55 +0200
Daniel Vetter wrote:
> On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
> > On Thu, 4 May 2023 17:25:57 -0400
> > Harry Wentland wrote:
> >
> > > We have steered away for a long time now from driver-specific KMS APIs
> > > for good reasons but
Hi,
This is a follow-up to a previous series that was printing a warning
when a mux has a set_parent implementation but is missing
determine_rate().
The rationale is that set_parent() is very likely to be useful when
changing the rate, but it's determine_rate() that takes the parenting
decision.
From: Stephen Boyd
We'll need to turn the code in clk_mux_determine_rate_flags() to deal
with CLK_SET_RATE_NO_REPARENT into a helper clock drivers will be able
to use if they don't want to allow reparenting.
Cc: Abel Vesa
Cc: Alessandro Zummo
Cc: Alexandre Belloni
Cc: Alexandre Torgue
Cc: "A
From: Stephen Boyd
Some clock drivers do not want to allow any reparenting on a given
clock, but usually do so by not providing any determine_rate
implementation.
Whenever we call clk_round_rate() or clk_set_rate(), this leads to
clk_core_can_round() returning false and thus the rest of the func
The Tegra sor pad clock implements a mux with a set_parent hook, but
doesn't provide a determine_rate implementation.
This is a bit odd, since set_parent() is there to, as its name implies,
change the parent of a clock. However, the most likely candidates to
trigger that parent change are either t
The determine_rate hook allows to select the proper parent and its rate
for a given clock configuration. On another hand, set_parent is there to
change the parent of a mux.
Some clocks provide a set_parent hook but don't implement
determine_rate. In such a case, set_parent is pretty much useless s
Now LoongArch provides kernel_fpu_begin() and kernel_fpu_end() in commit
2b3bd32ea3a22ea2d ("LoongArch: Provide kernel fpu functions"), so we can
enable DC_FP for DCN devices.
Signed-off-by: WANG Xuerui
Signed-off-by: Huacai Chen
---
V2: Update commit message to add the commit which provides ker
On Thu, 04 May 2023 15:22:59 +
Simon Ser wrote:
> Hi all,
>
> The goal of this RFC is to expose a generic KMS uAPI to configure the color
> pipeline before blending, ie. after a pixel is tapped from a plane's
> framebuffer and before it's blended with other planes. With this new uAPI we
> ai
On 27/04/2023 18:37, Marijn Suijten wrote:
On 2023-04-21 00:31:16, Konrad Dybcio wrote:
Add SM6350 support to the DPU1 driver to enable display output.
Signed-off-by: Konrad Dybcio
Signed-off-by: Konrad Dybcio
After addressing the comments from Dmitry (CURSOR0->DMA1 and
CURSOR1->DMA2), this
Hi Sebastian,
Thanks for the v2 of your series. Looks great!
One nitpick though: you seem to wrap the patch message lines at ~50
characters sometimes, which is awfully short.
Another comment below:
On 4/22/23 22:50, Sebastian Reichel wrote:
> Avoid hard-coding the default_mode and supply it fro
On 25.04.2023 19:03, Rob Herring wrote:
> On Fri, Apr 21, 2023 at 12:31:12AM +0200, Konrad Dybcio wrote:
>> Document the SM6350 DPU.
>>
>> Signed-off-by: Konrad Dybcio
>> ---
>> .../bindings/display/msm/qcom,sm6350-dpu.yaml | 94
>> ++
>> 1 file changed, 94 insertions
Now that the driver handles only 16, 24 and 32-bit framebuffer,
it can be simplified.
No functional changes.
offset:
16bit: (bppshift = 1)
offset = width >> (4 - bppshift) => width / 8 => pitch / 16
24bit: (bppshift = 0)
offset = (width * 3) >> (4 - bppshift) => width * 3 / 16 => pitch / 16
3
From: Thomas Zimmermann
Register constants are upper case. Fix MGAREG_Status accordingly.
Signed-off-by: Thomas Zimmermann
Reviewed-by: Gerd Hoffmann
---
drivers/gpu/drm/mgag200/mgag200_mode.c | 6 +++---
drivers/gpu/drm/mgag200/mgag200_reg.h | 2 +-
2 files changed, 4 insertions(+), 4 delet
This series adds DMA and IRQ for the mgag200 driver.
Unfortunately the DMA doesn't make the driver faster.
But it's still a big improvement regarding CPU usage and latency.
CPU usage goes from 100% of 1 CPU to 3% (using top and refreshing the screen
continuously).
top without DMA, and a bash s
Even if the transfer is not faster, it brings significant
improvement in latencies and CPU usage.
CPU usage drops from 100% of one core to 3% when continuously
refreshing the screen.
The primary DMA is used to send commands (register write), and
the secondary DMA to send the pixel data.
It uses t
Register irq, and enable the softrap irq.
This patch has no functional impact since softrap
irq can't be triggered without DMA.
Signed-off-by: Jocelyn Falempe
---
drivers/gpu/drm/mgag200/mgag200_drv.c | 41 +++
drivers/gpu/drm/mgag200/mgag200_drv.h | 3 ++
drivers/gpu/dr
On Fri, May 05, 2023 at 02:20:39PM +0300, Pekka Paalanen wrote:
> On Fri, 5 May 2023 12:16:55 +0200
> Daniel Vetter wrote:
>
> > On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
> > > On Thu, 4 May 2023 17:25:57 -0400
> > > Harry Wentland wrote:
> > >
> > > > We have steered aw
On 5/5/23 06:16, Daniel Vetter wrote:
> On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
>> On Thu, 4 May 2023 17:25:57 -0400
>> Harry Wentland wrote:
>>
>>> We have steered away for a long time now from driver-specific KMS APIs
>>> for good reasons but never codified our stance.
Some corrections and replies inline.
On Fri, 5 May 2023 at 12:42, Pekka Paalanen wrote:
>
> On Thu, 04 May 2023 15:22:59 +
> Simon Ser wrote:
>
> > Hi all,
> >
> > The goal of this RFC is to expose a generic KMS uAPI to configure the color
> > pipeline before blending, ie. after a pixel is t
On 05/05, Pekka Paalanen wrote:
On Fri, 5 May 2023 12:16:55 +0200
Daniel Vetter wrote:
> On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
> > On Thu, 4 May 2023 17:25:57 -0400
> > Harry Wentland wrote:
> >
> > > We have steered away for a long time now from driver-specific KM
On Fri, May 05, 2023 at 09:20:26AM -0400, Harry Wentland wrote:
>
>
> On 5/5/23 06:16, Daniel Vetter wrote:
> > On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
> >> On Thu, 4 May 2023 17:25:57 -0400
> >> Harry Wentland wrote:
> >>
> >>> We have steered away for a long time now fr
Hey Huacai,
On 5/5/23 07:32, Huacai Chen wrote:
Now LoongArch provides kernel_fpu_begin() and kernel_fpu_end() in commit
2b3bd32ea3a22ea2d ("LoongArch: Provide kernel fpu functions"), so we can
enable DC_FP for DCN devices.
Have you had the chance to test how well this is working on actual
h
On 5/5/23 09:35, Daniel Vetter wrote:
> On Fri, May 05, 2023 at 09:20:26AM -0400, Harry Wentland wrote:
>>
>>
>> On 5/5/23 06:16, Daniel Vetter wrote:
>>> On Fri, May 05, 2023 at 11:43:20AM +0300, Pekka Paalanen wrote:
On Thu, 4 May 2023 17:25:57 -0400
Harry Wentland wrote:
>
On Fri, 5 May 2023 14:30:11 +0100
Joshua Ashton wrote:
> Some corrections and replies inline.
>
> On Fri, 5 May 2023 at 12:42, Pekka Paalanen wrote:
> >
> > On Thu, 04 May 2023 15:22:59 +
> > Simon Ser wrote:
...
> > > To wrap things up, let's take a real-world example: how would gamesco
Allow drivers to resolve a WW transaction rollback. This allows for
1) Putting a lower-priority transaction to sleep allowing another to
succeed instead both fighting using trylocks.
2) Letting the driver know whether a received -ENOMEM is the result of
competition with another WW transaction, whic
I just now noticed the other comments. Wiill address them.
On 2023-05-03 17:31, Tvrtko Ursulin wrote:
On 03/05/2023 09:34, Maarten Lankhorst wrote:
Based roughly on the rdma and misc cgroup controllers, with a lot of
the accounting code borrowed from rdma.
The interface is simple:
- populate
On Tue, Apr 18, 2023 at 07:04:30AM -0700, Nikita Zhandarovich wrote:
> drm_dp_dsc_sink_max_slice_count() may return 0 if something goes
> wrong on the part of the DSC sink and its DPCD register. This null
> value may be later used as a divisor in intel_dsc_compute_params(),
> which will lead to an
Hi Jocelyn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 457391b0380335d5e9a5babdec90ac53928b23b4]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-mgag200-Rename-constant-MGAREG_Status-to-MGAREG_STATUS/20230505-204705
base
On Tue, Aug 16, 2022 at 06:28:03PM +0100, Robin Murphy wrote:
> Although iommu-dma is a per-architecture chonce, that is currently
> implemented in a rather haphazard way. Selecting from the arch Kconfig
> was the original logical approach, but is complicated by having to
> manage dependencies; con
On 2023-05-05 15:50, Jason Gunthorpe wrote:
On Tue, Aug 16, 2022 at 06:28:03PM +0100, Robin Murphy wrote:
Although iommu-dma is a per-architecture chonce, that is currently
implemented in a rather haphazard way. Selecting from the arch Kconfig
was the original logical approach, but is complicate
Hi Jocelyn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 457391b0380335d5e9a5babdec90ac53928b23b4]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-mgag200-Rename-constant-MGAREG_Status-to-MGAREG_STATUS/20230505-204705
base
Hi Jocelyn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 457391b0380335d5e9a5babdec90ac53928b23b4]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-mgag200-Rename-constant-MGAREG_Status-to-MGAREG_STATUS/20230505-204705
base
On Thu, May 04, 2023 at 03:22:59PM +, Simon Ser wrote:
> Hi all,
>
> The goal of this RFC is to expose a generic KMS uAPI to configure the color
> pipeline before blending, ie. after a pixel is tapped from a plane's
> framebuffer and before it's blended with other planes. With this new uAPI we
On 05/05/2023 11:28, Vinod Koul wrote:
On 14-04-23, 08:22, Tom Rix wrote:
clang reports
drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c:298:6: error: variable
'ret' is uninitialized when used here [-Werror,-Wuninitialized]
if (ret)
^~~
ret should have been set by the prece
Hi Jocelyn,
kernel test robot noticed the following build warnings:
[auto build test WARNING on 457391b0380335d5e9a5babdec90ac53928b23b4]
url:
https://github.com/intel-lab-lkp/linux/commits/Jocelyn-Falempe/drm-mgag200-Rename-constant-MGAREG_Status-to-MGAREG_STATUS/20230505-204705
base
On Fri, May 5, 2023 at 5:28 PM Daniel Vetter wrote:
>
> On Thu, May 04, 2023 at 03:22:59PM +, Simon Ser wrote:
> > Hi all,
> >
> > The goal of this RFC is to expose a generic KMS uAPI to configure the color
> > pipeline before blending, ie. after a pixel is tapped from a plane's
> > framebuffe
On Friday, May 5th, 2023 at 17:28, Daniel Vetter wrote:
> Ok no comments from me on the actual color operations and semantics of all
> that, because I have simply nothing to bring to that except confusion :-)
>
> Some higher level thoughts instead:
>
> - I really like that we just go with graph
Last chunk of the required support for the GSC FW. This includes some
fixes to the GSC memory allocation, FW idefinition and version
management, plus a new debugfs for debug information.
Adding the FW definition will enable all the features that are dependent
on the GSC being loaded (Media C6, HuC
The release and security versions of the GSC binary are not used at
runtime to decide interface compatibility (there is a separate version
for that), but they're still useful for debug, so it is still worth
extracting them and printing them out in dmesg.
To get to these version, we need to navigat
Add FW definition and the matching override modparam.
The GSC FW has both a release version, based on platform and a rolling
counter, and a compatibility version, which is the one tracking
interface changes. Since what we care about is the interface, we use
the compatibility version in the buinary
The compatibility version is queried via an MKHI command. Right now, the
only existing interface is 1.0
This is basically the interface version for the GSC FW, so the plan is
to use it as the main tracked version, including for the binary naming
in the fetch code.
Signed-off-by: Daniele Ceraolo Sp
Add a new debugfs to dump information about the GSC. This includes:
- the FW path and SW tracking status;
- the release, security and compatibility versions;
- the HECI1 status registers.
Note that those are the same registers that the mei driver dumps in
their own status sysfs on DG2 (where mei
A few fixes/updates are required around the GSC memory allocation and it
is easier to do them all at the same time. The changes are as follows:
1 - Switch the memory allocation to stolen memory. We need to avoid
accesses from GSC FW to normal memory after the suspend function has
completed and to
This is a of the HuC support for MTL series [1]. It's been included
because one of the new patches in this series depend on it, but it
should be reviewd separately in its own thread.
[1] https://patchwork.freedesktop.org/series/117080/
Signed-off-by: Daniele Ceraolo Spurio
---
drivers/gpu/drm/i9
On 5/3/2023 1:40 AM, john.c.harri...@intel.com wrote:
From: John Harrison
The validation of the firmware table was being done inside the code
for scanning the table for the next available firmware blob. Which is
unnecessary. So pull it out into a separate function that is only
called once pe
On 5/5/23 15:16, Pekka Paalanen wrote:
On Fri, 5 May 2023 14:30:11 +0100
Joshua Ashton wrote:
Some corrections and replies inline.
On Fri, 5 May 2023 at 12:42, Pekka Paalanen wrote:
On Thu, 04 May 2023 15:22:59 +
Simon Ser wrote:
...
To wrap things up, let's take a real-world e
Hi Maxime,
kernel test robot noticed the following build errors:
[auto build test ERROR on 145e5cddfe8b4bf607510b2dcf630d95f4db420f]
url:
https://github.com/intel-lab-lkp/linux/commits/Maxime-Ripard/clk-Export-clk_hw_forward_rate_request/20230505-193724
base
On Thu, Apr 27, 2023 at 4:34 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Always enable HS video mode setting the TXMD bit, without this change no
> video output is present with DSI sinks that are setting
> MIPI_DSI_MODE_LPM flag (tested with LT8912B DSI-HDMI bridge).
>
> Previousl
On Thu, Apr 27, 2023 at 4:35 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> According to Toshiba documentation the PLL input clock after the divider
> should be not less than 4MHz, fix the PLL parameters computation
> accordingly.
>
> Fixes: ff1ca6397b1d ("drm/bridge: Add tc358768 dr
On Thu, Apr 27, 2023 at 4:32 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Correctly compute the PLL target frequency, the current formula works
> correctly only when the input bus width is 24bit, actually to properly
> compute the PLL target frequency what is relevant is the bits-p
On Thu, Apr 27, 2023 at 4:35 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Correct computation of TCLK_ZEROCNT register.
>
> This register must be set to a value that ensure that
> (TCLK-PREPARECNT + TCLK-ZERO) > 300ns
>
> with the actual value of (TCLK-PREPARECNT + TCLK-ZERO) being
On Thu, Apr 27, 2023 at 4:35 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Correct computation of TCLK_TRAILCNT register.
>
> The driver does not implement non-continuous clock mode, so the actual
> value doesn't make a practical difference yet. However this change also
> ensures th
On Thu, Apr 27, 2023 at 4:33 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Correct computation of THS_ZEROCNT register.
>
> This register must be set to a value that ensure that
> THS_PREPARE + THS_ZERO > 145ns + 10*UI
>
> with the actual value of (THS_PREPARE + THS_ZERO) being
>
>
dm/dc_fpu.c
> >> index 1743ca0a3641..86f4c0e04654 100644
> >> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
> >> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/dc_fpu.c
> >> @@ -33,6 +33,8 @@
> >> #include
> >> #elif defined(CONFIG_ARM64)
On Thu, Apr 27, 2023 at 4:35 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Correct computation of TXTAGOCNT register.
>
> This register must be set to a value that ensure that the
> TTA-GO period = (4 x TLPX)
>
> with the actual value of TTA-GO being
>
> 4 x (TXTAGOCNT + 1) x (HSByt
On Thu, Apr 27, 2023 at 4:34 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Correct computation of THS_TRAILCNT register.
>
> This register must be set to a value that ensure that
> THS_TRAIL > 60 ns + 4 x UI
> and
> THS_TRAIL > 8 x UI
> and
> THS_TRAIL < TEOT
> with
> TEOT = 105
Hi Linus,
On Fri, May 05, 2023 at 01:16:55PM +0200, Linus Walleij wrote:
>
> Populate the devices on the Nokia 770 CBUS I2C using software
> nodes instead of platform data quirks. This includes the LCD
> and the ADS7846 touchscreen so the conversion just brings the LCD
> along with it as software
On Thu, May 04, 2023 at 01:45:24PM -0700, John Harrison wrote:
On 5/4/2023 13:29, Lucas De Marchi wrote:
On Thu, May 04, 2023 at 01:22:52PM -0700, john.c.harri...@intel.com
wrote:
From: John Harrison
Also switch to using reduced version file naming as it is no longer
such a work-in-progress a
On Thu, Apr 27, 2023 at 4:34 PM Francesco Dolcini wrote:
>
> From: Francesco Dolcini
>
> Remove the unused phy_delay_nsk variable, before it was wrongly used
> to compute some register value, the fixed computation is no longer using
> it and therefore can be removed.
>
> Signed-off-by: Francesco
From: Robert Foss
On Thu, 27 Apr 2023 16:29:25 +0200, Francesco Dolcini wrote:
> From: Francesco Dolcini
>
> This series includes multiple fixes on the tc358768 parallel RGB to DSI
> driver.
>
> With the following changes I am able to have a stable display output using a
> TI
> SN65DSI83 (DS
On Fri, May 5, 2023 at 2:39 PM WANG Xuerui wrote:
>
> On 5/6/23 02:00, Alex Deucher wrote:
> > On Fri, May 5, 2023 at 1:57 PM WANG Xuerui wrote:
> >>
> >> On a side note, I had to modprobe amdgpu with runpm=0, otherwise my
> >> dmesg gets flooded with PSP getting resumed every 8~10 seconds or so
On Mon, Jan 09, 2023 at 05:18:16PM -0800, Brian Norris wrote:
> The self-refresh helper framework overloads "disable" to sometimes mean
> "go into self-refresh mode," and this mode activates automatically
> (e.g., after some period of unchanging display output). In such cases,
> the display pipe is
Applied. Thanks!
Alex
On Fri, May 5, 2023 at 3:43 AM Jiapeng Chong
wrote:
>
> No functional modification involved.
>
> ./drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c:146:2-3: Unneeded semicolon.
>
> Reported-by: Abaci Robot
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4871
> Signed-off-by:
On 5/4/2023 2:17 PM, Marijn Suijten wrote:
On 2023-05-04 22:33:17, Marijn Suijten wrote:
Title suggestion: use the wording "reduce pclk rate" :)
(Eventually "when DSC is enabled", instead of "for compression")
On 2023-05-02 18:19:12, Jessica Zhang wrote:
Divide the pclk rate by the compres
On Fri, 5 May 2023 at 20:24, Jeykumar Sankaran
wrote:
>
>
>
> On 5/2/2023 8:05 AM, Dmitry Baryshkov wrote:
> > Reorder SSPP register definitions to sort them in the ascending order.
> > Move register bitfields after the register definitions.
> >
> > Signed-off-by: Dmitry Baryshkov
> > ---
> > d
The pull request you sent on Fri, 5 May 2023 13:10:28 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-next-2023-05-05
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/084f51d473cd566eab310d5da56fe7b68d0b10be
Thank you!
--
Deet-doot-dot, I am a bot.
https://kor
On Fri, May 05, 2023 at 03:53:54PM +0100, Robin Murphy wrote:
> > > diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
> > > index 5c5cb5bee8b6..1d99c2d984fb 100644
> > > --- a/drivers/iommu/Kconfig
> > > +++ b/drivers/iommu/Kconfig
> > > @@ -137,7 +137,7 @@ config OF_IOMMU
> > > # IOMMU-
Hello,
On Wed, May 03, 2023 at 10:34:56AM +0200, Maarten Lankhorst wrote:
> RFC as I'm looking for comments.
>
> For long running compute, it can be beneficial to partition the GPU memory
> between cgroups, so each cgroup can use its maximum amount of memory without
> interfering with other sched
On Fri, May 05, 2023 at 05:57:37PM +0200, Sebastian Wick wrote:
> On Fri, May 5, 2023 at 5:28 PM Daniel Vetter wrote:
> >
> > On Thu, May 04, 2023 at 03:22:59PM +, Simon Ser wrote:
> > > Hi all,
> > >
> > > The goal of this RFC is to expose a generic KMS uAPI to configure the
> > > color
> >
On Fri, May 05, 2023 at 04:06:26PM +, Simon Ser wrote:
> On Friday, May 5th, 2023 at 17:28, Daniel Vetter wrote:
>
> > Ok no comments from me on the actual color operations and semantics of all
> > that, because I have simply nothing to bring to that except confusion :-)
> >
> > Some higher
On Thu, May 04, 2023 at 06:27:53PM +0200, Andrzej Hajda wrote:
> Hi maintainers of net and i915,
>
> On 25.04.2023 00:05, Andrzej Hajda wrote:
> > This is revived patchset improving ref_tracker library and converting
> > i915 internal tracker to ref_tracker.
> > The old thread ended without consen
On Sat, Apr 29, 2023 at 12:45:31PM +0200, Artur Weber wrote:
> Notable changes:
> - ROM child nodes use dashes instead of underscores; the driver
> reads all child nodes regardless of their names, so this doesn't
> break ABI.
> - pwm-period argument is deprecated, as it effectively duplicates
>
Signed-off-by: Sui Jingfeng
---
drivers/gpu/drm/drm_fb_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 6bb1b8b27d7a..3f34bcd8145c 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm
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