On Mon, 6 Feb 2023 at 18:01, Zeno Davatz wrote:
>
> Dear Dave
>
> On Mon, Feb 6, 2023 at 8:54 AM Dave Airlie wrote:
> >
> > On Mon, 6 Feb 2023 at 17:52, Zeno Davatz wrote:
> > >
> > > Dear Dave
> > >
> > > Thank you for your patch.
> > >
> > > On Sun, Feb 5, 2023 at 10:07 PM Dave Airlie wrote:
On 03.02.23 13:29, Rasmus Villemoes wrote:
> On 01/02/2023 23.00, Marek Vasut wrote:
>> On 1/30/23 13:45, Rasmus Villemoes wrote:
>>> On 27/01/2023 12.30, Marek Vasut wrote:
On 1/27/23 12:04, Jagan Teki wrote:
>>>
>> Thanks, but that's exactly what I'm doing, and I don't see any
>> mod
Patchset applied to drm-misc-next and cherry-picked to drm-misc-next-fixes.
Thanks.
On 02.02.2023 10:21, Stanislaw Gruszka wrote:
> Few fixes intended for 6.3.
>
> Andrzej Kacprowski (2):
> accel/ivpu: Fix FW API data alignment issues
> accel/ivpu: Send VPU_JSM_MSG_CONTEXT_DELETE when deletin
On Sat, Feb 4, 2023 at 9:30 PM Pin-yen Lin wrote:
>
>
> This series introduces bindings for anx7625/it6505 to register Type-C
> mode-switch in their output endpoints, and use data-lanes property to
> describe the pin connections.
>
> This series is not directly related to the built-in mux in anx76
On Mon, Feb 6, 2023 at 6:38 PM Zeno Davatz wrote:
>
> Dear Dave
>
> On Mon, Feb 6, 2023 at 9:10 AM Dave Airlie wrote:
> >
> > On Mon, 6 Feb 2023 at 18:01, Zeno Davatz wrote:
> > >
> > > Dear Dave
> > >
> > > On Mon, Feb 6, 2023 at 8:54 AM Dave Airlie wrote:
> > > >
> > > > On Mon, 6 Feb 2023 at
On Sat, Feb 4, 2023 at 9:31 PM Pin-yen Lin wrote:
>
> Analogix 7625 can be used in systems to switch the DP traffic between
> two downstreams, which can be USB Type-C DisplayPort alternate mode
> lane or regular DisplayPort output ports.
>
> Update the binding to accommodate this usage by introduc
Hi Dave,
thanks a lot. I was able to reproduce the problem and get it fixed by
the patch. As expected, there's still the warning about 'unknown
NV_ARCH', but the firmware display remains active. Applies cleanly to
drm-tip BTW.
Am 05.02.23 um 22:07 schrieb Dave Airlie:
From: Dave Airlie
T
On Feb 03 2023 13:09, Elliot Berman wrote:
> Move include/linux/qcom_scm.h to include/linux/firmware/qcom/qcom_scm.h.
> This removes 1 of a few remaining Qualcomm-specific headers into a more
> approciate subdirectory under include/.
>
> Suggested-by: Bjorn Andersson
> Signed-off-by: Elliot Berma
Move include/linux/qcom_scm.h to include/linux/firmware/qcom/qcom_scm.h.
This removes 1 of a few remaining Qualcomm-specific headers into a more
approciate subdirectory under include/.
Suggested-by: Bjorn Andersson
Signed-off-by: Elliot Berman
---
arch/arm/mach-qcom/platsmp.c
On Thu, Feb 02, 2023 at 05:24:34AM +0300, Dmitry Osipenko wrote:
> On 2/2/23 05:17, Dmitry Osipenko wrote:
> > On 2/1/23 18:48, Rob Clark wrote:
> >> On Wed, Feb 1, 2023 at 5:28 AM Dmitry Osipenko
> >> wrote:
> >>>
> >>> On 1/27/23 01:58, Ryan Neph wrote:
> An interrupted dma_fence_wait() bec
Hi,
This is another Lenovo with detachable keyboard and 1200x1920 screen
mounted sideways.
The following has been tested with 6.2.0-rc6.
Thanks,
Darrell
index 3659f04..590bb7b 100644
--- a/kernel/drm_panel_orientation
_quirks.c
+++ b/kernel/linux-6.2-rc6/drivers/gpu/drm/drm_panel_orientation_qu
Dear Dave
On Mon, Feb 6, 2023 at 8:54 AM Dave Airlie wrote:
>
> On Mon, 6 Feb 2023 at 17:52, Zeno Davatz wrote:
> >
> > Dear Dave
> >
> > Thank you for your patch.
> >
> > On Sun, Feb 5, 2023 at 10:07 PM Dave Airlie wrote:
> > >
> > > From: Dave Airlie
> > >
> > > This driver removed the conso
Dear Dave
On Mon, Feb 6, 2023 at 9:10 AM Dave Airlie wrote:
>
> On Mon, 6 Feb 2023 at 18:01, Zeno Davatz wrote:
> >
> > Dear Dave
> >
> > On Mon, Feb 6, 2023 at 8:54 AM Dave Airlie wrote:
> > >
> > > On Mon, 6 Feb 2023 at 17:52, Zeno Davatz wrote:
> > > >
> > > > Dear Dave
> > > >
> > > > Than
Dear Dave
Thank you for your patch.
On Sun, Feb 5, 2023 at 10:07 PM Dave Airlie wrote:
>
> From: Dave Airlie
>
> This driver removed the console, but hasn't yet decided if it could
> take over the console yet. Instead of doing that, probe the hw for
> support and then remove the console afterwa
Dear Dave
On Mon, Feb 6, 2023 at 9:40 AM David Airlie wrote:
>
> On Mon, Feb 6, 2023 at 6:38 PM Zeno Davatz wrote:
> >
> > Dear Dave
> >
> > On Mon, Feb 6, 2023 at 9:10 AM Dave Airlie wrote:
> > >
> > > On Mon, 6 Feb 2023 at 18:01, Zeno Davatz wrote:
> > > >
> > > > Dear Dave
> > > >
> > > > O
An interrupted dma_fence_wait() becomes an -ERESTARTSYS returned
to userspace ioctl(DRM_IOCTL_VIRTGPU_EXECBUFFER) calls, prompting to
retry the ioctl(), but the passed exbuf->fence_fd has been reset to -1,
making the retry attempt fail at sync_file_get_fence().
The uapi for DRM_IOCTL_VIRTGPU_EXECB
On 03/02/2023 18:15, Rob Clark wrote:
On Fri, Feb 3, 2023 at 8:49 AM Rob Clark wrote:
From: Rob Clark
Because eb_composite_fence_create() drops the fence_array reference
after creation of the sync_file, only the sync_file holds a ref to the
fence. But fd_install() makes that reference vis
On 03/02/2023 17:58, Alyssa Rosenzweig wrote:
+struct drm_pancsf_gpu_info {
+#define DRM_PANCSF_ARCH_MAJOR(x) ((x) >> 28)
+#define DRM_PANCSF_ARCH_MINOR(x) (((x) >> 24) & 0xf)
+#define DRM_PANCSF_ARCH_REV(x)(((x) >> 20) & 0xf)
+#define
Hi,
Adding Matt & Thomas as potential candidates to review.
Regards,
Tvrtko
On 03/02/2023 19:30, Deepak R Varma wrote:
The macro definition of gen6_for_all_pdes() expands to a for loop such
that it breaks when the page table is null. Hence there is no need to
again test validity of the page
On Sat, Feb 04, 2023 at 06:09:45AM +, Joshua Ashton wrote:
>
>
> On 2/3/23 19:34, Ville Syrjälä wrote:
> > On Fri, Feb 03, 2023 at 09:25:38PM +0200, Ville Syrjälä wrote:
> >> On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
> >>> On Fri, Feb 03, 2023 at 01:28:20PM -0500, Harry W
Am 02.02.23 um 19:31 schrieb Danilo Krummrich:
On 2/2/23 12:53, Christian König wrote:
Am 01.02.23 um 09:10 schrieb Dave Airlie:
[SNIP]
For drivers that don't intend to merge at all and (somehow) are
capable of dealing with sparse regions without knowing the sparse
region's boundaries, it'd be
On 03/02/2023 13:52, Aravind Iddamsetty wrote:
Obj flags for shmem objects is not being set correctly. Fixes in setting
BO_ALLOC_USER flag which applies to shmem objs as well.
Fixes: 13d29c823738 ("drm/i915/ehl: unconditionally flush the pages on acquire")
Cc: # v5.15+
These tags should ha
On Mon, Jan 09, 2023 at 11:31:10PM +0100, Martin Blumenstingl wrote:
> When support for the HDMI vendor infoframe was introduced back with
> commit 7d27becb3532 ("video/hdmi: Introduce helpers for the HDMI vendor
> specific infoframe") it's payload size was either 5 or 6 bytes,
> depending on:
>
Am 03.02.23 um 19:10 schrieb Rob Clark:
From: Rob Clark
If userspace calls the AMDGPU_CS ioctl from multiple threads, because
the vm is global to the drm_file, you can end up with multiple threads
racing in amdgpu_vm_clear_freed(). So the freed list should be
protected with the status_lock, si
; [3].
DT changes tying the DP controller to the USB-C port on the HDK
boards will be sent later.
Bindings dependencies at [1]
[1]
https://lore.kernel.org/all/20230206-topic-sm8350-upstream-usb-dp-combo-phy-v1-1-ed849ae6b...@linaro.org/
[2]
https://lore.kernel.org/all/20230201041853.1934355-1-quic_b
The SM8450 & SM350 shares the same DT TX IP version, use the
SM8350 compatible as fallback for SM8450.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/disp
Add the Display Port controller subnode to the MDSS node.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 80 +++-
1 file changed, 78 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/q
The first QMP PHY is an USB3/DP combo phy, switch to the newly
documented bindings and register the clocks to the GCC
and DISPCC controllers.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 37 +---
1 file changed, 13 insertions(+), 24 del
The QMP PHY is a USB3/DP combo phy, switch to the newly
documented bindings and register the clocks to the GCC
and DISPCC controllers.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 38 +---
1 file changed, 14 insertions(+), 24 deletions(
Add the Display Port controller subnode to the MDSS node.
Signed-off-by: Neil Armstrong
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 4 +-
arch/arm64/boot/dts/qcom/sm8450.dtsi| 82 +++--
2 files changed, 82 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/
On Sat, Feb 4, 2023 at 9:31 PM Pin-yen Lin wrote:
>
> ITE IT6505 can be used in systems to switch the DP traffic between
> two downstreams, which can be USB Type-C DisplayPort alternate mode
> lane or regular DisplayPort output ports.
>
> Update the binding to accommodate this usage by introducing
On 06/02/2023 09:45, Tvrtko Ursulin wrote:
Hi,
Adding Matt & Thomas as potential candidates to review.
Regards,
Tvrtko
On 03/02/2023 19:30, Deepak R Varma wrote:
The macro definition of gen6_for_all_pdes() expands to a for loop such
that it breaks when the page table is null. Hence there is
On 06/02/2023 11:17, Neil Armstrong wrote:
> The SM8450 & SM350 shares the same DT TX IP version, use the
> SM8350 compatible as fallback for SM8450.
>
> Signed-off-by: Neil Armstrong
> ---
> Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 4
> 1 file changed, 4 insertion
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
> Add another power saving state used on SM8350.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> include/dt-bindings/power/qcom-rpmpd.h | 1 +
Wrong patch?
Konrad
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/power/qcom-rpmpd.h
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
> Add another power saving state used on SM8350.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> include/dt-bindings/power/qcom-rpmpd.h | 1 +
Wrong patch once more?
Konrad
> 1 file changed, 1 insertion(+)
>
> diff --git a/include/dt-bindings/power/qc
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
> Add device nodes required to enable GPU on the SM8350 platform.
>
> Signed-off-by: Dmitry Baryshkov
> ---
> arch/arm64/boot/dts/qcom/sm8350.dtsi | 179 +++
> 1 file changed, 179 insertions(+)
>
> diff --git a/arch/arm64/bo
On 05/02/2023 16:31, Aradhya Bhatia wrote:
On 03-Feb-23 21:03, Tomi Valkeinen wrote:
On 25/01/2023 13:35, Aradhya Bhatia wrote:
Add support for the DSS controller on TI's new AM625 SoC in the tidss
driver.
The first video port (VP0) in am625-dss can output OLDI signals through
2 OLDI TXes. A
On 6.02.2023 11:17, Neil Armstrong wrote:
> Add the Display Port controller subnode to the MDSS node.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 4 +-
> arch/arm64/boot/dts/qcom/sm8450.dtsi| 82
> +++--
> 2 files chang
subject: s/dst/dts here and in 5/5
On 6.02.2023 11:17, Neil Armstrong wrote:
> The QMP PHY is a USB3/DP combo phy, switch to the newly
> documented bindings and register the clocks to the GCC
> and DISPCC controllers.
>
> Signed-off-by: Neil Armstrong
> ---
> arch/arm64/boot/dts/qcom/sm8450.dts
On 06/02/2023 12:33, Krzysztof Kozlowski wrote:
On 06/02/2023 11:17, Neil Armstrong wrote:
The SM8450 & SM350 shares the same DT TX IP version, use the
SM8350 compatible as fallback for SM8450.
Signed-off-by: Neil Armstrong
---
Documentation/devicetree/bindings/display/msm/dp-controller.yaml
On 06/02/2023 12:44, Konrad Dybcio wrote:
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
Add another power saving state used on SM8350.
Signed-off-by: Dmitry Baryshkov
---
include/dt-bindings/power/qcom-rpmpd.h | 1 +
Wrong patch once more?
This patch is wrong and was sent by mistake
Kon
On 06/02/2023 12:44, Konrad Dybcio wrote:
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
Add another power saving state used on SM8350.
Signed-off-by: Dmitry Baryshkov
---
include/dt-bindings/power/qcom-rpmpd.h | 1 +
Wrong patch?
And this patch is correct. sm8350 GPU OPP table uses this va
On 6.02.2023 12:22, Dmitry Baryshkov wrote:
> On 06/02/2023 12:44, Konrad Dybcio wrote:
>>
>>
>> On 6.02.2023 01:27, Dmitry Baryshkov wrote:
>>> Add another power saving state used on SM8350.
>>>
>>> Signed-off-by: Dmitry Baryshkov
>>> ---
>>> include/dt-bindings/power/qcom-rpmpd.h | 1 +
>> W
On Tue, Jan 31, 2023 at 02:57:06PM -0800, Dmitry Torokhov wrote:
> Switch the driver from legacy gpio API that is deprecated to the newer
> gpiod API that respects line polarities described in ACPI/DT.
>
> This makes driver use standard property name for the reset gpio
> ("reset-gpios" vs "gpios-re
On 06-02-2023 15:21, Tvrtko Ursulin wrote:
>
>
> On 03/02/2023 13:52, Aravind Iddamsetty wrote:
>> Obj flags for shmem objects is not being set correctly. Fixes in setting
>> BO_ALLOC_USER flag which applies to shmem objs as well.
>>
>> Fixes: 13d29c823738 ("drm/i915/ehl: unconditionally flush
On Tue, Jan 31, 2023 at 02:57:07PM -0800, Dmitry Torokhov wrote:
> There is no need for this driver to be OF-specific, so switch it to
> use device_get_match_data() and stop including various of-related
> headers.
>
> Signed-off-by: Dmitry Torokhov
Reviewed-by: Daniel Thompson
Daniel.
Atm, drm_dp_remove_payload() uses the same payload state to both get the
vc_start_slot required for the payload removal DPCD message and to
deduct time_slots from vc_start_slot of all payloads after the one being
removed.
The above isn't always correct, as vc_start_slot must be the up-to-date
vers
Add a function to get the old MST topology state, required by a
follow-up i915 patch.
While at it clarify the code comment of
drm_atomic_get_new_mst_topology_state() and add _new prefix
to the new state pointer to remind about its difference from the old
state.
v2: Use old_/new_ prefixes for the
On Sat, Feb 04, 2023 at 09:30:34PM +0800, Pin-yen Lin wrote:
> Add helpers to register and unregister Type-C "switches" for bridges
> capable of switching their output between two downstream devices.
>
> The helper registers USB Type-C mode switches when the "mode-switch"
> and the "reg" propertie
On Sat, Feb 04, 2023 at 09:30:36PM +0800, Pin-yen Lin wrote:
> The output port endpoints can be connected to USB-C connectors.
> Running drm_of_find_panel_or_bridge() with such endpoints leads to
> a continuous return value of -EPROBE_DEFER, even though there is
> no panel present.
>
> To avoid th
On Mon, 06 Feb 2023, Andy Shevchenko wrote:
> On Sat, Feb 04, 2023 at 09:30:34PM +0800, Pin-yen Lin wrote:
>> Add helpers to register and unregister Type-C "switches" for bridges
>> capable of switching their output between two downstream devices.
>>
>> The helper registers USB Type-C mode switch
On Sat, Feb 04, 2023 at 09:30:37PM +0800, Pin-yen Lin wrote:
> Register USB Type-C mode switches when the "mode-switch" property and
> relevant ports are available in Device Tree. Configure the crosspoint
> switch based on the entered alternate mode for a specific Type-C
> connector.
>
> Crosspoin
On Sat, Feb 04, 2023 at 09:30:40PM +0800, Pin-yen Lin wrote:
> Register USB Type-C mode switches when the "mode-switch" property and
> relevant port are available in Device Tree. Configure the "lane_swap"
> state based on the entered alternate mode for a specific Type-C
> connector, which ends up u
On 06/02/2023 12:03, Konrad Dybcio wrote:
subject: s/dst/dts here and in 5/5
On 6.02.2023 11:17, Neil Armstrong wrote:
The QMP PHY is a USB3/DP combo phy, switch to the newly
documented bindings and register the clocks to the GCC
and DISPCC controllers.
Signed-off-by: Neil Armstrong
---
arc
On 06/02/2023 12:20, Dmitry Baryshkov wrote:
On 06/02/2023 12:33, Krzysztof Kozlowski wrote:
On 06/02/2023 11:17, Neil Armstrong wrote:
The SM8450 & SM350 shares the same DT TX IP version, use the
SM8350 compatible as fallback for SM8450.
Signed-off-by: Neil Armstrong
---
Documentation/devi
On 06/02/2023 14:36, Neil Armstrong wrote:
On 06/02/2023 12:20, Dmitry Baryshkov wrote:
On 06/02/2023 12:33, Krzysztof Kozlowski wrote:
On 06/02/2023 11:17, Neil Armstrong wrote:
The SM8450 & SM350 shares the same DT TX IP version, use the
SM8350 compatible as fallback for SM8450.
Signed-off-
On 06/02/2023 13:23, Konrad Dybcio wrote:
On 6.02.2023 12:22, Dmitry Baryshkov wrote:
On 06/02/2023 12:44, Konrad Dybcio wrote:
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
Add another power saving state used on SM8350.
Signed-off-by: Dmitry Baryshkov
---
include/dt-bindings/power/qcom
On 05/02/2023 15:08, Aradhya Bhatia wrote:
Hi Tomi,
Thanks for the review!
On 03-Feb-23 16:53, Tomi Valkeinen wrote:
On 25/01/2023 13:35, Aradhya Bhatia wrote:
Make DSS Video Ports agnostic of output bus types.
DSS controllers have had a 1-to-1 coupling between its VPs and its
output ports.
Hi,
any feedback on this?
Best regards
Alexander
Am Dienstag, 17. Januar 2023, 12:08:01 CET schrieb Alexander Stein:
> From: Matthias Schiffer
>
> The PIXCLK needs to be enabled in SCFG before accessing certain DCU
> registers, or the access will hang.
>
> Signed-off-by: Matthias Schiffer
>
Am 03.02.23 um 18:37 schrieb Matthew Brost:
On Wed, Jan 18, 2023 at 07:12:45AM +0100, Danilo Krummrich wrote:
This adds the infrastructure for a manager implementation to keep track
of GPU virtual address (VA) mappings.
New UAPIs, motivated by Vulkan sparse memory bindings graphics drivers
star
On 05/02/2023 15:42, Aradhya Bhatia wrote:
Hi Tomi,
On 03-Feb-23 20:42, Tomi Valkeinen wrote:
On 25/01/2023 13:35, Aradhya Bhatia wrote:
The newer version of DSS (AM625-DSS) has 2 OLDI TXes at its disposal.
These can be configured to support the following modes:
1. OLDI_SINGLE_LINK_SINGLE_MOD
On 06/02/2023 12:51, Konrad Dybcio wrote:
On 6.02.2023 01:27, Dmitry Baryshkov wrote:
Add device nodes required to enable GPU on the SM8350 platform.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 179 +++
1 file changed, 179 insertions(
On Wed, Feb 01, 2023 at 09:23:56AM +0900, FUKAUMI Naoki wrote:
> hi,
>
> I'm trying this patch series with 6.1.x kernel. it works fine on rk356x
> based boards (ROCK 3), but it has a problem on rk3399 boards (ROCK 4).
>
> on rk3399 with this patch, I can see large noise area (about one third righ
On 2/6/23 10:48, Christian König wrote:
Am 02.02.23 um 19:31 schrieb Danilo Krummrich:
On 2/2/23 12:53, Christian König wrote:
Am 01.02.23 um 09:10 schrieb Dave Airlie:
[SNIP]
For drivers that don't intend to merge at all and (somehow) are
capable of dealing with sparse regions without knowin
On 2/6/23 14:35, Christian König wrote:
Am 03.02.23 um 18:37 schrieb Matthew Brost:
On Wed, Jan 18, 2023 at 07:12:45AM +0100, Danilo Krummrich wrote:
This adds the infrastructure for a manager implementation to keep track
of GPU virtual address (VA) mappings.
New UAPIs, motivated by Vulkan spa
Hello,
ping here, this one got forgotten.
It still applies on drm-misc-next and v6.2-rc7
On 18.08.22 14:45, Dominik Haller wrote:
> Add support for the EDT ETML1010G0DKA 10.1" 1280x800 LVDS panel.
>
> Signed-off-by: Dominik Haller
> ---
> drivers/gpu/drm/panel/panel-simple.c | 29
On Thu, Jan 19, 2023 at 7:24 AM Matthew Brost wrote:
>
> On Thu, Jan 19, 2023 at 05:04:32AM +0100, Danilo Krummrich wrote:
> > On 1/18/23 20:48, Christian König wrote:
> > > Am 18.01.23 um 20:17 schrieb Dave Airlie:
> > > > On Thu, 19 Jan 2023 at 02:54, Alex Deucher
> > > > wrote:
> > > > > On W
Add A660 device to the Qualcomm SM8350 platform and enable it for the
sm8350-hdk board. Unfortunately while adding the GPU & related devices I
noticed that DT nodes on SM8350 are greatly out of the preagreed order,
so patches 4-6 reorder DT nodes to follow the agreement.
Changes since v1:
- Fixed
The GPU clock controller bindings for the Qualcomm sm8350 platform are
not correct. The driver uses .fw_name instead of using indices to bind
parent clocks, thus demanding the clock-names usage. With the proper
clock-names in place, the bindings becomes equal to the bindings defined
by qcom,gpucc.y
Add define for another power saving state used on SM8350 for the GPU.
Signed-off-by: Dmitry Baryshkov
---
include/dt-bindings/power/qcom-rpmpd.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/power/qcom-rpmpd.h
b/include/dt-bindings/power/qcom-rpmpd.h
index 4a30d10e6b7d
Add Adreno A660 to the A635 clause to define all version-specific
properties. There is no need to add it to the top-level clause, since
top-level compatible uses pattern to define compatible strings.
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/gmu.yaml | 1 +
Start ordering DT nodes according to agreed order. Move apps SMMU, GIC,
timer, apps RSC, cpufreq ADSP and cDSP nodes to the end to the proper
position at the end of /soc/.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 1228 +-
1 file changed,
Enable the GPU on the SM8350-HDK device. The ZAP shader is required for
the GPU to function properly.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8350-hdk.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
b/arch/arm64/boot
Continue ordering DT nodes. Move RNG, UFS, system NoC and SLPI nodes
to the proper position.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 314 +--
1 file changed, 157 insertions(+), 157 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sm83
Finish reordering DT nodes. Move PDC, tsens, AOSS, SRAM, SPMI and TLMM
nodes to the proper position.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 764 +--
1 file changed, 382 insertions(+), 382 deletions(-)
diff --git a/arch/arm64/boot/dts/q
Add device nodes required to enable GPU on the SM8350 platform.
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8350.dtsi | 178 +++
1 file changed, 178 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi
b/arch/arm64/boot/dts/qcom/sm8350.dtsi
An AIC100 device contains a MHI interface with a number of different
channels for controlling different aspects of the device. The MHI
controller works with the MHI bus to enable and drive that interface.
AIC100 uses the BHI protocol in PBL to load SBL. The MHI controller
expects the sbl to be l
The Qualcomm Cloud AI 100 (AIC100) device is an Artificial Intelligence
accelerator PCIe card. It contains a number of components both in the
SoC and on the card which facilitate running workloads:
QSM: management processor
NSPs: workload compute units
DMA Bridge: dedicated data mover for the wor
Add the QAIC driver uapi file and core driver file that binds to the PCIe
device. The core driver file also creates the accel device and manages
all the interconnections between the different parts of the driver.
The driver can be built as a module. If so, it will be called "qaic.ko".
Signed-of
Now that we have all the components of a minimum QAIC which can boot and
run an AIC100 device, add the infrastructure that allows the QAIC driver
to be built.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
---
drivers/accel/Kconfig | 1 +
drivers/accel/Makefile | 1 +
driv
From: Jeffrey Hugo
This series introduces a driver under the accel subsystem (QAIC -
Qualcomm AIC) for the Qualcomm Cloud AI 100 product (AIC100). AIC100 is
a PCIe adapter card that hosts a dedicated machine learning inference
accelerator.
Regarding the open userspace (see the documentation pat
Add the datapath component that manages BOs and submits them to running
workloads on the qaic device via the dma_bridge hardware. This allows
QAIC clients to interact with their workloads (run inferences) via the
following ioctls along with mmap():
DRM_IOCTL_QAIC_CREATE_BO
DRM_IOCTL_QAIC_MMAP_BO
Add MAINTAINERS entry for the Qualcomm Cloud AI 100 driver.
Signed-off-by: Jeffrey Hugo
Reviewed-by: Carl Vanderlip
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 263d37a..0a264f1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -17170,6
From: Pranjal Ramajor Asha Kanojiya
Some of the MHI channels for an AIC100 device need to be routed to
userspace so that userspace can communicate directly with QSM. The MHI
bus does not support this, and while the WWAN subsystem does (for the same
reasons), AIC100 is not a WWAN device. Also, M
Add the control path component that talks to the management processor (QSM)
to load workloads onto the AIC100 device. This implements the KMD portion
of the NNC protocol over the QAIC_CONTROL MHI channel and the
DRM_IOCTL_QAIC_MANAGE IOCTL to userspace. With this functionality, QAIC
clients are a
On Sun, Feb 5, 2023 at 8:12 AM Heiko Stübner wrote:
>
> Hi,
>
> Am Freitag, 3. Februar 2023, 20:02:54 CET schrieb Johan Jonker:
> >
> > On 2/3/23 19:21, Rob Herring wrote:
> > > On Thu, Dec 22, 2022 at 03:22:14PM +0100, Johan Jonker wrote:
> > >> Convert rockchip-lvds.txt to YAML.
> > >>
> > >> Ch
On Mon, Feb 06, 2023 at 03:04:48PM +0100, Sascha Hauer wrote:
> On Wed, Feb 01, 2023 at 09:23:56AM +0900, FUKAUMI Naoki wrote:
> > hi,
> >
> > I'm trying this patch series with 6.1.x kernel. it works fine on rk356x
> > based boards (ROCK 3), but it has a problem on rk3399 boards (ROCK 4).
> >
> >
On Mon, Feb 6, 2023 at 2:15 AM Christian König wrote:
>
> Am 03.02.23 um 19:10 schrieb Rob Clark:
> > From: Rob Clark
> >
> > If userspace calls the AMDGPU_CS ioctl from multiple threads, because
> > the vm is global to the drm_file, you can end up with multiple threads
> > racing in amdgpu_vm_cl
On Mon, Feb 06, 2023 at 06:59:40AM +1000, Dave Airlie wrote:
> On Sat, 4 Feb 2023 at 09:09, Bjorn Helgaas wrote:
> > From: Bjorn Helgaas
> >
> > This reverts commit 145eed48de278007f646b908fd70ac59d24ed81a.
> >
> > Zeno Davatz reported that 145eed48de27 ("fbdev: Remove conflicting devices
> > on
Am 06.02.23 um 16:52 schrieb Rob Clark:
On Mon, Feb 6, 2023 at 2:15 AM Christian König wrote:
Am 03.02.23 um 19:10 schrieb Rob Clark:
From: Rob Clark
If userspace calls the AMDGPU_CS ioctl from multiple threads, because
the vm is global to the drm_file, you can end up with multiple threads
r
Hi Sascha,
On Mon, 6 Feb 2023 at 15:49, Sascha Hauer wrote:
> On Mon, Feb 06, 2023 at 03:04:48PM +0100, Sascha Hauer wrote:
> > I guess a first step would be to limit the maximum resolution of vopl
> > to what the hardware can do. We would likely end up with 1080p by
> > default then for the appl
Concentrating this discussion on a very big misunderstanding first.
Am 06.02.23 um 14:27 schrieb Danilo Krummrich:
[SNIP]
My understanding is that userspace is fully responsible on the parts
of the GPU VA space it owns. This means that userspace needs to take
care to *not* ask the kernel to mo
On Fri, Feb 03, 2023 at 05:02:13PM +0700, Bagas Sanjaya wrote:
> Stephen Rothwell reported htmldocs warnings:
>
> Documentation/gpu/i915:64: drivers/gpu/drm/i915/gt/intel_workarounds.c:32:
> WARNING: Inline emphasis start-string without end-string.
> Documentation/gpu/i915:64: drivers/gpu/drm/i91
Register 0x9424 is not replicated on any platform, so it shouldn't be
declared with REG_MCR(). Declaring it with _MMIO() is basically
duplicate of the GEN7 version, so just remove the GEN8 and change all
the callers to use the right functions.
Old versions of the gen8 bspec page used to contain a
INF_UNIT_LEVEL_CLKGATE is not replicated, but since it's not actually
used it can just be removed.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
b/drivers/gpu/drm/i915/gt/i
Hi Tomi,
On 06-Feb-23 16:28, Tomi Valkeinen wrote:
> On 05/02/2023 16:31, Aradhya Bhatia wrote:
>>
>>
>> On 03-Feb-23 21:03, Tomi Valkeinen wrote:
>>> On 25/01/2023 13:35, Aradhya Bhatia wrote:
Add support for the DSS controller on TI's new AM625 SoC in the tidss
driver.
The fi
On Mon, 06 Feb 2023 02:27:27 +0200, Dmitry Baryshkov wrote:
> The GPU clock controller bindings for the Qualcomm sm8350 platform are
> not correct. The driver uses .fw_name instead of using indices to bind
> parent clocks, thus demanding the clock-names usage. With the proper
> clock-names in pla
On Mon, 06 Feb 2023 02:27:30 +0200, Dmitry Baryshkov wrote:
> Add Adreno A660 to the A635 clause to define all version-specific
> properties. There is no need to add it to the top-level clause, since
> top-level compatible uses pattern to define compatible strings.
>
> Signed-off-by: Dmitry Bary
On Mon, Feb 06, 2023 at 08:54:10AM -0800, Lucas De Marchi wrote:
> INF_UNIT_LEVEL_CLKGATE is not replicated, but since it's not actually
> used it can just be removed.
>
> Signed-off-by: Lucas De Marchi
Reviewed-by: Matt Roper
Looks like the only reference to the register was removed in
On 2/6/23 04:47, Ville Syrjälä wrote:
> On Sat, Feb 04, 2023 at 06:09:45AM +, Joshua Ashton wrote:
>>
>>
>> On 2/3/23 19:34, Ville Syrjälä wrote:
>>> On Fri, Feb 03, 2023 at 09:25:38PM +0200, Ville Syrjälä wrote:
On Fri, Feb 03, 2023 at 08:56:55PM +0200, Ville Syrjälä wrote:
> On Fr
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