Hi,
On Mon, Jan 9, 2023 at 6:50 PM Jiasheng Jiang wrote:
>
> @@ -1954,9 +1949,8 @@ int msm_dsi_host_init(struct msm_dsi *msm_dsi)
>
> msm_host->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
> if (msm_host->irq < 0) {
> - ret = msm_host->irq;
> dev
This patch series proposes to replace a combination of
DEFINE_SIMPLE_ATTRIBUTE() +
debugfs_create_file() by a combination of DEFINE_DEBUGFS_ATTRIBUTE() +
debugfs_create_file_unsafe(). The change reduced overhead in terms of managing
the full proxy f_ops at runtime. The patches 1 & 2 covers for the
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
From: Ma Jun
commit 4e699e34f923188175986ad8a74ab99f7034075e upstream.
Add the missing declaration of struct drm_atomic_state to fix the
compile error below:
error: 'struct drm_atomic_state' declared inside parameter
list will not be visible outside of this definition or declaration [-Werror]
On Mon, 09 Jan 2023, Martin Blumenstingl
wrote:
> When support for the HDMI vendor infoframe was introduced back with
> commit 7d27becb3532 ("video/hdmi: Introduce helpers for the HDMI vendor
> specific infoframe") it's payload size was either 5 or 6 bytes,
> depending on:
> if (frame->s3d_stru
Am Dienstag, dem 20.12.2022 um 10:44 +0100 schrieb Philipp Zabel:
> Use the already existing local variable height = drm_rect_height() >> 16
> to replace other occurrences of the same value.
>
> Suggested-by: Lucas Stach
> Signed-off-by: Philipp Zabel
Reviewed-by: Lucas Stach
> ---
> drivers
From: Rob Clark
Rob Clark (3):
drm/msm/gpu: Add devfreq tuning debugfs
drm/msm/gpu: Bypass PM QoS constraint for idle clamp
drm/msm/gpu: Add default devfreq thresholds
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_debugfs.c | 12 +++
drivers/gpu/drm/msm/msm_
From: Rob Clark
Make the handful of tuning knobs available visible via debugfs.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_debugfs.c | 12
drivers/gpu/drm/msm/msm_drv.h | 9 +
drivers/gpu/drm/msm/msm_gpu
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index e578d74d402f..1f31e72ca0cf 100644
--- a/drivers/gpu/drm/msm/msm_gp
From: Rob Clark
Change idle freq clamping back to the direct method, bypassing PM QoS
requests. The problem with using PM QoS requests is they call
(indirectly) the governors ->get_target_freq() which goes thru a
get_dev_status() cycle. The problem comes when the GPU becomes active
again and we
This patch series proposes to replace a combination of
DEFINE_SIMPLE_ATTRIBUTE() +
debugfs_create_file() by a combination of DEFINE_DEBUGFS_ATTRIBUTE() +
debugfs_create_file_unsafe(). The change reduced overhead in terms of managing
the full proxy f_ops at runtime. The patches 1 & 2 covers for the
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
On Tue, 10 Jan 2023 07:54:31 +0200, Dmitry Baryshkov wrote:
> Extend the secon DSI interface with the SoC-specific compat entry,
> following the change for the first DSI interface.
>
>
Applied, thanks!
[2/3] arm64: dts: qcom: sm8150: Add compat qcom,sm8150-dsi-ctrl
commit: b0b8b34a8d6b4c5
On Wed, Jan 11, 2023 at 12:00:12AM +0530, Deepak R Varma wrote:
> Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
> function adds the overhead of introducing a proxy file operation
> functions to wrap the original read/write inside file removal protection
> functions. This adds s
On Tue, Jan 10, 2023 at 11:45:02PM +0530, Deepak R Varma wrote:
> Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
> function adds the overhead of introducing a proxy file operation
> functions to wrap the original read/write inside file removal protection
> functions. This adds s
On Tue, Jan 10, 2023 at 11:45:40PM +0530, Deepak R Varma wrote:
> Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
> function adds the overhead of introducing a proxy file operation
> functions to wrap the original read/write inside file removal protection
> functions. This adds s
On Tue, Jan 10, 2023 at 04:50:55PM +, Tvrtko Ursulin wrote:
>
> On 10/01/2023 15:55, Matthew Brost wrote:
> > On Tue, Jan 10, 2023 at 12:19:35PM +, Tvrtko Ursulin wrote:
> > >
> > > On 10/01/2023 11:28, Tvrtko Ursulin wrote:
> > > >
> > > >
> > > > On 09/01/2023 17:27, Jason Ekstrand wr
On Tue, Jan 10, 2023 at 12:58 AM Michal Hocko wrote:
>
> On Mon 09-01-23 21:38:04, T.J. Mercier wrote:
> > When a buffer is exported to userspace, use memcg to attribute the
> > buffer to the allocating cgroup until all buffer references are
> > released.
> >
> > Unlike the dmabuf sysfs stats impl
On Tue, 10 Jan 2023 20:45:54 +0530, Simon Ser wrote:
> I pushed the last 3 patches to drm-misc-next.
Thank you!
On Tue, Jan 10, 2023 at 10:44:53AM -0600, Gustavo A. R. Silva wrote:
> Zero-length arrays are deprecated[1] and we are moving towards
> adopting C99 flexible-array members, instead. So, replace zero-length
> arrays in a couple of structures (three, actually) with flex-array
> members.
>
> This h
Quoting Sam Ravnborg (2023-01-07 12:28:41)
> On Thu, Jan 05, 2023 at 07:01:08PM -0800, Stephen Boyd wrote:
> > The unprepare sequence has started to fail after moving to panel bridge
> > code in the msm drm driver (commit 007ac0262b0d ("drm/msm/dsi: switch to
> > DRM_PANEL_BRIDGE")). You'll see mes
On Mon, Jan 9, 2023 at 2:23 PM Jacek Lawrynowicz
wrote:
>
> Hi,
>
> This patchset contains a new Linux* Kernel Driver for Intel® VPUs.
>
> VPU stands for Versatile Processing Unit and it is an AI inference accelerator
> integrated with Intel non-server CPUs starting from 14th generation.
> VPU ena
On Tue, Jan 10, 2023 at 02:28:11PM -0500, Rodrigo Vivi wrote:
>
> On Tue, Jan 10, 2023 at 10:44:53AM -0600, Gustavo A. R. Silva wrote:
> > Zero-length arrays are deprecated[1] and we are moving towards
> > adopting C99 flexible-array members, instead. So, replace zero-length
> > arrays in a couple
From: Chris Morgan
Add the Magnachip D53E6EA8966 panel IC controller for display panels
such as the Samsung AMS495QA01 panel as found on the Anbernic RG503.
This panel uses DSI to receive video signals, but 3-wire SPI to receive
command signals using DBI.
Changes since V7:
- Removed Linus Walle
From: Chris Morgan
Add helper function to find DSI host for devices where DSI panel is not
a minor of a DSI bus (such as the Samsung AMS495QA01 panel or the
official Raspberry Pi touchscreen display).
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
drivers/gpu/drm/drm_of.c | 70
From: Chris Morgan
Support Magnachip D53E6EA8966 based panels such as the Samsung
AMS495QA01 panel as found on the Anbernic RG503. Note this driver
supports only the AMS495QA01 today which receives video signals via DSI,
however it receives commands via 3-wire SPI using DBI.
Signed-off-by: Chris
From: Chris Morgan
Add Samsung AMS495QA01 panel to RG503.
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
.../dts/rockchip/rk3566-anbernic-rg503.dts| 55 +++
1 file changed, 55 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dt
From: Chris Morgan
Add documentation for Samsung AMS495QA01 panel (with Magnachip
D53E6EA8966 controller IC).
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
Reviewed-by: Rob Herring
---
.../display/panel/samsung,ams495qa01.yaml | 57 +++
1 file changed, 57 ins
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
Using DEFINE_SIMPLE_ATTRIBUTE macro with the debugfs_create_file()
function adds the overhead of introducing a proxy file operation
functions to wrap the original read/write inside file removal protection
functions. This adds significant overhead in terms of introducing and
managing the proxy facto
On Tue, Jan 03, 2023 at 12:42:43PM +0200, Juha-Pekka Heikkila wrote:
> Hi Drew,
Hi Juha-Pekka, sorry for the late response since I was on vacation.
>
> this is good find. I went looking where the problem is in and saw what you
> probably also saw earlier.
>
> I was wondering if diff below would
Add support for AR30 and BA30 pixel formats to the Mediatek DRM driver.
Tested using "modetest -P" on an MT8195.
Signed-off-by: Justin Green
---
v2:
* Rebase and resolve merge conflicts with the AFBC patch.
drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 28 +
drivers/gpu/drm/media
On Mon, Jan 9, 2023 at 6:07 PM Hillf Danton wrote:
>
> On 9 Jan 2023 21:38:06 + T.J. Mercier
> >
> > @@ -2275,6 +2276,26 @@ static int binder_translate_fd(u32 fd, binder_size_t
> > fd_offset,
> > goto err_security;
> > }
> >
> > + if (IS_ENABLED(CONFIG_MEMCG) && (flag
From: Rob Clark
If userspace was calling the MSM_SET_PARAM ioctl on multiple threads to
set the COMM or CMDLINE param, it could trigger a race causing the
previous value to be kfree'd multiple times. Fix this by serializing on
the gpu lock.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/adr
From: Rob Clark
Rob Clark (3):
drm/msm/gpu: Add devfreq tuning debugfs
drm/msm/gpu: Bypass PM QoS constraint for idle clamp
drm/msm/gpu: Add default devfreq thresholds
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
drivers/gpu/drm/msm/msm_de
From: Rob Clark
Make the handful of tuning knobs available visible via debugfs.
v2: select DEVFREQ_GOV_SIMPLE_ONDEMAND because for some reason
struct devfreq_simple_ondemand_data depends on this
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/Kconfig | 1 +
drivers/gpu/drm/msm
From: Rob Clark
Change idle freq clamping back to the direct method, bypassing PM QoS
requests. The problem with using PM QoS requests is they call
(indirectly) the governors ->get_target_freq() which goes thru a
get_dev_status() cycle. The problem comes when the GPU becomes active
again and we
From: Rob Clark
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_gpu_devfreq.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/gpu/drm/msm/msm_gpu_devfreq.c
b/drivers/gpu/drm/msm/msm_gpu_devfreq.c
index e578d74d402f..1f31e72ca0cf 100644
--- a/drivers/gpu/drm/msm/msm_gp
Add MTL PXP GSC-CS back-end stub functions hook them
up from PXP front-end and PXP session management functions.
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/pxp/intel_pxp.c | 19 +---
drivers/gpu/drm/i915/pxp/intel_
Add MTL hw-plumbing enabling for KCR operation under PXP
which includes:
1. Updating 'pick-gt' to get the media tile for
KCR interrupt handling
2. Adding MTL's KCR registers for PXP operation
(init, status-checking, etc.).
While doing #2, lets create a separate registers header file for PXP
Add helper functions into (new) common heci-packet-submission files
to handle generating the MTL GSC-CS Memory-Header and emitting of
the Heci-Cmd-Packet instructions that gets submitted to the engine.
NOTE1: This common functions for heci-packet-submission will be used by
different i915 callers:
For MTL, PXP transport back-end uses the GSC engine to submit
HECI packets for PXP arb session management. The command submission
that uses non-priveleged mode requires us to allocate (or free)
a set of execution submission resources (buffer-object, batch-buffer
and context). Thus, do this one time
Populate the backend-teelink abstraction layer using GSC-CS engine
for MTL (and future) products. The PXP backend for sending messages
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/pxp/intel_pxp_gsccs.c | 92 ++
1 file changed, 92 insertions(+)
diff --git a/drivers/gpu
Add GSC engine based method for sending PXP firmware packets
to the GSC firmware for MTL (and future) products. Use the newly
added helpers to populate the GSC-CS memory header and send the
message packet to the FW by dispatching the GSC_HECI_CMD_PKT
instruction on the GSC engine.
Signed-off-by: A
On legacy platforms, KCR HW enabling is done at the time
the mei component interface is loaded. It's also disabled
during unbind. For MTL onwards, we don't need a separate
component driver to send FW messages via GSC-CS.
Thus, immediately enable KCR HW on PXP's init, fini
and resume.
Signed-off-b
Add MTL's function for ARB session creation using PXP firmware
version 4.3 ABI structure format.
Before checking the return status, look at the GSC-CS-Mem-Header's
pending-bit which means the GSC firmware is busy and we should
resubmit.
Signed-off-by: Alan Previn
---
.../drm/i915/pxp/intel_pxp_
On legacy platforms, KCR HW enabling is done at the time the mei
component interface is bound. It's also disabled during unbind.
However, for MTL onwards, we don't depend on the tee-component
operation before we can start sending GSC-CS firmware messages.
Thus, immediately enable KCR HW on PXP's i
Despite KCR subsystem being in the media-tile (close to the
GSC-CS), the IRQ controls for it are on GT-0 with other global
IRQ controls. Thus, add a helper for KCR hw interrupt
enable/disable functions to get the correct gt structure (for
uncore) for MTL.
In the helper, we get GT-0's handle for un
This series enables PXP on MTL. On ADL/TGL platforms, we rely on
the mei driver via the i915-mei PXP component interface to establish
a connection to the security firmware via the HECI device interface.
That interface is used to create and teardown the PXP ARB session.
PXP ARB session is created wh
Enable PXP with MTL-GSC-CS: add the has_pxp into device info
and increase the timeouts for new GSC-CS + firmware specs.
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/pxp/intel_pxp_session.c | 2 +-
2 files changed, 2 insertions(+), 1 dele
Add a helper for KCR hw interrupt enable/disable functions.
For MTL onwards, it will get the GT-0's handle including the
uncore fw bits and use that despite the pxp->ctrl_gt being
the media-tile. No difference for legacy of course.
Signed-off-by: Alan Previn
---
drivers/gpu/drm/i915/pxp/intel_px
Hi,
On Sat, Dec 31, 2022 at 6:27 AM Abel Vesa wrote:
>
> The actual name is R133NW4K-R0.
>
> Fixes: 0f9fa5f58c784 ("drm/panel-edp: add IVO M133NW4J-R3 panel entry")
-:8: WARNING:BAD_FIXES_TAG: Please use correct Fixes: style 'Fixes:
<12 chars of sha1> ("")' - ie: 'Fixes: 0f9fa5f58c78
("drm/panel
Hi,
On Sat, Dec 31, 2022 at 6:27 AM Abel Vesa wrote:
>
> Add an eDP panel entry for IVO M133NW4J.
>
> Due to lack of documentation, use the delay_200_500_p2e100 timings like
> some other IVO entries for now.
>
> Signed-off-by: Abel Vesa
> ---
>
> Assuming the information from here is correct:
>
Replace alloc*workqueue with DRM helpers in order to avoid memory leak
Because in `drivers/gpu/drm/i915/i915_driver.c`, if
intel_modeset_init_noirq fails, its workqueues will not be destroyed.
And drop the destroy_workqueue in intel_modeset_driver_remove_noirq to
avoid double free.
Moreover, check
Drop the redundant fail label and change the "goto fail" into "return ret"
since they are the same.
Reviewed-by: Doug Anderson
Signed-off-by: Jiasheng Jiang
---
Changelog:
v1 -> v2:
1. No change of the error handling of the irq_of_parse_and_map.
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 24 +++
https://bugzilla.kernel.org/show_bug.cgi?id=201957
Ralldi (hcarter1...@gmail.com) changed:
What|Removed |Added
CC||hcarter1...@gmail.com
--
On Tue, Jan 10, 2023 at 04:39:00PM +, Matthew Brost wrote:
> On Tue, Jan 10, 2023 at 11:28:08AM +, Tvrtko Ursulin wrote:
> >
> >
> > On 09/01/2023 17:27, Jason Ekstrand wrote:
> >
> > [snip]
> >
> > > >>> AFAICT it proposes to have 1:1 between *userspace* created
> > > contexts
On Mon, 2022-12-12 at 15:15 -0800, Niranjana Vishwanathapura wrote:
> Add support for handling out fence for vm_bind call.
>
> v2: Reset vma->vm_bind_fence.syncobj to NULL at the end
> of vm_bind call.
> v3: Remove vm_unbind out fence uapi which is not supported yet.
> v4: Return error if I915
Hi Angelo,
>Il 10/01/23 04:12, Miles Chen ha scritto:
>> Use NULL for NULL pointer to fix the following sparse warning:
>> drivers/gpu/drm/mediatek/mtk_drm_gem.c:265:27: sparse: warning: Using plain
>> integer as NULL pointer
>>
>> Signed-off-by: Miles Chen
>
>Please add the appropriate tag...
Use NULL for NULL pointer to fix the following sparse warning:
drivers/gpu/drm/mediatek/mtk_drm_gem.c:265:27: sparse: warning: Using plain
integer as NULL pointer
Fixes: 3df64d7b0a4f ("drm/mediatek: Implement gem prime vmap/vunmap function")
Signed-off-by: Miles Chen
Reviewed-by: AngeloGioacchin
Hi Chris,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on rockchip/for-next]
[also build test WARNING on drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.2-rc3 next-20230110
Hi Chen-Yu,
Thanks for the review.
On Mon, Jan 9, 2023 at 7:26 PM Chen-Yu Tsai wrote:
>
> On Mon, Jan 9, 2023 at 4:41 PM Pin-yen Lin wrote:
> >
> > Register USB Type-C mode switches when the "mode-switch" property and
> > relevant port are available in Device Tree. Configure the crosspoint
>
On Fri, 6 Jan 2023 at 21:44, Oded Gabbay wrote:
>
> On Fri, Jan 6, 2023 at 12:45 PM Daniel Vetter wrote:
> >
> > On Fri, 6 Jan 2023 at 10:56, Stanislaw Gruszka
> > wrote:
> > >
> > > On Fri, Jan 06, 2023 at 10:28:15AM +0100, Daniel Vetter wrote:
> > > > On Thu, Jan 05, 2023 at 07:38:26PM +0200,
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on rockchip/for-next]
[also build test ERROR on drm/drm-next drm-exynos/exynos-drm-next
drm-intel/for-linux-next drm-intel/for-linux-next-fixes drm-tip/drm-tip
linus/master v6.2-rc3 next-20230111]
[cannot apply
Dear All,
Happy new year! and very glad to meet you all!, as I am newbie to DRM
susbsytem, seeking for some help please, in understanding some of the below
info regarding DRM
1. May I know please , what could be going wrong based on the attached
errors, any debug information, like anywhere can I
Remove page shift operations as ttm_resource moved
from num_pages to size_t size in bytes.
v1 -> v2: fix missing page shift to fpfn and lpfn
v2 -> v3: separate patch’s based on driver module
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/ttm/ttm_range_manager.c | 13 ++---
1 fi
ttm_resource allocate size in bytes to support less than page size
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/drm_gem.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 59a0bb5ebd85..ee8b5c2b6c60 100644
--- a/drivers/g
Remove page shift operations as ttm_resource moved
from num_pages to size_t size in bytes.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_res_cursor.h | 12 ++--
2 files changed, 7 insertions(+), 9 dele
Remove page shift operations as ttm_resource moved
from num_pages to size_t size in bytes.
Signed-off-by: Somalapuram Amaranath
---
drivers/gpu/drm/i915/i915_scatterlist.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.c
b/drivers
These properties provide a way to suggest to the userspace the preferred
positions for the outputs. Mutter already uses these properties to
determine the best positions for the outputs.
v2: Fix the sparse check warnings by wrapping the x and y values with
le32_to_cpu().
Cc: Gerd Hoffmann
Cc:
These properties provide a way to influence the userspace with regard
to positioning of the outputs and also enable it to look for new
preferred modes when hotplug interrupts occur.
These properties are currently used by other virtual GPU drivers
such as vmwgfx and qxl.
Testcase: After positioni
Some compositors (mainly Mutter) needs this property to be set in order
to read suggested_x/y values. This property, along with suggested_x/y
will be useful for virtual GPU drivers to share the Host output/window
layout with the Guest compositor.
v2: Improve the commit message.
Cc: Gerd Hoffmann
Hi,
On 10.01.2023 15:34, Oded Gabbay wrote:
> On Mon, Jan 9, 2023 at 2:24 PM Jacek Lawrynowicz
> wrote:
>> Adds four types of GEM-based BOs for the VPU:
>> - shmem
>> - userptr
>> - internal
>> - prime
>>
>> All types are implemented as struct ivpu_bo, based on
>> struct drm_gem_object. V
101 - 175 of 175 matches
Mail list logo
