The actual name is R133NW4K-R0.
Fixes: 0f9fa5f58c784 ("drm/panel-edp: add IVO M133NW4J-R3 panel entry")
Signed-off-by: Abel Vesa
---
Assuming the information from here is correct:
https://raw.githubusercontent.com/linuxhw/EDID/master/DigitalDisplay.md
drivers/gpu/drm/panel/panel-edp.c | 2 +-
Add an eDP panel entry for IVO M133NW4J.
Due to lack of documentation, use the delay_200_500_p2e100 timings like
some other IVO entries for now.
Signed-off-by: Abel Vesa
---
Assuming the information from here is correct:
https://raw.githubusercontent.com/linuxhw/EDID/master/DigitalDisplay.md
T
The ga102_gsps is not exported, so make it static to avoid the
following sparse warning:
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c:49:1: warning: symbol
'ga102_gsps' was not declared. Should it be static?
Signed-off-by: Ben Dooks
---
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/ga102.c | 2 +-
On Fri, Dec 23, 2022 at 05:45:24PM +0530, Rijo Thomas wrote:
>
> > dma_alloc_coherent memory is just as contiguous as __get_free_pages, and
> > calling dma_alloc_coherent from a guest does not guarantee that the memory
> > is
> > contiguous in host memory either. The memory would look contiguous f
Make gf100_fifo_nonstall_block as it isn't exported, to
silence the following sparse warning:
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c:451:1: warning: symbol
'gf100_fifo_nonstall_block' was not declared. Should it be static?
Signed-off-by: Ben Dooks
---
drivers/gpu/drm/nouveau/nvkm/eng
Make wpr_generic_header_dump static to avoid the
following sparse warning:
drivers/gpu/drm/nouveau/nvkm/nvfw/acr.c:49:1: warning: symbol
'wpr_generic_header_dump' was not declared. Should it be static?
Signed-off-by: Ben Dooks
---
drivers/gpu/drm/nouveau/nvkm/nvfw/acr.c | 2 +-
1 file changed,
Make ga100_mc_device static as it isn't exported, to
fix the following sparse warning:
drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c:51:1: warning: symbol
'ga100_mc_device' was not declared. Should it be static?
Signed-off-by: Ben Dooks
---
drivers/gpu/drm/nouveau/nvkm/subdev/mc/ga100.c | 2 +
>From 8d2a0c2c265119cb481deab825ea59c9605f3bd8 Mon Sep 17 00:00:00 2001
From: Qi Zhou
Date: Thu, 29 Dec 2022 20:15:51 +0800
Subject: [PATCH] fix gvtg cursor position if it is negative
It is valid if position of cursor is negative(not hotspot coordinates). for
example: precision section, resize, m
In do_fb_ioctl(), user specified "fb_info" can be freed in the callee
fbcon_get_con2fb_map_ioctl() -> set_con2fb_map() ->
con2fb_release_oldinfo(), this free operation is protected by
console_lock() in fbcon_set_con2fb_map_ioctl(), it also results in
the change of certain states such as "minfo->dea
To test, you need patch qemu too, I paste it here for convenience, and I it
have been sent to qemu dev mailling list
>From 4f14d6216d3f05f01ffe419ff0baeebe416a3e58 Mon Sep 17 00:00:00 2001
From: Qi Zhou
Date: Thu, 29 Dec 2022 20:25:06 +0800
Subject: [PATCH] fix gvtg cursor position if it is nega
Hello Ondřej,
Thanks a lot for your comments.
On 12/30/22 16:40, Ondřej Jirman wrote:
> Hi Javier,
>
> On Fri, Dec 30, 2022 at 12:31:52PM +0100, Javier Martinez Canillas wrote:
>> From: Kamil Trzciński
>>
>> The driver is for panels based on the Himax HX8394 controller, such as the
>> HannStar
On 12/30/22 16:43, Ondřej Jirman wrote:
[...]
>>
>> +DRM DRIVER FOR HIMAX HX8394 MIPI-DSI LCD panels
>> +M: Javier Martinez Canillas
>
> +M: Ondrej Jirman
>
Great! I assume that you also are OK with listing you in the DT
binding doc. I'll include you in both places when posting a v5.
--
Hello Ondřej,
Thanks a lot for your feedback.
On 12/30/22 16:37, Ondřej Jirman wrote:
[...]
>> &i2c0 {
>> clock-frequency = <40>;
>> i2c-scl-rising-time-ns = <168>;
>> @@ -214,6 +251,9 @@ vcc3v0_touch: LDO_REG2 {
>> regulator-name = "vcc3v0_touch";
>>
Document omitted 28nm compatible which will be used on MSM8976 SoC.
Signed-off-by: Adam Skladowski
---
Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dsi-phy-28nm.yaml
b/Documentat
On 31/12/2022 18:05, Adam Skladowski wrote:
> Document omitted 28nm compatible which will be used on MSM8976 SoC.
>
Commit msg is not entirely accurate - this compatible is already used in
the Linux DSI PHY driver.
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
From: Philip Yang
[ Upstream commit 29d48b87db64b6697ddad007548e51d032081c59 ]
Should only destroy the ib_mem and let process cleanup worker to free
the outstanding BOs. Reset the pointer in pdd->qpd structure, to avoid
NULL pointer access in process destroy worker.
BUG: kernel NULL pointer de
From: Luben Tuikov
[ Upstream commit 7554886daa31eacc8e7fac9e15bbce67d10b8f1f ]
Fix amdgpu_bo_validate_size() to check whether the TTM domain manager for the
requested memory exists, else we get a kernel oops when dereferencing "man".
v2: Make the patch standalone, i.e. not dependent on local p
From: Philip Yang
[ Upstream commit 1a799c4c190ea9f0e81028e3eb3037ed0ab17ff5 ]
If kfd_process_device_init_vm returns failure after vm is converted to
compute vm and vm->pasid set to compute pasid, KFD will not take
pdd->drm_file reference. As a result, drm close file handler maybe
called to rele
From: Philip Yang
[ Upstream commit 1a799c4c190ea9f0e81028e3eb3037ed0ab17ff5 ]
If kfd_process_device_init_vm returns failure after vm is converted to
compute vm and vm->pasid set to compute pasid, KFD will not take
pdd->drm_file reference. As a result, drm close file handler maybe
called to rele
From: Luben Tuikov
[ Upstream commit 7554886daa31eacc8e7fac9e15bbce67d10b8f1f ]
Fix amdgpu_bo_validate_size() to check whether the TTM domain manager for the
requested memory exists, else we get a kernel oops when dereferencing "man".
v2: Make the patch standalone, i.e. not dependent on local p
From: Philip Yang
[ Upstream commit 29d48b87db64b6697ddad007548e51d032081c59 ]
Should only destroy the ib_mem and let process cleanup worker to free
the outstanding BOs. Reset the pointer in pdd->qpd structure, to avoid
NULL pointer access in process destroy worker.
BUG: kernel NULL pointer de
Neither of these SoCs has INTF0, they only have a DSI interface on index
1. Stop enabling an interrupt that can't fire.
Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115")
Fixes: 5334087ee743 ("drm/msm: add support for QCM2290 MDSS")
Signed-off-by: Marijn Suijten
---
dr
Since DPU 5.0.0 the TEARCHECK registers and interrupts moved out of the
PINGPONG block and into the INTF. Implement the necessary callbacks in
the INTF block, and use these callbacks together with the INTF_TEAR
interrupts. Additionally, disable previous register writes and remove
unused interrupt
Since hardware revision 5.0.0 the TE configuration moved out of the
PINGPONG block into the INTF block. Writing these registers has no
effect, and is omitted downstream via the DPU/SDE_PINGPONG_TE feature
flag. This flag is only added to PINGPONG blocks used by hardware prior
to 5.0.0.
The code
Since hardware revision 5.0.0 the TE configuration moved out of the
PINGPONG block into the INTF block, including vsync source selection
that was previously part of MDP top. Writing to the MDP_VSYNC_SEL
register has no effect anymore and is omitted downstream via the
DPU/SDE_MDP_VSYNC_SEL feature
From: Konrad Dybcio
Now that newer SoCs since DPU 5.0.0 manage tearcheck in the INTF instead
of PINGPONG block, move the struct definition to a common file. Also,
bring in documentation from msm-4.19 techpack while at it.
Signed-off-by: Konrad Dybcio
[Marijn: Also move dpu_hw_pp_vsync_info]
Sig
Since DPU 5.0.0 the TEARCHECK registers and interrupts moved out of the
PINGPONG block and into the INTF. Implement the necessary callbacks in
the INTF block, and use these callbacks together with the INTF_TEAR
interrupts
Signed-off-by: Marijn Suijten
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encod
All SoCs since DPU 5.0.0 (and seemingly up until and including 6.0.0,
but excluding 7.x.x) have the tear interrupt and control registers moved
out of the PINGPONG block and into the INTF block. Wire up the
necessary interrupts and IRQ masks on all supported hardware.
Signed-off-by: Marijn Suijten
Now that newer DPU platforms use a readpointer-done interrupt on the
INTF block, stop providing the unused interrupt on the PINGPONG block.
Signed-off-by: Marijn Suijten
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --gi
On 2022-12-31 22:50:02, Marijn Suijten wrote:
> Since hardware revision 5.0.0 the TE configuration moved out of the
> PINGPONG block into the INTF block, including vsync source selection
> that was previously part of MDP top. Writing to the MDP_VSYNC_SEL
> register has no effect anymore and is omi
On 31/12/2022 23:50, Marijn Suijten wrote:
Neither of these SoCs has INTF0, they only have a DSI interface on index
1. Stop enabling an interrupt that can't fire.
Fixes: 3581b7062cec ("drm/msm/disp/dpu1: add support for display on SM6115")
Fixes: 5334087ee743 ("drm/msm: add support for QCM2290
On 31/12/2022 23:50, Marijn Suijten wrote:
Since hardware revision 5.0.0 the TE configuration moved out of the
PINGPONG block into the INTF block. Writing these registers has no
effect, and is omitted downstream via the DPU/SDE_PINGPONG_TE feature
flag. This flag is only added to PINGPONG block
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