On Sun, 11 Dec 2022 at 21:55, Deepak R Varma wrote:
>
> A call to platform_get_irq() already prints an error on failure within
> its own implementation. So printing another error based on its return
> value in the caller is redundant and should be removed. The clean up
> also makes if condition bl
On 21/12/2022 16:31, Jianhua Lu wrote:
> Add Kinetic KTZ8866 backlight binding documentation.
>
> Signed-off-by: Jianhua Lu
> ---
Reviewed-by: Krzysztof Kozlowski
Best regards,
Krzysztof
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 +-
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c| 2 +-
drivers/gpu/drm/i915/gt/intel_ring_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_workarounds.c
The comments are redundant to the checks being done to apply the
workarounds and very often get outdated as workarounds need to be
extended to new platforms or steppings. Remove them altogether with
the following matches (platforms extracted from intel_workarounds.c):
find drivers/gpu/drm
Cleanup gt and display wrt the comments for the workarounds. Rationale
is in the patch itself.
I'm providing the patches, as generated by the commands in the commit
message, with a fixup on top to remove false positives. The intention for
when this is ready to be applied is to squash the fixup: it
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
drivers/gpu/drm/i915/i915_perf.c | 4 ++--
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
4 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/in
The comments are redundant to the checks being done to apply the
workarounds and very often get outdated as workarounds need to be
extended to new platforms or steppings. Remove them altogether with
the following matches (platforms extracted from intel_workarounds.c):
find drivers/gpu/drm
Hello Dmitry,
thanks for your review.
On Tue, 20 Dec 2022 23:21:49 +0300
Dmitry Osipenko wrote:
> 28.11.2022 18:23, Luca Ceresoli пишет:
> > Tegra20 and other Tegra SoCs have a video input (VI) peripheral that can
> > receive from either MIPI CSI-2 or parallel video (called respectively "CSI"
>
Hello Dmitry,
On Wed, 21 Dec 2022 00:40:20 +0300
Dmitry Osipenko wrote:
> 28.11.2022 18:23, Luca Ceresoli пишет:
> > +static int tegra20_channel_capture_frame(struct tegra_vi_channel *chan,
> > +struct tegra_channel_buffer *buf)
> > +{
> > + u32 value;
> > +
Hello Dmitry,
On Tue, 20 Dec 2022 23:13:05 +0300
Dmitry Osipenko wrote:
> 02.12.2022 11:11, Luca Ceresoli пишет:
...
> >>> --- /dev/null
> >>> +++
> >>> b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
> >>> @@ -0,0 +1,63 @@
> >>> +# SPDX-License-Identifier: (GPL-2.0-
On 12/15/22 10:07 PM, Rodrigo Vivi wrote:
On Wed, Dec 14, 2022 at 11:37:19PM +0100, Andi Shyti wrote:
Hi Rodrigo,
On Tue, Dec 13, 2022 at 01:18:48PM +, Vivi, Rodrigo wrote:
On Tue, 2022-12-13 at 00:08 +0100, Andi Shyti wrote:
Hi Rodrigo,
On Mon, Dec 12, 2022 at 11:55:10AM -0500, Rodri
On Mon, Nov 28, 2022 at 04:28:48PM +, Diogo Ivo wrote:
> Hello,
>
> These patches add support for the JDI LPM102A188A display panel,
> found in the Google Pixel C.
Hello,
Gentle ping on this series.
Thank you,
Diogo Ivo
This patch is:
Reviewed-by: Simon Ser
On Tue, 2022-12-20 at 13:45 -0500, Steven Rostedt wrote:
> [
> Linus,
>
> I ran the script against your latest master branch:
> commit b6bb9676f2165d518b35ba3bea5f1fcfc0d969bf
>
> As the timer_shutdown*() code is now in your tree, I figured
> we can start doing the conversions.
On 22/12/2022 08:25, Lucas De Marchi wrote:
The comments are redundant to the checks being done to apply the
workarounds and very often get outdated as workarounds need to be
extended to new platforms or steppings. Remove them altogether with
the following matches (platforms extracted from int
On 16/12/2022 20:11, Kuogee Hsieh wrote:
> Move data-lanes property from mdss_dp node to dp_out endpoint. Also
> add link-frequencies property into dp_out endpoint as well. The last
> frequency specified at link-frequencies will be the max link rate
> supported by DP.
>
> Changes in v5:
> -- rever
On 16/12/2022 22:44, Kuogee Hsieh wrote:
> Move data-lanes property from mdss_dp node to dp_out endpoint. Also
> add link-frequencies property into dp_out endpoint as well. The last
> frequency specified at link-frequencies will be the max link rate
> supported by DP.
>
> Changes in v5:
> -- rever
[Note: this mail contains only information for Linux kernel regression
tracking. Mails like these contain '#forregzbot' in the subject to make
then easy to spot and filter out. The author also tried to remove most
or all individuals from the list of recipients to spare them the hassle.]
On 21.12.2
From: Tvrtko Ursulin
This is the fix proposed by Chuansheng Liu to
close a memory leak caused by refactoring done in 786555987207
("drm/i915/gem: Store mmap_offsets in an rbtree rather than a plain list").
Original commit text from Liu was this:
>
> The below memory leak information is caught:
Hi all,
I hope there will be place for such tiny helper in kernel.
Quick cocci analyze shows there is probably few thousands places
where it could be useful.
I am not sure who is good person to review/ack such patches,
so I've used my intuition to construct to/cc lists, sorry for mistakes.
This is
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> Currently we do not differentiate between the various users of the
> qcom,mdss-dsi-ctrl. The driver is flexible enough to operate from one
> compatible string but, the hardware does have some significant differences
> in the number of clocks.
>
> To f
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/alpha/include/asm/cmpxchg.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/alpha/include/asm/cmpxchg.h b/arch/alpha/include/asm/cmpxchg.h
index 6e0a850aa9d38c..40e8159ef6e794 1006
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/arm/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/cmpxchg.h b/arch/arm/include/asm/cmpxchg.h
index 4dfe538dfc689b..6953fc05a97886 100644
--- a
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/arc/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arc/include/asm/cmpxchg.h b/arch/arc/include/asm/cmpxchg.h
index c5b544a5fe8106..e138fde067dea5 100644
--- a
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/hexagon/include/asm/cmpxchg.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/hexagon/include/asm/cmpxchg.h
b/arch/hexagon/include/asm/cmpxchg.h
index cdb705e1496af8..92dc5e5f836f
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/arm64/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/include/asm/cmpxchg.h b/arch/arm64/include/asm/cmpxchg.h
index 497acf134d9923..3a36ba58e8c2ef 100644
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/loongarch/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/loongarch/include/asm/cmpxchg.h
b/arch/loongarch/include/asm/cmpxchg.h
index ecfa6cf79806e6..979fde61
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/m68k/include/asm/cmpxchg.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/m68k/include/asm/cmpxchg.h b/arch/m68k/include/asm/cmpxchg.h
index 6cf464cdab067e..d7f3de9c5d6f79 100644
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/ia64/include/asm/cmpxchg.h | 2 +-
arch/ia64/include/uapi/asm/cmpxchg.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/ia64/include/asm/cmpxchg.h b/arch/ia64/include/asm/cmpxc
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/mips/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index 7ec9493b28614f..feed343ad483a9 100644
--
On 22/12/2022 12:47, Krzysztof Kozlowski wrote:
> On 20/12/2022 13:36, Bryan O'Donoghue wrote:
>> Currently we do not differentiate between the various users of the
>> qcom,mdss-dsi-ctrl. The driver is flexible enough to operate from one
>> compatible string but, the hardware does have some signifi
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/parisc/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/parisc/include/asm/cmpxchg.h
b/arch/parisc/include/asm/cmpxchg.h
index 5f274be105671e..c1d776bb16b4ed 10
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/openrisc/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/openrisc/include/asm/cmpxchg.h
b/arch/openrisc/include/asm/cmpxchg.h
index 79fd16162ccb6d..5725e22e106
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/powerpc/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/cmpxchg.h
b/arch/powerpc/include/asm/cmpxchg.h
index 05f246c0e36eb3..b5624c9fe09bf7
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/riscv/include/asm/atomic.h | 2 +-
arch/riscv/include/asm/cmpxchg.h | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/include/asm/atomic.h b/arch/riscv/include/asm/atomic.h
ind
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/s390/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/s390/include/asm/cmpxchg.h b/arch/s390/include/asm/cmpxchg.h
index 84c3f0d576c5b1..efc16f4aac8643 100644
--
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/sh/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/sh/include/asm/cmpxchg.h b/arch/sh/include/asm/cmpxchg.h
index 0ed9b3f4a57796..288f6f38d98fb4 100644
--- a/ar
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/sparc/include/asm/cmpxchg_32.h | 4 ++--
arch/sparc/include/asm/cmpxchg_64.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/sparc/include/asm/cmpxchg_32.h
b/arch/sparc/include/asm
__xchg will be used for non-atomic xchg macro.
Signed-off-by: Andrzej Hajda
---
arch/xtensa/include/asm/cmpxchg.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/xtensa/include/asm/cmpxchg.h
b/arch/xtensa/include/asm/cmpxchg.h
index eb87810357ad88..675a11ea8de76b 10
The pattern of setting variable with new value and returning old
one is very common in kernel. Usually atomicity of the operation
is not required, so xchg seems to be suboptimal and confusing in
such cases.
Signed-off-by: Andrzej Hajda
---
include/linux/non-atomic/xchg.h | 19 +++
Prefer core helper if available.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c| 2 +-
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_execlists_submission.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_ggtt.c
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> Deprecate qcom,dsi-ctrl-6g-qcm2290 in favour of the desired format
> qcom,qcm2290-dsi-ctrl.
>
> Signed-off-by: Bryan O'Donoghue
> ---
> .../display/msm/dsi-controller-main.yaml | 36 +++
> 1 file changed, 21 insertions(+), 15 de
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> Each compatible has a different set of clocks which are associated with it.
> Add in the list of clocks for each compatible.
>
> Signed-off-by: Bryan O'Donoghue
> ---
> .../display/msm/dsi-controller-main.yaml | 189 +-
> 1 file
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> When converting from .txt to .yaml dt-binding descriptions we appear to
> have missed some of the previous detail on the number and names of
> permissible clocks.
>
> Fix this by listing the clock descriptions against the clock names at a
> high level
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> When converting from .txt to .yaml we didn't include descriptions for the
> existing regulator supplies.
>
> - vdd
> - vdda
> - vddio
>
> Add those descriptions into the yaml now as they were prior to the
> conversion. In the .txt description we mark
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> Add the list of current compats absent the deprecated qcm2290 to the list
> of dsi compats listed here.
>
> Signed-off-by: Bryan O'Donoghue
> ---
> .../bindings/display/msm/qcom,mdss.yaml | 16 +++-
> 1 file changed, 15 insertio
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
> Several MDSS yaml files exist which document the dsi sub-node.
> For each existing SoC MDSS yaml, provide the right dsi compat string.
>
> Signed-off-by: Bryan O'Donoghue
Same concerns about bisectability.
Best regards,
Krzysztof
Hi, this is your Linux kernel regression tracker.
On 18.12.22 14:28, Mikhail Gavrilov wrote:
>
> The kernel 6.2 preparation cycle has begun.
> And after the kernel was updated on my Fedora Rawhide I started
> receiving use-after-free errors with complete computer hangs.
> At least a good reproduce
On 22/12/2022 11:50, Krzysztof Kozlowski wrote:
On 20/12/2022 13:36, Bryan O'Donoghue wrote:
Deprecate qcom,dsi-ctrl-6g-qcm2290 in favour of the desired format
qcom,qcm2290-dsi-ctrl.
Signed-off-by: Bryan O'Donoghue
---
.../display/msm/dsi-controller-main.yaml | 36 +++
On Thu, Dec 22, 2022 at 12:46:34PM +0100, Andrzej Hajda wrote:
> The pattern of setting variable with new value and returning old
> one is very common in kernel. Usually atomicity of the operation
> is not required, so xchg seems to be suboptimal and confusing in
> such cases.
FWIW,
Reviewed-by: A
On 12/21/2022 8:30 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The CI results for the 'fast request' patch set (enables error return
codes for fire-and-forget H2G messages) hit an issue with the KMD
sending context submission requests on an invalid context. That was
caused by a
Reviewed-by: Daniele Ceraolo Spurio
Daniele
On 12/21/2022 8:30 PM, john.c.harri...@intel.com wrote:
From: John Harrison
A static analyser was complaining about not checking for null
pointers. However, the location of the complaint can only be reached
in the first place if said pointer is non
Hi GG,
> > > > > > > drivers/gpu/drm/i915/gt/intel_reset.c | 34
> > > > > > > ++-
> > > > > > > 1 file changed, 28 insertions(+), 6 deletions(-)
> > > > > > >
> > > > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
> > > > > > > b/drivers/gpu/drm/i915/gt/intel
Hi Andrzej,
Thanks for your series!
On Thu, Dec 22, 2022 at 12:49 PM Andrzej Hajda wrote:
> I hope there will be place for such tiny helper in kernel.
> Quick cocci analyze shows there is probably few thousands places
> where it could be useful.
> I am not sure who is good person to review/ack s
On 22.12.2022 15:12, Geert Uytterhoeven wrote:
Hi Andrzej,
Thanks for your series!
On Thu, Dec 22, 2022 at 12:49 PM Andrzej Hajda wrote:
I hope there will be place for such tiny helper in kernel.
Quick cocci analyze shows there is probably few thousands places
where it could be useful.
I a
Convert rockchip-lvds.txt to YAML.
Changed:
Add power-domains property.
Requirements between PX30 and RK3288
Signed-off-by: Johan Jonker
Reviewed-by: Rob Herring
---
Changed V3:
Filename matching compatible style
Drop "Regulator phandle for "
Specify properties and requirements per S
Add new converted rockchip,lvds.yaml to grf.yaml file.
Prepare for more SoCs with lvds output.
Signed-off-by: Johan Jonker
Reviewed-by: Rob Herring
---
Changed V5:
Drop the quotes
---
.../devicetree/bindings/soc/rockchip/grf.yaml | 24 +++
1 file changed, 14 insertions(+), 10
The clock-master property is used for the controller and not in the panel,
so move it there.
Signed-off-by: Johan Jonker
---
.../bindings/display/dsi-controller.yaml | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/Documentation/devicetree/bindings/dis
Fix clock properties from the common snps,dw-mipi-dsi.yaml file,
as they don't match with what is used on the SoCs.
Signed-off-by: Johan Jonker
Reviewed-by: Rob Herring
---
.../display/bridge/snps,dw-mipi-dsi.yaml | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
Convert dw_mipi_dsi_rockchip.txt to yaml.
Changed:
file name
requirements
Signed-off-by: Johan Jonker
---
Changed V6:
Remove clock-master property
Fix $ref
---
.../display/rockchip/dw_mipi_dsi_rockchip.txt | 94 --
.../rockchip/rockchip,dw-mipi-dsi.yaml| 166 ++
Convert analogix_dp.txt to yaml for use as common document.
Changed:
Relexed requirements
Signed-off-by: Johan Jonker
---
.../bindings/display/bridge/analogix,dp.yaml | 63 +++
.../bindings/display/bridge/analogix_dp.txt | 51 ---
.../bindings/display/exynos/exy
Convert analogix_dp-rockchip.txt to yaml.
Changed:
Add power-domains property
File name
Signed-off-by: Johan Jonker
---
.../display/rockchip/analogix_dp-rockchip.txt | 98 -
.../rockchip/rockchip,analogix-dp.yaml| 103 ++
2 files changed, 103 inserti
Convert fcs,fusb302.txt to yaml.
Changed:
Add vbus-supply property
Signed-off-by: Johan Jonker
---
Changed V6:
Add unevaluatedProperties
Drop unused labels
---
.../devicetree/bindings/usb/fcs,fusb302.txt | 34 --
.../devicetree/bindings/usb/fcs,fusb302.yaml | 67 ++
Use generic node name for rk3288.dtsi dsi node.
With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node
is required, so add a node with label mipi_out.
Also restyle.
Signed-off-by: Johan Jonker
---
Changed V6:
Restyle
---
arch/arm/boot/dts/rk3288.dtsi | 14 --
1 file change
With the conversion of rockchip,lvds.yaml a port@1 node
is required, so add a node with label lvds_out.
Also restyle.
Signed-off-by: Johan Jonker
---
Changed V6:
Restyle
Changed V5:
Rename title
---
arch/arm/boot/dts/rk3288.dtsi | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
d
With the conversion of rockchip,analogix-dp.yaml a port@1 node
is required, so add a node with label edp_out.
Also restyle.
Signed-off-by: Johan Jonker
---
arch/arm/boot/dts/rk3288.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/r
With the conversion of rockchip,lvds.yaml a port@1 node
is required, so add a node with label lvds_out.
Also add label lvds_in to port@0.
Signed-off-by: Johan Jonker
---
Changed V5:
rename title
add label lvds_in
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 6 +-
1 file changed, 5 inser
With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node
is required, so add a node with label dsi_out.
Also add label dsi_in to port@0.
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/px30.dtsi | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm6
Use generic node name for rk3399.dtsi dsi node.
With the conversion of rockchip,dw-mipi-dsi.yaml a port@1 node
is required, so add a node with label mipi_out.
Also restyle.
Signed-off-by: Johan Jonker
---
Changed V6:
Restyle
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 13 +++--
1 f
Use generic node name for rk3399.dtsi dp node.
With the conversion of rockchip,analogix-dp.yaml a port@1 node
is required, so add a node with label edp_out.
Also restyle.
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 7 ++-
1 file changed, 6 insertions(+), 1 dele
'vbus-supply' does not match any of the regexes in rk3566-box-demo.dts
in the usb2phy0_otg node, so rename vbus-supply to phy-supply.
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/bo
The hclk is not used in the dw-mipi-dsi-rockchip.c driver,
so remove hclk from the rk356x.dtsi dsi node.
Signed-off-by: Johan Jonker
---
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
Changes in v2:
- Use dp bridge to set psr entry/exit instead of dpu_enocder.
- Don't modify whitespaces.
- Set self refresh aware from atomic_check.
- Set self refresh aware only if psr is supported.
- Provide a stub for msm_dp_display_set_psr.
- Move dp functions to bridge code.
Chang
Cache crtc obj in the dpu encoder during initialization.
This will avoid extracting crtc from connector state there by
simplifying the obj access whenever it is required.
This patch is dependent on the series:
https://patchwork.freedesktop.org/series/110969/
Signed-off-by: Vinod Polimera
---
dr
Add new helper functions, drm_atomic_get_old_crtc_for_encoder
and drm_atomic_get_new_crtc_for_encoder to retrieve the
corresponding crtc for the encoder.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Douglas Anderson
---
drivers/gpu/drm/drm_atomic.c | 60 ++
Add support for basic panel self refresh (PSR) feature for eDP.
Add a new interface to set PSR state in the sink from DPU.
Program the eDP controller to issue PSR enter and exit SDP to
the sink.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
The eDP and DP interfaces shared the bridge operations and
the eDP specific changes were implemented under is_edp check.
To add psr support for eDP, we started using a new set of eDP
bridge ops. We are moving the eDP specific code in the
dp_bridge_mode_valid function to a new eDP function,
edp_brid
Changes in v2:
- Use dp bridge to set psr entry/exit instead of dpu_enocder.
- Don't modify whitespaces.
- Set self refresh aware from atomic_check.
- Set self refresh aware only if psr is supported.
- Provide a stub for msm_dp_display_set_psr.
- Move dp functions to bridge code.
Chang
Use atomic variants for DP bridge callback functions so that
the atomic state can be accessed in the interface drivers.
The atomic state will help the driver find out if the display
is in self refresh state.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Ba
Use atomic variants for encoder callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 10 ++-
This change will handle the psr entry exit cases in the panel
bridge atomic callback functions. For example, the panel power
should not turn off if the panel is entering psr.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/bridge/panel.c | 48 ++
From: Sankeerth Billakanti
Updated frames get queued if self_refresh_aware is set when the
sink is in psr. To support bridge enable and avoid queuing of update
frames, reset the self_refresh_aware state after entering psr.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
---
According to KMS documentation, The driver must not release any shared
resources if active is set to false but enable still true.
Fixes: ccc862b957c6 ("drm/msm/dpu: Fix reservation failures in modeset")
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu
Use atomic variants for panel bridge callback functions such that
certain states like self-refresh can be accessed as part of
enable/disable sequence.
Signed-off-by: Sankeerth Billakanti
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/bridge/panel.c | 20 +++
Enable PSR on eDP interface using drm self-refresh librabry.
This patch uses a trigger from self-refresh library to enter/exit
into PSR, when there are no updates from framework.
Signed-off-by: Kalyan Thota
Signed-off-by: Vinod Polimera
Reviewed-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dis
There can be a race between timing gen disable and vblank irq. The
wait post timing gen disable may return early but intf disable sequence
might not be completed. Ensure that, intf status is disabled before
we retire the function.
Signed-off-by: Vinod Polimera
---
.../gpu/drm/msm/disp/dpu1/dpu_e
Recommended way of reading the interface timing gen status is via
status register. Timing gen status register will give a reliable status
of the interface especially during ON/OFF transitions. This support was
added from DPU version 5.0.0.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/di
Clear interface active register from the datapath for a clean shutdown of
the datapath.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
b/drivers/gpu/drm/msm/disp/dpu
Reset the datapath after disabling the timing gen, such that
it can start on a clean slate when the intf is enabled back.
This was a recommended sequence from the DPU HW programming guide.
Signed-off-by: Vinod Polimera
---
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 1 +
1 file change
This patch is:
Reviewed-by: Simon Ser
On Thu, Dec 22, 2022 at 10:27:00AM +, Tvrtko Ursulin wrote:
On 22/12/2022 08:25, Lucas De Marchi wrote:
The comments are redundant to the checks being done to apply the
workarounds and very often get outdated as workarounds need to be
extended to new platforms or steppings. Remove them alt
On Wed, 21 Dec 2022 at 18:14, Akhil P Oommen wrote:
>
> Add support for the newly added 'synced_poweroff' genpd flag. This allows
> some clients (like adreno gpu driver) to request gdsc driver to ensure
> a votable gdsc (like gpucc cx gdsc) has collapsed at hardware.
>
> Signed-off-by: Akhil P Oom
On Wed, 21 Dec 2022 at 18:14, Akhil P Oommen wrote:
>
> Remove the unused 'reset' interface which was supposed to help to ensure
> that cx gdsc has collapsed during gpu recovery. This is was not enabled
> so far due to missing gpucc driver support. Similar functionality using
> genpd framework wil
On Wed, 21 Dec 2022 at 18:14, Akhil P Oommen wrote:
>
> As per the recommended recovery sequence of adreno gpu, cx gdsc should
> collapse at hardware before it is turned back ON. This helps to clear
> out the stale states in hardware before it is reinitialized. Use the
> genpd notifier along with
On Wed, 21 Dec 2022 at 18:14, Akhil P Oommen wrote:
>
> When a device has multiple power domains, dev->power_domain is left
> empty during probe. That didn't cause any issue so far because we are
> freeloading on smmu driver's vote on cx gdsc. Instead of that, create
> a device_link between cx gen
On 12/22/2022 2:47 AM, Krzysztof Kozlowski wrote:
On 16/12/2022 20:11, Kuogee Hsieh wrote:
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
On Thu, Dec 22, 2022 at 08:54:40PM +0800, Jianhua Lu wrote:
> Add support for Kinetic KTZ8866 backlight, which is used in
> Xiaomi tablet, Mi Pad 5 series. This driver lightly based on
> downstream implementation [1].
> [1]
> https://github.com/MiCode/Xiaomi_Kernel_OpenSource/blob/elish-r-oss/driv
On Mon, Dec 19, 2022 at 11:49:47AM -0100, Melissa Wen wrote:
> On 12/19, Maíra Canal wrote:
> > This series introduces the initial structure to make DRM debugfs more
> > device-centered and it is the first step to drop the
> > drm_driver->debugfs_init hooks in the future [1].
> >
> > Currently, DR
On Thu, 22 Dec 2022 12:46:16 +0100 Andrzej Hajda
wrote:
> Hi all,
>
> I hope there will be place for such tiny helper in kernel.
> Quick cocci analyze shows there is probably few thousands places
> where it could be useful.
So to clarify, the intent here is a simple readability cleanup for
exi
Hi,
On Thu, Dec 15, 2022 at 06:03:59PM +0100, Michael Rodin wrote:
> The detected status of a connector should be ignored when a connector is
> forced as hinted in the commit d50ba256b5f1 ("drm/kms: start
> adding command line interface using fb."). One negative side effect of
> not ignoring this
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