Add driver for the AUO A030JTN01 panel, which is a 320x480 3.0" 4:3
24-bit TFT LCD panel with non-square pixels and a delta-RGB 8-bit
interface.
Signed-off-by: Christophe Branchereau
Signed-off-by: Paul Cercueil
---
drivers/gpu/drm/panel/Kconfig | 8 +
drivers/gpu/drm/panel/Make
Add binding for the AUO A030JTN01 panel, which is a 320x480 3.0" 4:3
24-bit TFT LCD panel with non-square pixels and a delta-RGB 8-bit
interface.
Signed-off-by: Christophe Branchereau
Signed-off-by: Paul Cercueil
---
.../bindings/display/panel/auo,a030jtn01.yaml | 57 +++
1 file
Add the orisetech ota5601a ic driver
For now it only supports the focaltech gpt3 3" 640x480 ips panel
found in the ylm rg300x handheld.
Signed-off-by: Christophe Branchereau
---
drivers/gpu/drm/panel/Kconfig | 9 +
drivers/gpu/drm/panel/Makefile| 1 +
.../gpu
Add bindings for the focaltech gpt3, which is a 640x480 3.0" 4:3
IPS LCD Panel found in the YLM/Anbernic RG300X handheld.
Signed-off-by: Christophe Branchereau
---
.../display/panel/focaltech,gpt3.yaml | 59 +++
1 file changed, 59 insertions(+)
create mode 100644
Docume
On 12.12.2022 16:33, Jagan Teki wrote:
> On Mon, Dec 12, 2022 at 8:52 PM Marek Szyprowski
> wrote:
>> On 12.12.2022 09:43, Marek Szyprowski wrote:
>>> On 12.12.2022 09:32, Jagan Teki wrote:
On Mon, Dec 12, 2022 at 1:56 PM Marek Szyprowski
wrote:
> Hi Jagan,
>
> On 09.12.20
2022년 12월 12일 (월) 오후 3:14, Kang Minchul 님이 작성:
>
> Function dev_err() is redundant because platform_get_irq()
> already prints an error.
>
> Signed-off-by: Kang Minchul
> ---
> Changes in v2:
> - Removed unnecessary braces.
>
> drivers/gpu/drm/etnaviv/etnaviv_gpu.c | 4 +---
> 1 file changed, 1
On 09.12.2022 18:16, Arnd Bergmann wrote:
On Fri, Dec 9, 2022, at 16:48, Andrzej Hajda wrote:
The pattern of setting variable with new value and returning old
one is very common in kernel. Usually atomicity of the operation
is not required, so xchg seems to be suboptimal and confusing in
such ca
On Tue, Dec 13, 2022, at 10:28, Andrzej Hajda wrote:
> On 09.12.2022 18:16, Arnd Bergmann wrote:
>> name for the backing of arch_xchg() or arch_xchg_relaxed(),
>> maybe we can instead rename those to __arch_xchg() and use the
>> __xchg() name for the new non-atomic version?
>
> I will try, but even
No functional modification involved.
drivers/gpu/drm/i915/gt/intel_engine_cs.c:1306: warning: expecting prototype
for intel_engines_init_common(). Prototype was for engine_init_common() instead.
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=3442
Reported-by: Abaci Robot
Signed-off-by: Ji
On 09.12.2022 19:56, Andy Shevchenko wrote:
On Fri, Dec 09, 2022 at 04:48:39PM +0100, Andrzej Hajda wrote:
The pattern of setting variable with new value and returning old
one is very common in kernel. Usually atomicity of the operation
is not required, so xchg seems to be suboptimal and confusi
On Mon, 12 Dec 2022, Harry Wentland wrote:
> Drivers might not support all colorspaces defined in
> dp_colorspaces and hdmi_colorspaces. This results in
> undefined behavior when userspace is setting an
> unsupported colorspace.
>
> Allow drivers to pass the list of supported colorspaces
> when cr
On Mon, 12 Dec 2022 13:21:27 -0500
Harry Wentland wrote:
> Drivers might not support all colorspaces defined in
> dp_colorspaces and hdmi_colorspaces. This results in
> undefined behavior when userspace is setting an
> unsupported colorspace.
>
> Allow drivers to pass the list of supported color
On Tue, Dec 13, 2022 at 11:09:12AM +0100, Andrzej Hajda wrote:
> On 09.12.2022 19:56, Andy Shevchenko wrote:
> > On Fri, Dec 09, 2022 at 04:48:39PM +0100, Andrzej Hajda wrote:
...
> > > I hope there will be place for such tiny helper in kernel.
> > > Quick cocci analyze shows there is probably fe
Sorry, hand slipped on keyboard and sent out a draft of this email too
early.
On Mon, 12 Dec 2022 13:21:27 -0500
Harry Wentland wrote:
> Drivers might not support all colorspaces defined in
> dp_colorspaces and hdmi_colorspaces. This results in
> undefined behavior when userspace is setting an
On Mon, 12 Dec 2022 13:21:35 -0500
Harry Wentland wrote:
> In order to IGT test colorspace we'll want to print
> the currently enabled colorspace on a stream. We add
> a new debugfs to do so, using the same scheme as
> current bpc reporting.
>
> This might also come in handy when debugging displ
On Mon, 12 Dec 2022 13:21:25 -0500
Harry Wentland wrote:
> This allows us to use strongly typed arguments.
>
> Signed-off-by: Harry Wentland
> Cc: Pekka Paalanen
> Cc: Sebastian Wick
> Cc: vitaly.pros...@amd.com
> Cc: Uma Shankar
> Cc: Ville Syrjälä
> Cc: Joshua Ashton
> Cc: dri-devel@list
Hi Marek,
On Tue, Dec 13, 2022 at 2:28 PM Marek Szyprowski
wrote:
>
> On 12.12.2022 16:33, Jagan Teki wrote:
>
> On Mon, Dec 12, 2022 at 8:52 PM Marek Szyprowski
> wrote:
>
> On 12.12.2022 09:43, Marek Szyprowski wrote:
>
> On 12.12.2022 09:32, Jagan Teki wrote:
>
> On Mon, Dec 12, 2022 at 1:56
Hi Jagan,
On Tue, Dec 13, 2022 at 7:40 AM Jagan Teki wrote:
> https://gitlab.com/openedev/kernel/-/commits/imx8mm-dsi-v10
Please preserve the authorship of the patches.
This one is from Marek Vasut:
https://gitlab.com/openedev/kernel/-/commit/e244fa552402caebcf48cd6710fd387429f7f680
but in yo
Indeed looks like miss. Thanks for the patch.
Reviewed-by: Tejas Upadhyay
> -Original Message-
> From: Intel-gfx On Behalf Of
> Jiapeng Chong
> Sent: Tuesday, December 13, 2022 3:22 PM
> To: jani.nik...@linux.intel.com
> Cc: Jiapeng Chong ; intel-
> g...@lists.freedesktop.org; Abaci Rob
On Mon, 12 Dec 2022 13:21:37 -0500
Harry Wentland wrote:
> This will let us pass kms_hdr.bpc_switch.
>
> I don't see any good reasons why we still need to
> limit bpc to 8 bpc and doing so is problematic when
> we enable HDR.
>
> If I remember correctly there might have been some
> displays out
Hi Fabio,
On Tue, Dec 13, 2022 at 4:17 PM Fabio Estevam wrote:
>
> Hi Jagan,
>
> On Tue, Dec 13, 2022 at 7:40 AM Jagan Teki wrote:
>
> > https://gitlab.com/openedev/kernel/-/commits/imx8mm-dsi-v10
>
> Please preserve the authorship of the patches.
>
> This one is from Marek Vasut:
> https://gitl
On 12/12/2022 9:13 PM, Tom Lendacky wrote:
> On 12/12/22 05:21, Rijo Thomas wrote:
>> On 12/10/2022 2:31 AM, Tom Lendacky wrote:
>>> On 12/6/22 06:30, Rijo Thomas wrote:
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by host to ASP must b
On 12/13/22 01:16, Stephen Rothwell wrote:
Today's linux-next merge of the fbdev tree got a conflict in:
drivers/video/fbdev/Kconfig
between commit:
c8a17756c425 ("drm/ofdrm: Add ofdrm for Open Firmware framebuffers")
from the drm tree and commit:
225e095bbd3a ("fbdev: offb: make offb dr
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by host to ASP must be a real physical
address and the pages must be physically contiguous.
In a virtualized environment though, when the driver is running in a
guest VM, the pages allocated by __get_fre
VPU is integrated x86_64 device and the driver utilizes various CPU
architecture specific functions that don't exits on ARCH=um, so disable
build on UML.
Reported-by: kernel test robot
Signed-off-by: Stanislaw Gruszka
---
drivers/accel/ivpu/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 dele
https://bugzilla.kernel.org/show_bug.cgi?id=216805
Bug ID: 216805
Summary: external monitor not working since 6.1 (amdgpu:
update_mst_stream_alloc_table, regression from 6.0))
Product: Drivers
Version: 2.5
Kernel Version: 6.1
Use MI_USE_GGTT instead of hardcoded value.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c
b/drivers/gpu/drm/i915/gem/selftests/i915
On 12/12/2022 23:15, Niranjana Vishwanathapura wrote:
Support dump capture of persistent mappings upon user request.
Capture of a mapping is requested with the VM_BIND ioctl and
processed during the GPU error handling, thus not adding any
additional latency to the submission path.
A list of per
Thanks, I found my mistake and I will submit a v2.
> And how did you find this potential problem? What tool did you use and
> why did you not follow the documentation for properly describing the
> tool?
I used a tool I wrote myself to find it, which is unpublished.
Therefore, I think it is okay
Hi,
On 13.12.2022 11:40, Jagan Teki wrote:
> On Tue, Dec 13, 2022 at 2:28 PM Marek Szyprowski
> wrote:
>> On 12.12.2022 16:33, Jagan Teki wrote:
>>
>> On Mon, Dec 12, 2022 at 8:52 PM Marek Szyprowski
>> wrote:
>>
>> On 12.12.2022 09:43, Marek Szyprowski wrote:
>>
>> On 12.12.2022 09:32, Jagan Te
Add the check for the return value of dma_alloc_coherent
in order to avoid NULL pointer dereference.
Fixes: 055276c13205 ("usb: gadget: add Aspeed ast2600 udc driver")
Signed-off-by: Jiasheng Jiang
---
Changelog:
v1 -> v2:
1. Add "goto err;" when allocation fails.
---
drivers/usb/gadget/udc/as
From: Andrzej Hajda
In case of Gen12.50 video and compute engines, TLB_INV registers are
masked - to modify one bit, corresponding bit in upper half of the register
must be enabled, otherwise nothing happens.
Fixes: 77fa9efc16a9 ("drm/i915/xehp: Create separate reg definitions for new
MCR regis
From: Tvrtko Ursulin
As the logic for selecting the register and corresponsing values grew, the
code become a bit unsightly. Consolidate by storing the required values at
engine init time in the engine itself, and by doing so minimise the amount
of invariant platform and engine checks during each
On 13/12/2022 12:00, Nirmoy Das wrote:
Use MI_USE_GGTT instead of hardcoded value.
Signed-off-by: Nirmoy Das
Reviewed-by: Matthew Auld
On 13/12/2022 09:42, Christophe Branchereau wrote:
> Add bindings for the focaltech gpt3, which is a 640x480 3.0" 4:3
> IPS LCD Panel found in the YLM/Anbernic RG300X handheld.
>
> Signed-off-by: Christophe Branchereau
> ---
> .../display/panel/focaltech,gpt3.yaml | 59 ++
On 13/12/2022 00:41, Abhinav Kumar wrote:
>>>
>>> besides, i think i have to sent the whole series patches include this
>>> one to address your new comments on other patch.
>>>
>>> is this correct?
>>
>> No. Please fix your system first, validate your patches and send them
>> afterwards. You can no
On 12/13/22 11:53, Jagan Teki wrote:
Hi Fabio,
Hi,
On Tue, Dec 13, 2022 at 4:17 PM Fabio Estevam wrote:
Hi Jagan,
On Tue, Dec 13, 2022 at 7:40 AM Jagan Teki wrote:
https://gitlab.com/openedev/kernel/-/commits/imx8mm-dsi-v10
Please preserve the authorship of the patches.
This one is
On Tue, Dec 13, 2022 at 6:44 PM Marek Vasut wrote:
>
> On 12/13/22 11:53, Jagan Teki wrote:
> > Hi Fabio,
>
> Hi,
>
> > On Tue, Dec 13, 2022 at 4:17 PM Fabio Estevam wrote:
> >>
> >> Hi Jagan,
> >>
> >> On Tue, Dec 13, 2022 at 7:40 AM Jagan Teki
> >> wrote:
> >>
> >>> https://gitlab.com/openede
On Tue, 2022-12-13 at 00:08 +0100, Andi Shyti wrote:
> Hi Rodrigo,
>
> On Mon, Dec 12, 2022 at 11:55:10AM -0500, Rodrigo Vivi wrote:
> > On Mon, Dec 12, 2022 at 05:13:38PM +0100, Andi Shyti wrote:
> > > From: Chris Wilson
> > >
> > > After applying an engine reset, on some platforms like
> > > J
On 12/13/22 14:18, Jagan Teki wrote:
On Tue, Dec 13, 2022 at 6:44 PM Marek Vasut wrote:
On 12/13/22 11:53, Jagan Teki wrote:
Hi Fabio,
Hi,
On Tue, Dec 13, 2022 at 4:17 PM Fabio Estevam wrote:
Hi Jagan,
On Tue, Dec 13, 2022 at 7:40 AM Jagan Teki wrote:
https://gitlab.com/openedev/ke
On Tue, Dec 13, 2022 at 6:51 PM Marek Vasut wrote:
>
> On 12/13/22 14:18, Jagan Teki wrote:
> > On Tue, Dec 13, 2022 at 6:44 PM Marek Vasut wrote:
> >>
> >> On 12/13/22 11:53, Jagan Teki wrote:
> >>> Hi Fabio,
> >>
> >> Hi,
> >>
> >>> On Tue, Dec 13, 2022 at 4:17 PM Fabio Estevam wrote:
>
>
On 12/13/22 14:26, Jagan Teki wrote:
On Tue, Dec 13, 2022 at 6:51 PM Marek Vasut wrote:
On 12/13/22 14:18, Jagan Teki wrote:
On Tue, Dec 13, 2022 at 6:44 PM Marek Vasut wrote:
On 12/13/22 11:53, Jagan Teki wrote:
Hi Fabio,
Hi,
On Tue, Dec 13, 2022 at 4:17 PM Fabio Estevam wrote:
Hi
On Tue, Dec 13, 2022 at 5:50 PM Marek Szyprowski
wrote:
>
> Hi,
>
> On 13.12.2022 11:40, Jagan Teki wrote:
> > On Tue, Dec 13, 2022 at 2:28 PM Marek Szyprowski
> > wrote:
> >> On 12.12.2022 16:33, Jagan Teki wrote:
> >>
> >> On Mon, Dec 12, 2022 at 8:52 PM Marek Szyprowski
> >> wrote:
> >>
> >>
On Tue, 2022-12-13 at 13:50 +0800, Jiapeng Chong wrote:
> No functional modification involved.
>
> drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:112: warning:
> expecting prototype for intel_guc_hwconfig_init(). Prototype was for
> guc_hwconfig_init() instead.
Thank you for the patch and for a
On Tue, 13 Dec 2022 09:10:34 +0100, Christophe Branchereau wrote:
> Add binding for the AUO A030JTN01 panel, which is a 320x480 3.0" 4:3
> 24-bit TFT LCD panel with non-square pixels and a delta-RGB 8-bit
> interface.
>
> Signed-off-by: Christophe Branchereau
> Signed-off-by: Paul Cercueil
> -
On 13.12.2022 13:20, Marek Szyprowski wrote:
> On 13.12.2022 11:40, Jagan Teki wrote:
>> On Tue, Dec 13, 2022 at 2:28 PM Marek Szyprowski
>> wrote:
>>> On 12.12.2022 16:33, Jagan Teki wrote:
>>>
>>> On Mon, Dec 12, 2022 at 8:52 PM Marek Szyprowski
>>> wrote:
>>>
>>> On 12.12.2022 09:43, Marek Szy
On 13.12.2022 13:00, Nirmoy Das wrote:
Use MI_USE_GGTT instead of hardcoded value.
Signed-off-by: Nirmoy Das
---
drivers/gpu/drm/i915/gem/selftests/i915_gem_coherency.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_coherenc
On Tue, Dec 13, 2022 at 7:31 PM Marek Szyprowski
wrote:
>
> On 13.12.2022 13:20, Marek Szyprowski wrote:
> > On 13.12.2022 11:40, Jagan Teki wrote:
> >> On Tue, Dec 13, 2022 at 2:28 PM Marek Szyprowski
> >> wrote:
> >>> On 12.12.2022 16:33, Jagan Teki wrote:
> >>>
> >>> On Mon, Dec 12, 2022 at 8:
On Mon, 12 Dec 2022 10:33:12 +0100, Konrad Dybcio wrote:
> Add bindings for the display hardware on SM8150.
>
> Signed-off-by: Konrad Dybcio
> ---
> .../bindings/display/msm/qcom,sm8150-dpu.yaml | 92 +
> .../display/msm/qcom,sm8150-mdss.yaml | 330 ++
> 2 files ch
On Tue, Dec 13, 2022 at 07:46:32AM -0600, Rob Herring wrote:
>
> On Tue, 13 Dec 2022 09:10:34 +0100, Christophe Branchereau wrote:
> > Add binding for the AUO A030JTN01 panel, which is a 320x480 3.0" 4:3
> > 24-bit TFT LCD panel with non-square pixels and a delta-RGB 8-bit
> > interface.
> >
> >
On Tue, Dec 13, 2022 at 08:15:20PM +0800, Jiasheng Jiang wrote:
> Thanks, I found my mistake and I will submit a v2.
>
> > And how did you find this potential problem? What tool did you use and
> > why did you not follow the documentation for properly describing the
> > tool?
>
> I used a tool I
On Tue, Dec 13, 2022 at 08:21:16PM +0800, Jiasheng Jiang wrote:
> Add the check for the return value of dma_alloc_coherent
> in order to avoid NULL pointer dereference.
>
> Fixes: 055276c13205 ("usb: gadget: add Aspeed ast2600 udc driver")
> Signed-off-by: Jiasheng Jiang
Again, please prove that
On 13.12.2022 13:39, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
As the logic for selecting the register and corresponsing values grew, the
code become a bit unsightly. Consolidate by storing the required values at
engine init time in the engine itself, and by doing so minimise the amount
of inv
On 13.12.2022 15:18, Jagan Teki wrote:
> On Tue, Dec 13, 2022 at 7:31 PM Marek Szyprowski
> wrote:
>> On 13.12.2022 13:20, Marek Szyprowski wrote:
>>> On 13.12.2022 11:40, Jagan Teki wrote:
On Tue, Dec 13, 2022 at 2:28 PM Marek Szyprowski
wrote:
> On 12.12.2022 16:33, Jagan Teki wro
This fixes PLL being unable to lock, and is derived from an equivalent
downstream commit.
Available LT9611 documentation does not list this register, neither does
LT9611UXC (which is a different chip).
This commit has been confirmed to fix HDMI output on DragonBoard 845c.
Suggested-by: Amit Pund
On Fri, Dec 09, 2022 at 11:35:23AM +0100, Johan Hovold wrote:
> On Wed, Dec 07, 2022 at 02:00:11PM -0800, Bjorn Andersson wrote:
> > From: Bjorn Andersson
> >
> > The SC8280XP CRD has a EDP display on MDSS0 DP3, enable relevant nodes
> > and link it together with the backlight control.
> >
> > S
On Tue, Dec 13, 2022 at 8:24 PM Marek Szyprowski
wrote:
>
> On 13.12.2022 15:18, Jagan Teki wrote:
> > On Tue, Dec 13, 2022 at 7:31 PM Marek Szyprowski
> > wrote:
> >> On 13.12.2022 13:20, Marek Szyprowski wrote:
> >>> On 13.12.2022 11:40, Jagan Teki wrote:
> On Tue, Dec 13, 2022 at 2:28 PM
On 13/12/2022 14:52, Andrzej Hajda wrote:
On 13.12.2022 13:39, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
As the logic for selecting the register and corresponsing values grew,
the
code become a bit unsightly. Consolidate by storing the required
values at
engine init time in the engine its
Hi,
On Mon, Dec 12, 2022 at 4:24 PM Konrad Dybcio wrote:
>
> Add support for matching QFPROM fuse values to get the correct speed bin
> on A650 (SM8250) GPUs.
>
> Signed-off-by: Konrad Dybcio
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 17 +
> 1 file changed, 17 insertions(+
On 13.12.2022 16:23, Doug Anderson wrote:
> Hi,
>
> On Mon, Dec 12, 2022 at 4:24 PM Konrad Dybcio
> wrote:
>>
>> Add support for matching QFPROM fuse values to get the correct speed bin
>> on A650 (SM8250) GPUs.
>>
>> Signed-off-by: Konrad Dybcio
>> ---
>> drivers/gpu/drm/msm/adreno/a6xx_gp
On 13.12.2022 16:15, Jagan Teki wrote:
> On Tue, Dec 13, 2022 at 8:24 PM Marek Szyprowski
> wrote:
>> On 13.12.2022 15:18, Jagan Teki wrote:
>>> On Tue, Dec 13, 2022 at 7:31 PM Marek Szyprowski
>>> wrote:
On 13.12.2022 13:20, Marek Szyprowski wrote:
> On 13.12.2022 11:40, Jagan Teki wrot
On Tue, 15 Nov 2022 at 12:27, Pin-yen Lin wrote:
>
> Add caching when EDID is read, and invalidate the cache until the
> bridge detects HPD low or sink count changes on HPD_IRQ.
>
> It takes 1.2s for IT6505 bridge to read a 3-block EDID, and skipping
> one EDID read would be a notable difference o
On Tue, Dec 13, 2022 at 07:10:14AM -0800, Bjorn Andersson wrote:
> On Fri, Dec 09, 2022 at 11:35:23AM +0100, Johan Hovold wrote:
> > > + edp_reg_en: edp-reg-en-state {
> > > + pins = "gpio25";
> > > + function = "gpio";
> > > + output-enable;
> >
> > 'output-enable' is no
On 12/13/22 05:23, Pekka Paalanen wrote:
> On Mon, 12 Dec 2022 13:21:27 -0500
> Harry Wentland wrote:
>
>> Drivers might not support all colorspaces defined in
>> dp_colorspaces and hdmi_colorspaces. This results in
>> undefined behavior when userspace is setting an
>> unsupported colorspace.
On Tue, Dec 13, 2022 at 02:23:32PM +, Jiaxin Yu (俞家鑫) wrote:
> On Mon, 2022-12-05 at 12:07 +, Mark Brown wrote:
> > On Mon, Dec 05, 2022 at 09:34:17AM +, Jiaxin Yu (俞家鑫) wrote:
> > No, I mean that if you want to control the enable and disable of the
> > output path you should implement
On 12/13/22 05:34, Pekka Paalanen wrote:
> Sorry, hand slipped on keyboard and sent out a draft of this email too
> early.
>
>
> On Mon, 12 Dec 2022 13:21:27 -0500
> Harry Wentland wrote:
>
>> Drivers might not support all colorspaces defined in
>> dp_colorspaces and hdmi_colorspaces. This r
On 12/13/22 05:39, Pekka Paalanen wrote:
> On Mon, 12 Dec 2022 13:21:25 -0500
> Harry Wentland wrote:
>
>> This allows us to use strongly typed arguments.
>>
>> Signed-off-by: Harry Wentland
>> Cc: Pekka Paalanen
>> Cc: Sebastian Wick
>> Cc: vitaly.pros...@amd.com
>> Cc: Uma Shankar
>> Cc:
On Tue, 13 Dec 2022 at 20:33, Robert Foss wrote:
>
> This fixes PLL being unable to lock, and is derived from an equivalent
> downstream commit.
>
> Available LT9611 documentation does not list this register, neither does
> LT9611UXC (which is a different chip).
>
> This commit has been confirmed
On Tue, Dec 13, 2022 at 05:56:30AM -0800, KernelCI bot wrote:
The KernelCI bisection bot found regressions in at least two KMS tests
in the Renesas tree on rk3399-gru-kevin just after the Renesas tree
merged up mainline:
igt-kms-rockchip.kms_vblank.pipe-A-wait-forked
igt-kms-rockchip.kms_v
On Sat, Dec 10, 2022 at 08:43:47AM +0530, Sumit Semwal wrote:
> Hi Christian,
>
> On Fri, 9 Dec 2022 at 12:45, Christian König
> wrote:
> >
> > The init order and resulting error handling in dma_buf_export
> > was pretty messy.
> >
> > Subordinate objects like the file and the sysfs kernel object
We have more handhelds in the One XPLAYER lineup now that needs support added
to the orientation-quirks.
By adding more native resolution checks and the one unique BIOS variant
available we add support to most devices.
Signed-off-by: Matthew Anderson
---
.../gpu/drm/drm_panel_orientation_quirk
On 12/12/22 19:21, Harry Wentland wrote:
> This will let us pass kms_hdr.bpc_switch.
>
> I don't see any good reasons why we still need to
> limit bpc to 8 bpc and doing so is problematic when
> we enable HDR.
>
> If I remember correctly there might have been some
> displays out there where the a
On 12/13/2022 5:13 AM, Krzysztof Kozlowski wrote:
On 13/12/2022 00:41, Abhinav Kumar wrote:
besides, i think i have to sent the whole series patches include this
one to address your new comments on other patch.
is this correct?
No. Please fix your system first, validate your patches and s
Am 13.12.22 um 18:09 schrieb Daniel Vetter:
On Sat, Dec 10, 2022 at 08:43:47AM +0530, Sumit Semwal wrote:
Hi Christian,
On Fri, 9 Dec 2022 at 12:45, Christian König
wrote:
The init order and resulting error handling in dma_buf_export
was pretty messy.
Subordinate objects like the file and th
On 13/12/2022 18:31, Abhinav Kumar wrote:
>
>
> On 12/13/2022 5:13 AM, Krzysztof Kozlowski wrote:
>> On 13/12/2022 00:41, Abhinav Kumar wrote:
>
> besides, i think i have to sent the whole series patches include this
> one to address your new comments on other patch.
>
> is th
Select color format for EFI/VESA firmware scanout buffer from the
number of bits per pixel and the position of the individual color
components. Fixes the selected format for the buffer in several odd
cases. For example, XRGB1555 has been reported as ARGB1555 because
of the different use of depth an
Add dedicated helper to convert from XRGB to ARGB2101010. Sets
all alpha bits to make pixels fully opaque.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_format_helper.c | 58 -
.../gpu/drm/tests/drm_format_helper_test.c| 63 +++
includ
Fix the selection of the fbdev emulation's color format and make
XRGB the only emulated color format. Resolves the blank screen
in cases where video= specifies an unsupported color format. Also
resolves the issues around current format-conversion helpers.
DRM drivers usually pick a default for
Upcoming changes to the format conversion will mostly blit from
XRGB to some other format. So put the source format in blit's
outer branches to make the code more readable. For cases where
a format only changes its endianness, such as XRGB565, introduce
dedicated branches that handle this for a
Add conversion from XRGB to XRGB1555, ARGB1555 and RGBA5551, which
are the formats currently supported by the simplefb infrastructure. The
new helpers allow the output of XRGB framebuffers to firmware
scanout buffers in one of the 15-bit formats.
Signed-off-by: Thomas Zimmermann
---
driv
Split the single-probe helper's implementation into multiple
functions and get locking and overallocation out of the way of
the surface setup. Simplifies later changes to the setup code.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_fb_helper.c | 116
The DRM helper drm_fb_build_fourcc_list() creates a list of color
formats for primary planes of the generic drivers. Simplify the helper:
- It used to mix and filter native and emulated formats as provided
by the driver. Now the only emulated format is XRGB, which is
required as fallbac
Fix the color-format selection of the single-probe helper. Go
through all user-specified values and test each for compatibility
with the driver. If none is supported, use the driver-provided
default. This guarantees that the console is always available in
any color format at least.
Until now, the
Add dedicated helper to convert from XRGB to ARGB. Sets
all alpha bits to make pixels fully opaque.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_format_helper.c | 53 +++-
.../gpu/drm/tests/drm_format_helper_test.c| 63 +++
include/dr
Drivers only emulate XRGB framebuffers. Remove all conversion
helpers that do not use XRGB as their source format. Also remove
some special cases for alpha formats in the blit helper.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/drm_format_helper.c | 75 --
On Mon, Dec 12, 2022 at 6:56 PM Dave Airlie wrote:
>
> There are a bunch of conflicts, one in amdgpu is a bit nasty, I've
> cc'ed Christian/Alex to make sure they know to check whatever
> resolution you find. The one I have is what we have in drm-tip tree.
Hmm. My merge resolution is slightly dif
The pull request you sent on Tue, 13 Dec 2022 12:56:25 +1000:
> git://anongit.freedesktop.org/drm/drm tags/drm-next-2022-12-13
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/a594533df0f6ca391da003f43d53b336a2d23ffa
Thank you!
--
Deet-doot-dot, I am a bot.
https://ko
https://bugzilla.kernel.org/show_bug.cgi?id=216806
Bug ID: 216806
Summary: [Raven Ridge] console disappears after framebuffer
device loads
Product: Drivers
Version: 2.5
Kernel Version: 6.0.8
Hardware: AMD
https://bugzilla.kernel.org/show_bug.cgi?id=216806
Alex Deucher (alexdeuc...@gmail.com) changed:
What|Removed |Added
CC||alexdeuc...@gmail.c
https://bugzilla.kernel.org/show_bug.cgi?id=216805
kolAflash (kolafl...@kolahilft.de) changed:
What|Removed |Added
Hardware|All |AMD
--
You may repl
On 12/6/2022 12:02 AM, Jiasheng Jiang wrote:
As kzalloc may fail and return NULL pointer,
it should be better to check pstates
in order to avoid the NULL pointer dereference.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Jiasheng Jiang
Once again, your lines are wr
On 11/18/2022 9:55 PM, Hui Tang wrote:
Because of the possilble failure of devm_kzalloc(), dpu_wb_conn might
be NULL and will cause null pointer derefrence later.
derefrence --> dereference
Therefore, it might be better to check it and directly return -ENOMEM.
Fixes: 77b001acdcfe ("drm/msm
Add DP both data-lanes and link-frequencies property to dp_out endpoint and
support
functions to DP driver.
Kuogee Hsieh (5):
arm64: dts: qcom: add data-lanes and link-freuencies into dp_out
endpoint
dt-bindings: msm/dp: add data-lanes and link-frequencies property
drm/msm/dp: parser da
Add both data-lanes and link-frequencies property into endpoint
Changes in v7:
-- split yaml out of dtsi patch
-- link-frequencies from link rate to symbol rate
-- deprecation of old data-lanes property
Changes in v8:
-- correct Bjorn mail address to kernel.org
Changes in v10:
-- add menu item t
Move data-lanes property from mdss_dp node to dp_out endpoint. Also
add link-frequencies property into dp_out endpoint as well. The last
frequency specified at link-frequencies will be the max link rate
supported by DP.
Changes in v5:
-- revert changes at sc7180.dtsi and sc7280.dtsi
-- add &dp_out
Add capability to parser data-lanes as property of dp_out endpoint.
Also retain the original capability to parser data-lanes as property
of mdss_dp node to handle legacy case.
Changes in v6:
-- first patch after split parser patch into two
Changes in v7:
-- check "data-lanes" from endpoint first
By default, HBR2 (5.4G) is the max link link be supported. This patch uses the
actual limit specified by DT and removes the artificial limitation to 5.4 Gbps.
Supporting HBR3 is a consequence of that.
Changes in v2:
-- add max link rate from dtsi
Changes in v3:
-- parser max_data_lanes and max_dp
Add capability to parser and retrieve max DP link supported rate from
link-frequencies property of dp_out endpoint.
Changes in v6:
-- second patch after split parser patch into two patches
Changes in v7:
-- without checking cnt against DP_MAX_NUM_DP_LANES to retrieve link rate
Changes in v9:
--
On 12/1/2022 11:54 AM, Dmitry Baryshkov wrote:
On 30/11/2022 22:09, Adam Skladowski wrote:
Follow other YAMLs and replace mdss name into display-subystem.
Signed-off-by: Adam Skladowski
Reviewed-by: Dmitry Baryshkov
Going to add two fixes tags here as we are touching two chipsets:
Fix
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