As kzalloc may fail and return NULL pointer,
it should be better to check pstates
in order to avoid the NULL pointer dereference
later.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Jiasheng Jiang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
1 file changed, 2 ins
As kzalloc may fail and return NULL pointer,
it should be better to check pstates
in order to avoid the NULL pointer dereference.
Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Jiasheng Jiang
---
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 ++
1 file changed, 2 insertion
As kzalloc may fail and return NULL pointer,
it should be better to check cstate
in order to avoid the NULL pointer dereference
in __drm_atomic_helper_crtc_reset.
Fixes: 1cff7440a86e ("drm/msm: Convert to using
__drm_atomic_helper_crtc_reset() for reset.")
Signed-off-by: Jiasheng Jiang
---
driv
On Mon, Dec 05, 2022 at 05:19:06PM -0800, Daniele Ceraolo Spurio wrote:
> If the GSC was loaded, the only way to stop it during the driver unload
> flow is to do a driver-FLR.
> The driver-initiated FLR is not the same as PCI config space FLR in
> that it doesn't reset the SGUnit and doesn't modify
On 05.12.22 16:37, Frieder Schrempf wrote:
> Hi Dave,
>
> On 05.12.22 16:20, Dave Stevenson wrote:
>> Hi Frieder
>>
>> On Mon, 5 Dec 2022 at 07:30, Frieder Schrempf
>> wrote:
>>>
>>> On 02.12.22 15:55, Dave Stevenson wrote:
Hi Marek
On Fri, 2 Dec 2022 at 12:21, Marek Vasut wrote:
Hi Carlo,
On 06/12/2022 09:34, Carlo Caione wrote:
For platforms using simplefb / efifb, call
drm_aperture_remove_framebuffers() to remove the conflicting
framebuffer.
Conflicting framebuffer on the SPI display ? How is that possible ?
The meson_drm should already do this, no ?
Neil
Signe
Date: Thu, 10 Nov 2022 16:47:26 +0300
Subject: [PATCH] drm/amdgpu/display: Add pointer check
Return value of a function 'dc_create_state' is
dereferenced at amdgpu_dm.c:2027 without checking for null
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Denis Arefev
-
Hi
Am 06.12.22 um 10:41 schrieb Neil Armstrong:
Hi Carlo,
On 06/12/2022 09:34, Carlo Caione wrote:
For platforms using simplefb / efifb, call
drm_aperture_remove_framebuffers() to remove the conflicting
framebuffer.
Conflicting framebuffer on the SPI display ? How is that possible ?
Callin
Hi Jani
May I have your comment about this patch?
BTW, this is the link to the binary EDID,
https://gitlab.freedesktop.org/drm/intel/-/issues/6153#note_1558419.
Thank you.
Regards
William
-Original Message-
From: Tseng, William
Sent: Tuesday, September 20, 2022 4:23 PM
To: Jani Nikul
Return value of a function 'dc_create_state' is
dereferenced at amdgpu_dm.c:2027 without checking for null
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Denis Arefev
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +++-
1 file changed, 3 insertions(+
Am 06.12.22 um 11:47 schrieb Denis Arefev:
Return value of a function 'dc_create_state' is
dereferenced at amdgpu_dm.c:2027 without checking for null
Found by Linux Verification Center (linuxtesting.org) with SVACE.
Signed-off-by: Denis Arefev
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu
On 05/12/2022 18:44, Michal Wajdeczko wrote:
On 05.12.2022 14:16, Tvrtko Ursulin wrote:
On 02/12/2022 20:14, John Harrison wrote:
and while for dbg level messages it doesn't matter, I assume we should
be consistent for err/warn/info messages (as those will eventually show
up to the end user
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by host to ASP must be a real physical
address and the pages must be physically contiguous.
In a virtualized environment though, when the driver is running in a
guest VM, the pages allocated by __get_fre
Am 06.12.22 um 13:30 schrieb Rijo Thomas:
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by host to ASP must be a real physical
address and the pages must be physically contiguous.
In a virtualized environment though, when the driver is running in
On Mon, 05 Dec 2022 15:08:11 -0800, Kuogee Hsieh wrote:
> Add both data-lanes and link-frequencies property into endpoint
>
> Changes in v7:
> -- split yaml out of dtsi patch
> -- link-frequencies from link rate to symbol rate
> -- deprecation of old data-lanes property
>
> Changes in v8:
> --
On 12/6/2022 6:11 PM, Christian König wrote:
> Am 06.12.22 um 13:30 schrieb Rijo Thomas:
>> For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
>> ring buffer address sent by host to ASP must be a real physical
>> address and the pages must be physically contiguous.
>>
>> In a
Thanks Christian/TJ for all your inputs!!
On 11/24/2022 6:25 PM, Christian König wrote:
>>> I was already wondering why the order is this way.
>>>
>>> Why is dma_buf_stats_setup() needing the file in the first place?
>>
>> dmabuf->file will be used in dma_buf_stats_setup(), the
>> dma_buf_stats_s
Am 06.12.22 um 13:54 schrieb Rijo Thomas:
On 12/6/2022 6:11 PM, Christian König wrote:
Am 06.12.22 um 13:30 schrieb Rijo Thomas:
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by host to ASP must be a real physical
address and the pages must be p
Am 06.12.22 um 13:55 schrieb Charan Teja Kalla:
Thanks Christian/TJ for all your inputs!!
On 11/24/2022 6:25 PM, Christian König wrote:
I was already wondering why the order is this way.
Why is dma_buf_stats_setup() needing the file in the first place?
dmabuf->file will be used in dma_buf_sta
On 12/6/2022 6:26 PM, Christian König wrote:
> Am 06.12.22 um 13:54 schrieb Rijo Thomas:
>>
>> On 12/6/2022 6:11 PM, Christian König wrote:
>>> Am 06.12.22 um 13:30 schrieb Rijo Thomas:
For AMD Secure Processor (ASP) to map and access TEE ring buffer, the
ring buffer address sent by ho
Hi Tomi,
On Tue, Dec 6, 2022 at 2:45 PM Tomi Valkeinen
wrote:
> On 05/12/2022 12:10, Geert Uytterhoeven wrote:
> > On Thu, Dec 1, 2022 at 10:56 AM Tomi Valkeinen
> > wrote:
> >>
> >> Add DT nodes needed for the mini DP connector. The DP is driven by
> >> sn65dsi86, which in turn gets the pixel d
On 06/12/2022 15:39, Tomi Valkeinen wrote:
From: Tomi Valkeinen
Hi,
These add new pixel formats for Renesas V3U and V4H SoCs.
As the display pipeline is split between DRM and V4L2 components, this
series touches both subsystems. I'm sending all these together to
simplify review. If needed, I
On Sat, Dec 3, 2022 at 11:18 AM Heiko Stübner wrote:
> Though in past projects I've seen the same display-controller used with
> different panels (and different dsi-init-sequences). In one project the
> display manufacturer even EOL'ed the first panel and provided a replacement
> with said same d
On 12/6/22 10:52, Thomas Zimmermann wrote:
> Hi
>
> Am 06.12.22 um 10:41 schrieb Neil Armstrong:
>> Hi Carlo,
>>
>> On 06/12/2022 09:34, Carlo Caione wrote:
>>> For platforms using simplefb / efifb, call
>>> drm_aperture_remove_framebuffers() to remove the conflicting
>>> framebuffer.
>>
>> Confli
On Sat, Dec 3, 2022 at 8:01 PM Chris Morgan wrote:
> Will do. I'll make the changes and resubmit. For what it's worth the
> documentation says this one is a Samsung AMS495QA01 panel on a
> Magnachip D53E6EA8966 controller IC.
I would name the driver panel-magnachip-d53e6ea8966.c and
KConfig PANE
Hi Tomi,
On Tue, Dec 6, 2022 at 2:44 PM Tomi Valkeinen
wrote:
> Add new pixel formats: XBGR2101010, ABGR2101010, BGRA1010102 and Y210.
>
> Signed-off-by: Tomi Valkeinen
Thanks for your patch!
> --- a/drivers/media/platform/renesas/vsp1/vsp1_rpf.c
> +++ b/drivers/media/platform/renesas/vsp1/vsp
The init order and resulting error handling in dma_buf_export
was pretty messy.
Subordinate objects like the file and the sysfs kernel objects
were initializing and wiring itself up with the object in the
wrong order resulting not only in complicating and partially
incorrect error handling, but al
Hi,
On Mon, Dec 5, 2022 at 11:55 PM Miaoqian Lin wrote:
>
> of_icc_get() alloc resources for path1, we should release it when not
> need anymore. Early return when IS_ERR_OR_NULL(path0) may leak path1.
> Add icc_put(path1) in the error path to fix this.
>
> Fixes: b9364eed9232 ("drm/msm/dpu: Move
On 06/12/2022 03:00, nathan.lu wrote:
> From: Nathan Lu
>
> modify VDOSYS0 mmsys device tree Documentations for MT8188.
>
> Signed-off-by: Nathan Lu
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
Den 30.11.2022 20.26, skrev Noralf Trønnes via B4 Submission Endpoint:
> Hi,
>
> I have started to look at igt for testing and want to use CRC tests. To
> implement support for this I need to move away from the simple kms
> helper.
>
> When looking around for examples I came across Thomas' nic
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 5d562c48a21eeb029a8fd3f18e1b31fd83660474 Add linux-next specific
files for 20221206
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202211231857.0dmueoa1-...@intel.com
https
>-Original Message-
>From: dri-devel On Behalf Of
>Christian König
>Sent: Tuesday, December 6, 2022 10:12 AM
>To: quic_chara...@quicinc.com; cuigaoshe...@huawei.com;
>tjmerc...@google.com; sumit.sem...@linaro.org
>Cc: linaro-mm-...@lists.linaro.org; dri-devel@lists.freedesktop.org; linux-
On 12/6/2022 12:05 AM, Jiasheng Jiang wrote:
As kzalloc may fail and return NULL pointer,
it should be better to check cstate
in order to avoid the NULL pointer dereference
in __drm_atomic_helper_crtc_reset.
You have wrapped around your lines too short. Please try to utilize the
full word l
https://bugzilla.kernel.org/show_bug.cgi?id=216780
Bug ID: 216780
Summary: problem of Mesa drawing boxes after resume from
suspend with Geforce4 420 Go
Product: Drivers
Version: 2.5
Kernel Version: 5.15.79-desktop586
Ha
https://bugzilla.kernel.org/show_bug.cgi?id=216780
--- Comment #1 from Elmar Stellnberger (estel...@elstel.org) ---
Created attachment 303369
--> https://bugzilla.kernel.org/attachment.cgi?id=303369&action=edit
after resume from s2ram: screen distortions in the status tray and on moving
the Pidg
https://bugzilla.kernel.org/show_bug.cgi?id=216780
--- Comment #2 from Elmar Stellnberger (estel...@elstel.org) ---
Created attachment 303370
--> https://bugzilla.kernel.org/attachment.cgi?id=303370&action=edit
after resume from s2ram: the background box of the login screen is not drawn
--
You
https://bugzilla.kernel.org/show_bug.cgi?id=216780
--- Comment #3 from Elmar Stellnberger (estel...@elstel.org) ---
Created attachment 303371
--> https://bugzilla.kernel.org/attachment.cgi?id=303371&action=edit
before resume from s2ram: background box of login screen is drawn correctly
just tes
Thanks Christian for this nice cleanup!!
On 12/6/2022 8:42 PM, Christian König wrote:
> @@ -638,10 +630,21 @@ struct dma_buf *dma_buf_export(const struct
> dma_buf_export_info *exp_info)
> if (!try_module_get(exp_info->owner))
> return ERR_PTR(-ENOENT);
>
> + file = dma_
https://bugzilla.kernel.org/show_bug.cgi?id=216780
Artem S. Tashkinov (a...@gmx.com) changed:
What|Removed |Added
Status|NEW |RESOLVED
Reso
Hi,
Le mardi 06 décembre 2022 à 15:39 +0200, Tomi Valkeinen a écrit :
> Add XBGR2101010, ABGR2101010 and BGRA1010102 formats.
>
> Signed-off-by: Tomi Valkeinen
This patch is simply missing an update to
Documentation/userspace-api/media/v4l/pixfmt-rgb.rst
regards,
Nicolas
> ---
> drivers/med
Hi,
Le mardi 06 décembre 2022 à 15:39 +0200, Tomi Valkeinen a écrit :
> Add Y210, Y212 and Y216 formats.
>
> Signed-off-by: Tomi Valkeinen
This patch is simply missing an update to:
Documentation/userspace-api/media/v4l/yuv-formats.rst
regards,
Nicolas
> ---
> drivers/media/v4l2-core/v4l2-i
On 01/12/2022 18:43, Niranjana Vishwanathapura wrote:
On Thu, Dec 01, 2022 at 07:27:31AM -0800, Niranjana Vishwanathapura wrote:
On Thu, Dec 01, 2022 at 10:49:15AM +, Matthew Auld wrote:
On 29/11/2022 07:26, Niranjana Vishwanathapura wrote:
Support dump capture of persistent mappings upon
https://bugzilla.kernel.org/show_bug.cgi?id=216780
--- Comment #5 from Elmar Stellnberger (estel...@elstel.org) ---
done: https://gitlab.freedesktop.org/drm/nouveau/-/issues/194
--
You may reply to this email to add a comment.
You are receiving this mail because:
You are watching the assignee o
On 05/12/2022 19:58, Christian König wrote:
Am 30.11.22 um 15:06 schrieb Daniel Vetter:
On Wed, 30 Nov 2022 at 14:03, Tvrtko Ursulin
wrote:
On 29/11/2022 18:05, Matthew Auld wrote:
On Fri, 25 Nov 2022 at 11:14, Tvrtko Ursulin
wrote:
+ Matt
On 25/11/2022 10:21, Christian König wrote:
TTM i
Am 06.12.22 um 19:03 schrieb Matthew Auld:
On 05/12/2022 19:58, Christian König wrote:
Am 30.11.22 um 15:06 schrieb Daniel Vetter:
On Wed, 30 Nov 2022 at 14:03, Tvrtko Ursulin
wrote:
On 29/11/2022 18:05, Matthew Auld wrote:
On Fri, 25 Nov 2022 at 11:14, Tvrtko Ursulin
wrote:
+ Matt
On 25
On Sun, Dec 4, 2022 at 12:45 PM Dmitry Osipenko
wrote:
>
> On 11/30/22 21:57, Rob Clark wrote:
> > From: Rob Clark
> >
> > drm_gem_shmem_mmap() doesn't own this reference, resulting in the GEM
> > object getting prematurely freed leading to a later use-after-free.
> >
> > Link: https://syzkaller.
Am 06.12.22 um 17:20 schrieb Ruhl, Michael J:
-Original Message-
From: dri-devel On Behalf Of
Christian König
Sent: Tuesday, December 6, 2022 10:12 AM
To: quic_chara...@quicinc.com; cuigaoshe...@huawei.com;
tjmerc...@google.com; sumit.sem...@linaro.org
Cc: linaro-mm-...@lists.linaro.org;
On Wed, 30 Nov 2022 21:09:38 +0100, Adam Skladowski wrote:
> This patch series adds bunch of new nodes
> also it fixes some small nitpicks in yamls and adds compatible.
>
> Changes since v1
>
> 1. Changed title for mdss yaml patch
> 2. Added missing dmas to spi0
> 3. Wired freq do
On Tue, 1 Nov 2022 17:17:59 +0100, Luca Weiss wrote:
> Document the compatible for the wled block found in PMI8950.
>
>
Applied, thanks!
[2/2] arm64: dts: qcom: Add configuration for PMI8950 peripheral
commit: 0d97fdf380b478c358c94f50f1b942e87f407b9b
Best regards,
--
Bjorn Andersson
Le lundi 05 décembre 2022 à 09:28 +0100, Christian König a écrit :
> Hi Tomasz,
>
> Am 05.12.22 um 07:41 schrieb Tomasz Figa:
> > [SNIP]
> > > In other words explicit ownership transfer is not something we would
> > > want as requirement in the framework, cause otherwise we break tons of
> > > use
Am 06.12.22 um 19:26 schrieb Nicolas Dufresne:
Le lundi 05 décembre 2022 à 09:28 +0100, Christian König a écrit :
Hi Tomasz,
Am 05.12.22 um 07:41 schrieb Tomasz Figa:
[SNIP]
In other words explicit ownership transfer is not something we would
want as requirement in the framework, cause otherw
On Tue, Dec 6, 2022 at 7:12 AM Christian König
wrote:
>
> The init order and resulting error handling in dma_buf_export
> was pretty messy.
>
> Subordinate objects like the file and the sysfs kernel objects
> were initializing and wiring itself up with the object in the
> wrong order resulting not
From: Rob Clark
In cases where implicit sync is used, it is still useful (for things
like sub-allocation, etc) to allow userspace to opt-out of implicit
sync on per-BO basis.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/msm/msm_drv.c| 3 ++-
drivers/gpu/drm/msm/msm_gem_submit.c | 11 +
On 12/2/2022 12:30 PM, Akhil P Oommen wrote:
> On 12/2/2022 4:27 AM, Bjorn Andersson wrote:
>> On Wed, Oct 05, 2022 at 02:36:58PM +0530, Akhil P Oommen wrote:
>> @Ulf, Akhil has a power-domain for a piece of hardware which may be
>> voted active by multiple different subsystems (co-processors/execu
On 12/5/2022 2:10 PM, Dan Carpenter wrote:
> On Sun, Dec 04, 2022 at 04:11:41AM +0530, Akhil P Oommen wrote:
>> Fix the below kernel panic due to null pointer access:
>> [ 18.504431] Unable to handle kernel NULL pointer dereference at virtual
>> address 0048
>> [ 18.513464] Mem abo
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only one of the tiles is used for control events pe
Apologies, ignore this - typo on rev count - will resend with proper v10
subject (and cancel CI)
On Tue, 2022-12-06 at 13:27 -0800, Teres Alexis, Alan Previn wrote:
> Starting with MTL, there will be two GT-tiles, a render and media
> tile. PXP as a service for supporting workloads with protected
Starting with MTL, there will be two GT-tiles, a render and media
tile. PXP as a service for supporting workloads with protected
contexts and protected buffers can be subscribed by process
workloads on any tile. However, depending on the platform,
only one of the t iles is used for control events p
Hi Christian,
I love your patch! Yet something to improve:
[auto build test ERROR on v6.1-rc8]
[also build test ERROR on linus/master]
[cannot apply to drm-misc/drm-misc-next next-20221206]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
Hi Christian,
I love your patch! Yet something to improve:
[auto build test ERROR on v6.1-rc8]
[also build test ERROR on linus/master]
[cannot apply to drm-misc/drm-misc-next next-20221206]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we
On 25/11/2022 08:01, Abhinav Kumar wrote:
On 11/23/2022 1:04 PM, Dmitry Baryshkov wrote:
On sm8450 a register block was removed from MDP TOP. Accessing it during
snapshotting results in NoC errors / immediate reboot. Skip accessing
these registers during snapshot.
Tested-by: Vinod Koul
Revie
From: Xu Panda
The implementation of strscpy() is more robust and safer.
That's now the recommended way to copy NUL terminated strings.
Signed-off-by: Xu Panda
Signed-off-by: Yang Yang
---
drivers/gpu/drm/nouveau/nvkm/core/firmware.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
di
From: Xu Panda
The implementation of strscpy() is more robust and safer.
That's now the recommended way to copy NUL terminated strings.
Signed-off-by: Xu Panda
Signed-off-by: Yang Yang
---
drivers/gpu/drm/virtio/virtgpu_vq.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
This adds support for the MDSS/DPU/DSI on the Qualcomm SM8450 platform.
Change since v5:
- Added defines to be used for the MDP_PERIPH_TOP0 blackhole
Change since v4:
- Fixed commit messages for the first two patches (Krzysztof)
- Dropped clock-names requirement patch
- Removed clock-names from q
Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
SM8450 platform.
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Baryshkov
---
.../bindings/display/msm/qcom,sm8450-dpu.yaml | 139 +++
.../display/msm/qcom,sm8450-mdss.yaml | 343 ++
2 f
Add support for DSI 2.6.0 (block used on sm8450).
Tested-by: Vinod Koul
Reviewed-by: Vinod Koul
Reviewed-by: Konrad Dybcio
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/dsi/dsi_cfg.c | 2 ++
drivers/gpu/drm/msm/dsi/dsi_cfg.h | 1 +
2 files changed, 3 inse
Require only properties declared in given schema, which makes the code a
bit more readable and easy to follow.
Suggested-by: Krzysztof Kozlowski
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/mdss-common.yaml | 1 -
.../device
In preparation to adding the sm8350 and sm8450 PHYs support, rearrange
register values calculations in dsi_7nm_phy_enable(). This change bears
no functional changes itself, it is merely a preparation for the next
patch.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/
Require only properties declared in given schema, which makes the code a
bit more readable and easy to follow.
Suggested-by: Krzysztof Kozlowski
Reviewed-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Baryshkov
---
.../devicetree/bindings/display/msm/dpu-common.yaml| 4
.../devicet
SM8350 and SM8450 platforms use the same driver and same bindings as the
existing 7nm DSI PHYs. Add corresponding compatibility strings.
Acked-by: Krzysztof Kozlowski
Signed-off-by: Dmitry Baryshkov
---
Documentation/devicetree/bindings/display/msm/dsi-phy-7nm.yaml | 2 ++
1 file changed, 2 ins
Add definitions for the display hardware used on Qualcomm SM8450
platform.
Tested-by: Vinod Koul
Reviewed-by: Vinod Koul
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
.../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c| 224 ++
.../gpu/drm/msm/disp/dpu1/dpu_hw_cata
SM8350 and SM8450 use 5nm DSI PHYs, which share register definitions
with 7nm DSI PHYs. Rather than duplicating the driver, handle 5nm
variants inside the common 5+7nm driver.
Co-developed-by: Robert Foss
Tested-by: Vinod Koul
Reviewed-by: Vinod Koul
Reviewed-by: Konrad Dybcio
Signed-off-by: D
There is a separate header containing some of MDP TOP register
definitions, dpu_hwio.h. Move missing register definitions from
dpu_hw_top.c to the mentioned header.
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c | 25 --
drivers/gpu/drm/msm/dis
Add support for the MDSS block on SM8450 platform.
Tested-by: Vinod Koul
Reviewed-by: Vinod Koul
Reviewed-by: Konrad Dybcio
Reviewed-by: Abhinav Kumar
Signed-off-by: Dmitry Baryshkov
---
drivers/gpu/drm/msm/msm_mdss.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/m
On sm8450 a register block was removed from MDP TOP. Accessing it during
snapshotting results in NoC errors / immediate reboot. Skip accessing
these registers during snapshot.
Tested-by: Vinod Koul
Reviewed-by: Vinod Koul
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
drivers/
Add device tree nodes for MDSS, DPU and DSI devices on Qualcomm SM8450
platform. Enable these devices and add the HDMI bridge configuration on
SM8450 HDK.
Changes since v3:
- Renamed mdss node to display-subsystem@ (Krzysztof)
- Dropped empty line from the patch4 (Krzysztof)
- Renamed HDMI connect
Add another power saving state used on SM8450. Unfortunately adding it
in proper place causes renumbering of all the opp states in sm8450.dtsi
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8450.dtsi | 20
include/dt-bindings/pow
From: Vinod Koul
Add the LT9611uxc DSI-HDMI bridge and supplies
Signed-off-by: Vinod Koul
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 58 +
1 file changed, 58 insertions(+)
diff --git a/arch/arm64/boot/dts/
Enable MDSS/DPU/DSI0 on SM8450-HDK device.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts
b/arch/arm64/boot/dts/qcom/sm845
From: Vinod Koul
Add the HDMI display nodes and link it to DSI.
Signed-off-by: Vinod Koul
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 37 +
1 file changed, 37 insertions(+)
Add devices tree nodes describing display hardware on SM8450:
- Display Clock Controller
- MDSS
- MDP
- two DSI controllers and DSI PHYs
This does not provide support for DP controllers present on SM8450.
Reviewed-by: Konrad Dybcio
Signed-off-by: Dmitry Baryshkov
---
arch/arm64/boot/dts/qcom/s
On Wed, Nov 30, 2022 at 03:02:13PM +0100, Michael Riesch wrote:
> Commit 540b8f271e53 ("drm/rockchip: Embed drm_encoder into
> rockchip_decoder") provides the means to pass the endpoint ID to the
> VOP2 driver, which sets the interface MUX accordingly. However, this
> step has not yet been carried
On Wed, Nov 30, 2022 at 03:02:16PM +0100, Michael Riesch wrote:
> The Rockchip VOP2 features an internal RGB output block, which can be
> attached to the video port 2 of the VOP2. Add support for this output
> block.
>
> Signed-off-by: Michael Riesch
> ---
> drivers/gpu/drm/rockchip/rockchip_drm
of_icc_get() alloc resources for path1, we should release it when not
need anymore. Early return when IS_ERR_OR_NULL(path0) may leak path1.
Defer getting path1 to fix this.
Fixes: b9364eed9232 ("drm/msm/dpu: Move min BW request and full BW disable back
to mdss")
Signed-off-by: Miaoqian Lin
---
c
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