On 21/11/2022 10:42, Carlo Caione wrote:
SPI devices use the spi_device_id for module autoloading even on
systems using device tree.
Add the spi_device_id entry to enable autoloading for the 3.5inch RPi
Display (rpi-lcd-35).
Signed-off-by: Carlo Caione
---
drivers/gpu/drm/tiny/ili9486.c | 1
On 21/11/2022 10:42, Carlo Caione wrote:
The pixel data for the ILI9486 is always 16-bits wide and it must be
sent over the SPI bus. When the controller is only able to deal with
8-bit transfers, this 16-bits data needs to be swapped before the
sending to account for the big endian bus, this is o
On 28.11.22 23:59, Andrew Morton wrote:
On Mon, 28 Nov 2022 09:18:47 +0100 David Hildenbrand wrote:
Less chances of things going wrong that way.
Just mention in the v2 cover letter that the first patch was added to
make it easy to backport that fix without being hampered by merge
conflicts if
Hi,
This series adds support for the Verisilicon VIPNano-QI NPU in the A311D
as in the VIM3 board.
The IP is very closely based on previous Vivante GPUs, so the etnaviv
kernel driver works basically unchanged.
The userspace part of the driver is being reviewed at:
https://gitlab.freedesktop.org
This is a compute-only module marketed towards AI and vision
acceleration. This particular version can be found on the Amlogic A311D
SoC.
The feature bits are taken from the Khadas downstream kernel driver
6.4.4.3.310723AAA.
Signed-off-by: Tomeu Vizoso
---
drivers/gpu/drm/etnaviv/etnaviv_hwdb.c
Hi DRm people,
On Mon, Nov 28, 2022 at 1:02 AM Stephen Rothwell wrote:
> Today's linux-next merge of the drm tree got a conflict in:
>
> drivers/gpu/drm/amd/amdgpu/amdgpu_job.c
>
> between commits:
>
> 3cb93f390453 ("drm/amdgpu: fix use-after-free during gpu recovery")
> b09d6acba1d9 ("drm/
On 29/11/2022 09:48, David Hildenbrand wrote:
> On 28.11.22 23:59, Andrew Morton wrote:
>> On Mon, 28 Nov 2022 09:18:47 +0100 David Hildenbrand
>> wrote:
>>
Less chances of things going wrong that way.
Just mention in the v2 cover letter that the first patch was added to
make
On 29.11.22 10:08, Hans Verkuil wrote:
On 29/11/2022 09:48, David Hildenbrand wrote:
On 28.11.22 23:59, Andrew Morton wrote:
On Mon, 28 Nov 2022 09:18:47 +0100 David Hildenbrand wrote:
Less chances of things going wrong that way.
Just mention in the v2 cover letter that the first patch was
Hi Tomeu,
Am Dienstag, dem 29.11.2022 um 09:50 +0100 schrieb Tomeu Vizoso:
> This is a compute-only module marketed towards AI and vision
> acceleration. This particular version can be found on the Amlogic A311D
> SoC.
>
> The feature bits are taken from the Khadas downstream kernel driver
> 6.4.
On Fri, 25 Nov 2022, Harry Wentland wrote:
> On 10/5/22 06:51, Jani Nikula wrote:
>> Currently i915 assumes all drm_connectors it encounters are embedded in
>> intel_connectors that i915 allocated. The drm_writeback_connector forces
>> a design where this is not the case; we can't provide our own
On Fri, 25 Nov 2022, Jani Nikula wrote:
> On Fri, 25 Nov 2022, Xia Fukun wrote:
>> When (size != 0 || ptrs->lvds_ entries != 3), the program tries to
>> free() the ptrs. However, the ptrs is not created by calling kzmalloc(),
>> but is obtained by pointer offset operation.
>> This may lead to mem
Am 28.11.22 um 14:39 schrieb Simon Ser:
The code 'b' is used for dma-buf IOCTLs.
Signed-off-by: Simon Ser
Cc: Linus Torvalds
Cc: Daniel Vetter
Cc: Christian König
Cc: Sumit Semwal
Reviewed-by: Christian König
Should I also push this?
---
Documentation/userspace-api/ioctl/ioctl-numbe
On 28/11/2022 18:42, Uwe Kleine-König wrote:
> So I'd go for putting into the legacy binding what is currently done in
> arch/arm/boot/dts and the driver allowing exactly:
>
> compatible = "fsl,imx27-fb", "fsl,imx21-fb";
> compatible = "fsl,imx25-fb", "fsl,imx21-fb";
> compatible
From: "Hsia-Jun(Randy) Li"
Hello All
Currently, we assume all the pixel formats are multiple planes, devices
could support each component has its own memory plane.
But that may not apply for any device in the world. We could have a
device without IOMMU then this is not impossible.
Besides, when
On 22/11/2022 07:01, Aravind Iddamsetty wrote:
On XE_LPM+ platforms the media engines are carved out into a separate
GT but have a common GGTMMADR address range which essentially makes
the GGTT address space to be shared between media and render GT. As a
result any updates in GGTT shall invalid
Format modifiers are for the buffer layout only, not for the allocation
parameters, placement, etc. See the doc comment at the top of
drm_fourcc.h.
Hi Jani,
On Tue, Nov 29, 2022 at 11:29:45AM +0200, Jani Nikula wrote:
> On Fri, 25 Nov 2022, Harry Wentland wrote:
> > On 10/5/22 06:51, Jani Nikula wrote:
> >> Currently i915 assumes all drm_connectors it encounters are embedded in
> >> intel_connectors that i915 allocated. The drm_writeback_con
Hi Randy,
On Tue, 29 Nov 2022 at 10:11, Hsia-Jun Li wrote:
> Currently, we assume all the pixel formats are multiple planes, devices
> could support each component has its own memory plane.
> But that may not apply for any device in the world. We could have a
> device without IOMMU then this is n
On 11/29/22 18:18, Simon Ser wrote:
CAUTION: Email originated externally, do not click links or open attachments
unless you recognize the sender and know the content is safe.
Format modifiers are for the buffer layout only, not for the allocation
parameters, placement, etc. See the doc comm
On Tue, 29 Nov 2022 18:10:30 +0800
Hsia-Jun Li wrote:
> From: "Hsia-Jun(Randy) Li"
>
> Hello All
>
> Currently, we assume all the pixel formats are multiple planes,
Hi,
that's not true for any definition of "multiple planes" that I know of.
For example, DRM_FORMAT_XRGB is a single-plane
Currently drm-buddy does not have full knowledge of continuous memory.
Lets consider scenario below.
order 1:L R
order 0: LL LR RL RR
for order 1 allocation, it can offer L or R or LR+RL.
For now, we only implement L or R case for continuous memory allocation.
So t
On 11/29/22 18:42, Daniel Stone wrote:
CAUTION: Email originated externally, do not click links or open attachments
unless you recognize the sender and know the content is safe.
Hi Randy,
On Tue, 29 Nov 2022 at 10:11, Hsia-Jun Li wrote:
Currently, we assume all the pixel formats are mult
On Wed, 16 Nov 2022 at 15:35, Guillaume BRUN wrote:
>
> Cheap monitors sometimes advertise YUV modes they don't really have
> (HDMI specification mandates YUV support so even monitors without actual
> support will often wrongfully advertise it) which results in YUV matches
> and user forum complai
On Mon, 28 Nov 2022 at 12:23, Francesco Dolcini wrote:
>
> From: Stefan Eichenberger
>
> Enable hot plug detection when it is available on the HDMI port.
> Without this connecting to a different monitor with incompatible timing
> before the 10 seconds poll period will lead to a broken display out
On 29-11-2022 15:41, Tvrtko Ursulin wrote:
>
> On 22/11/2022 07:01, Aravind Iddamsetty wrote:
>> On XE_LPM+ platforms the media engines are carved out into a separate
>> GT but have a common GGTMMADR address range which essentially makes
>> the GGTT address space to be shared between media and
On 11/01, Yuan Can wrote:
> A memory leak was reported after the vkms module install failed.
>
> unreferenced object 0x88810bc28520 (size 16):
> comm "modprobe", pid 9662, jiffies 4298009455 (age 42.590s)
> hex dump (first 16 bytes):
> 01 01 00 64 81 88 ff ff 00 00 dc 0a 81 88 ff ff .
[AMD Official Use Only - General]
In one ROCM + gdm restart test,
find_continuous_blocks() succeed with ratio 35%.
the cod coverage report is below.
7723998 : if (order-- == min_order) {
773 352 : if (!(flags &
DR
On 11/01, Yuan Can wrote:
> A null-ptr-deref is triggered when it tries to destroy the workqueue in
> vkms->output.composer_workq in vkms_release().
>
> KASAN: null-ptr-deref in range [0x0118-0x011f]
> CPU: 5 PID: 17193 Comm: modprobe Not tainted 6.0.0-11331-gd465bff130bf
On Tue, 15 Nov 2022 at 17:49, Rob Herring wrote:
>
> On Tue, Nov 15, 2022 at 12:17:11PM +0100, Robert Foss wrote:
> > Mobile Display Subsystem (MDSS) encapsulates sub-blocks
> > like DPU display controller, DSI etc. Add YAML schema for MDSS device
> > tree bindings
> >
> > Signed-off-by: Robert Fo
Am 29.11.22 um 11:56 schrieb xinhui pan:
Currently drm-buddy does not have full knowledge of continuous memory.
Lets consider scenario below.
order 1:L R
order 0: LL LR RL RR
for order 1 allocation, it can offer L or R or LR+RL.
For now, we only implement L or R
On 11/09, Alaa Emad wrote:
> change min cursor size of vkms driver from 20 to 10, to increase the IGT test
> coverage of vkms by enabling 32x10 cursor size subtests in kms_cursor_crc
>
> Signed-off-by: Alaa Emad
> ---
> drivers/gpu/drm/vkms/vkms_drv.h | 4 ++--
> 1 file changed, 2 insertions(+),
> -Original Message-
> From: Tomi Valkeinen
> Sent: 29 November 2022 11:30
> To: Laurent Pinchart
> Cc: Kieran Bingham ; Rob
> Herring ; Krzysztof Kozlowski
> ; Geert Uytterhoeven
> ; Magnus Damm ; dri-
> de...@lists.freedesktop.org; linux-renesas-...@vger.kernel.org;
> devicet...@vger.
On Tue, 15 Nov 2022 at 14:42, Konrad Dybcio wrote:
>
>
>
> On 15/11/2022 14:30, Robert Foss wrote:
> > Add compatibles string, "qcom,sm8350-mdss", for the multimedia display
> > subsystem unit used on Qualcomm SM8350 platform.
> >
> > Signed-off-by: Robert Foss
> > ---
> > drivers/gpu/drm/msm/m
On 29/11/2022 03:13, Doug Anderson wrote:
Hi,
On Fri, Nov 25, 2022 at 2:54 AM Qiqi Zhang wrote:
According to the description in ti-sn65dsi86's datasheet:
CHA_HSYNC_POLARITY:
0 = Active High Pulse. Synchronization signal is high for the sync
pulse width. (default)
1 = Active Low Pulse. Synchr
On Tue, 15 Nov 2022 at 14:40, Konrad Dybcio wrote:
>
>
>
> On 15/11/2022 14:30, Robert Foss wrote:
> > Add compatibility for SM8350 display subsystem, including
> > required entries in DPU hw catalog.
> >
> > Signed-off-by: Robert Foss
> > ---
> > .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c|
Hi Biju,
On Tue, Nov 29, 2022 at 12:40 PM Biju Das wrote:
> > From: Tomi Valkeinen
> > On 29/11/2022 03:49, Laurent Pinchart wrote:
> > > On Wed, Nov 23, 2022 at 08:59:46AM +0200, Tomi Valkeinen wrote:
> > >> Add DSI support for r8a779g0. The main differences to r8a779a0 are in
> > >> the PLL an
[AMD Official Use Only - General]
comments inline.
发件人: Koenig, Christian
发送时间: 2022年11月29日 19:32
收件人: Pan, Xinhui; amd-...@lists.freedesktop.org
抄送: dan...@ffwll.ch; matthew.a...@intel.com; dri-devel@lists.freedesktop.org;
linux-ker...@vger.kernel.org;
Hi Tomi,
On Tue, Nov 29, 2022 at 01:30:04PM +0200, Tomi Valkeinen wrote:
> On 29/11/2022 03:49, Laurent Pinchart wrote:
> > On Wed, Nov 23, 2022 at 08:59:46AM +0200, Tomi Valkeinen wrote:
> >> Add DSI support for r8a779g0. The main differences to r8a779a0 are in
> >> the PLL and PHTW setups.
> >>
Am 29.11.22 um 12:54 schrieb Pan, Xinhui:
[AMD Official Use Only - General]
comments inline.
发件人: Koenig, Christian
发送时间: 2022年11月29日 19:32
收件人: Pan, Xinhui; amd-...@lists.freedesktop.org
抄送: dan...@ffwll.ch; matthew.a...@intel.com; dri-devel@lists.free
Hi Maxime and Chris,
Thank you for the patch.
On Thu, Oct 20, 2022 at 10:30:45AM +0200, Maxime Ripard wrote:
> From: Chris Morgan
>
> Add the MEDIA_BUS_FMT_RGB565_1X24_CPADHI format used by the Geekworm
> MZP280 panel for the Raspberry Pi.
>
> Signed-off-by: Chris Morgan
> Signed-off-by: Maxi
Hi Maxime and Joerg,
Thank you for the patch.
On Thu, Oct 20, 2022 at 10:30:46AM +0200, Maxime Ripard wrote:
> From: Joerg Quinten
>
> Add the BGR666 format MEDIA_BUS_FMT_BGR666_1X18 supported by the
> RaspberryPi.
>
> Signed-off-by: Joerg Quinten
> Signed-off-by: Maxime Ripard
Reviewed-by:
Hi Maxime and Joerg,
Thank you for the patch.
On Thu, Oct 20, 2022 at 10:30:47AM +0200, Maxime Ripard wrote:
> From: Joerg Quinten
>
> Add the BGR666 format MEDIA_BUS_FMT_BGR666_1X24_CPADHI supported by the
> RaspberryPi.
>
> Signed-off-by: Joerg Quinten
> Signed-off-by: Maxime Ripard
> ---
On Tue, Nov 29, 2022 at 02:23:04PM +0200, Laurent Pinchart wrote:
> Hi Maxime and Chris,
>
> Thank you for the patch.
>
> On Thu, Oct 20, 2022 at 10:30:45AM +0200, Maxime Ripard wrote:
> > From: Chris Morgan
> >
> > Add the MEDIA_BUS_FMT_RGB565_1X24_CPADHI format used by the Geekworm
> > MZP280
Currently drm-buddy does not have full knowledge of continuous memory.
Adding a new member leaf_link which links all leaf blocks in asceding
order. Finding continuous memory within this leaf_link is easier.
Say, memory of order 3 can be combined with corresponding memory of
order 3 or 2+2 or 1+2+
[AMD Official Use Only - General]
comments line.
发件人: Koenig, Christian
发送时间: 2022年11月29日 20:07
收件人: Pan, Xinhui; amd-...@lists.freedesktop.org
抄送: dan...@ffwll.ch; matthew.a...@intel.com; dri-devel@lists.freedesktop.org;
linux-ker...@vger.kernel.org; Pa
Hi,
W dniu 29.11.2022 o 12:50, Xiaoyong Lu (卢小勇) pisze:
Hi Andrzej,
Thanks for your comments, I have fixed all except for some items which
need more discussion with you.
1.
+for (i = 0; i < AV1_MAX_FRAME_BUF_COUNT; i++) {
+if (instance->cdf[i].va)
+mtk_vcodec_mem_free
Am 29.11.22 um 14:14 schrieb Pan, Xinhui:
[AMD Official Use Only - General]
comments line.
发件人: Koenig, Christian
发送时间: 2022年11月29日 20:07
收件人: Pan, Xinhui; amd-...@lists.freedesktop.org
抄送: dan...@ffwll.ch; matthew.a...@intel.com; dri-devel@lists.freede
On Wed, 23 Nov 2022, Ville Syrjälä wrote:
> On Wed, Nov 23, 2022 at 03:09:32PM +0200, Jani Nikula wrote:
>> The file uses bool and struct completion, include the relevant headers.
>>
>> Signed-off-by: Jani Nikula
>
> Reviewed-by: Ville Syrjälä
Thanks, pushed to drm-misc-next.
BR,
Jani.
>
>>
On Fri, Nov 25, 2022 at 12:52 PM André Almeida wrote:
>
> From: Shashank Sharma
>
> Add a sysfs event to notify userspace about GPU resets providing:
> - PID that triggered the GPU reset, if any. Resets can happen from
> kernel threads as well, in that case no PID is provided
> - Information ab
Ping?
On Tue, Jul 5, 2022 at 12:22 AM Huacai Chen wrote:
>
> Consider a configuration like this:
> 1, efifb (or simpledrm) is built-in;
> 2, a native display driver (such as radeon) is also built-in.
>
> As Javier said, this is not a common configuration (the native display
> driver is usually bu
On Mon, Nov 28, 2022 at 8:59 PM Demi Marie Obenour
wrote:
>
> On Mon, Nov 28, 2022 at 11:18:00AM -0500, Alex Deucher wrote:
> > On Mon, Nov 28, 2022 at 2:18 AM Demi Marie Obenour
> > wrote:
> > >
> > > Dear Christian:
> > >
> > > What is the status of the AMDGPU work for Xen dom0? That was menti
From: Nathan Lu
This patch is to add first version mt8188 vdosys0 driver
Modify and add new files include:
1. bindings documents
2. mtk mmsys
3. mtk mutex
4. mtk drm driver
Change in V3:
- based on [1]
[1] Change mmsys compatible for mt8195 mediatek-drm
- https://patchwork.kernel.org/project
From: Nathan Lu
modify VDOSYS0 display device tree Documentations for MT8188.
Signed-off-by: Nathan Lu
Reviewed-by: Krzysztof Kozlowski
---
.../devicetree/bindings/display/mediatek/mediatek,aal.yaml| 1 +
.../devicetree/bindings/display/mediatek/mediatek,ccorr.yaml | 1 +
.../devicetree/
From: Nathan Lu
add mtk-mutex support for mt8188 vdosys0.
Signed-off-by: amy zhang
Signed-off-by: Nathan Lu
Reviewed-by: AngeloGioacchino Del Regno
---
drivers/soc/mediatek/mtk-mutex.c | 53
1 file changed, 53 insertions(+)
diff --git a/drivers/soc/mediatek
From: Nathan Lu
modify VDOSYS0 mmsys device tree Documentations for MT8188.
Signed-off-by: Nathan Lu
---
.../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4
1 file changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
b/D
From: Nathan Lu
modify VDOSYS0 mutex device tree Documentations for MT8188.
Signed-off-by: Nathan Lu
Reviewed-by: AngeloGioacchino Del Regno
Acked-by: Krzysztof Kozlowski
---
.../devicetree/bindings/soc/mediatek/mediatek,mutex.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a
From: Nathan Lu
add driver data of mt8188 vdosys0 to mediatek-drm and the sub driver.
Signed-off-by: amy zhang
Signed-off-by: Nathan Lu
---
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
From: Nathan Lu
1. add mt8188 mmsys
2. add mt8188 vdosys0 routing table settings
Signed-off-by: amy zhang
Signed-off-by: Nathan Lu
---
drivers/soc/mediatek/mt8188-mmsys.h | 149
drivers/soc/mediatek/mtk-mmsys.c| 11 ++
2 files changed, 160 insertions(+)
crea
On Mon, Nov 28, 2022 at 3:48 PM Mikhail Krylov wrote:
>
> On Mon, Nov 28, 2022 at 09:50:50AM -0500, Alex Deucher wrote:
>
> >>> [excessive quoting removed]
>
> >> So, is there any progress on this issue? I do understand it's not a high
> >> priority one, and today I've checked it on 6.0 kernel, an
On Mon, 2022-11-28 at 22:56 +0800, Dawei Li wrote:
> On Wed, Nov 09, 2022 at 11:37:34PM +0800, Dawei Li wrote:
> > pin_user_pages() is unsafe without protection of mmap_lock,
> > fix it by calling pin_user_pages_fast().
> >
> > Fixes: 7a7a933edd6c ("drm/vmwgfx: Introduce VMware mks-guest-stats")
>
On Tue, Nov 29, 2022 at 09:32:54AM -0500, Alex Deucher wrote:
> On Mon, Nov 28, 2022 at 8:59 PM Demi Marie Obenour
> wrote:
> >
> > On Mon, Nov 28, 2022 at 11:18:00AM -0500, Alex Deucher wrote:
> > > On Mon, Nov 28, 2022 at 2:18 AM Demi Marie Obenour
> > > wrote:
> > > >
> > > > Dear Christian:
>
On Tue, Nov 29, 2022 at 10:15 AM Marek Marczykowski-Górecki
wrote:
>
> On Tue, Nov 29, 2022 at 09:32:54AM -0500, Alex Deucher wrote:
> > On Mon, Nov 28, 2022 at 8:59 PM Demi Marie Obenour
> > wrote:
> > >
> > > On Mon, Nov 28, 2022 at 11:18:00AM -0500, Alex Deucher wrote:
> > > > On Mon, Nov 28,
Applied. Thanks!
Alex
On Tue, Nov 29, 2022 at 2:49 AM Konstantin Meskhidze
wrote:
>
> This commit fixes logic error in function 'amdgpu_hw_ip_info':
>- value 'uvd' might be 'vcn'.
>
> Signed-off-by: Konstantin Meskhidze
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 ++--
> 1 fil
On Tue, Nov 29, 2022 at 10:59 AM Mikhail Krylov wrote:
>
> On Tue, Nov 29, 2022 at 09:44:19AM -0500, Alex Deucher wrote:
> > On Mon, Nov 28, 2022 at 3:48 PM Mikhail Krylov wrote:
> > >
> > > On Mon, Nov 28, 2022 at 09:50:50AM -0500, Alex Deucher wrote:
> > >
> > > >>> [excessive quoting removed]
On Tue, Nov 22, 2022 at 7:00 PM Dmitry Osipenko
wrote:
>
> Consider this scenario:
>
> 1. APP1 continuously creates lots of small GEMs
> 2. APP2 triggers `drop_caches`
> 3. Shrinker starts to evict APP1 GEMs, while APP1 produces new purgeable
>GEMs
> 4. msm_gem_shrinker_scan() returns non-zero
On 29/11/2022 15:34, nathan.lu wrote:
> From: Nathan Lu
>
> modify VDOSYS0 mmsys device tree Documentations for MT8188.
>
> Signed-off-by: Nathan Lu
> ---
> .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4
> 1 file changed, 4 insertions(+)
>
> diff --git
> a/Documentat
On Tue, 15 Nov 2022 at 14:47, Konrad Dybcio wrote:
>
>
>
> On 15/11/2022 14:31, Robert Foss wrote:
> > Add mdss, mdss_mdp, dsi0, dsi0_phy nodes. With these
> > nodes the display subsystem is configured to support
> > one DSI output.
> >
> > Signed-off-by: Robert Foss
> > ---
> > arch/arm64/boot
The prefix to the commit title is a new one, let's use an existing one:
- drm/meson: dw-hdmi:
- drm: meson: dw-hdmi:
On Wed, 16 Nov 2022 at 14:04, Matti Vaittinen wrote:
>
> Simplify using the devm_regulator_get_enable_optional(). Also drop the
> seemingly unused struct member 'hdmi_supply'.
>
>
Hey Matti,
Can you use an already used prefix for this commit title:
- drm/bridge: sii902x:
On Wed, 16 Nov 2022 at 14:03, Matti Vaittinen wrote:
>
> Simplify using devm_regulator_bulk_get_enable()
>
> Signed-off-by: Matti Vaittinen
> Acked-by: Robert Foss
>
> ---
> I am doing a clean-up for my
On Wed, 23 Nov 2022 at 07:40, Ian Ray wrote:
>
> On Tue, Nov 08, 2022 at 09:12:26AM +, Yuan Can wrote:
> >
> > A problem about insmod megachips-stdp-ge-b850v3-fw.ko failed is
> > triggered with the following log given:
> >
> > [ 4497.981497] Error: Driver 'stdp4028-ge-b850v3-fw' is already
On Thu, 24 Nov 2022 at 09:54, Jiaxin Yu wrote:
>
> If the speaker and hdmi are connect to the same port of I2S,
> when try to switch to speaker playback, we will find that hdmi
> is always turned on automatically. The way of switching is
> through SOC_DAPM_PIN_SWITCH, however, such events can not
On Wed, Nov 23, 2022 at 6:17 PM Adam Skladowski wrote:
>
> Add DPU and MDSS schemas to describe MDSS and DPU blocks on the Qualcomm
> SM6115 platform.
> Configuration for DSI/PHY is shared with QCM2290 so compatibles are reused.
> Lack of dsi phy supply in example is intended
> due to fact on qcm2
On Thu, Nov 24, 2022 at 3:26 AM wrote:
>
> From: Xu Panda
>
> The implementation of strscpy() is more robust and safer.
> That's now the recommended way to copy NUL terminated strings.
>
> Signed-off-by: Xu Panda
> Signed-off-by: Yang Yang
> ---
> drivers/dma-buf/dma-buf.c | 2 +-
> 1 file cha
On Mon, Nov 28, 2022 at 03:07:22PM +, Jiaxin Yu (俞家鑫) wrote:
> On Fri, 2022-11-25 at 12:18 +, Mark Brown wrote:
> > On Fri, Nov 25, 2022 at 05:44:11PM +0800, Jiaxin Yu wrote:
> > I'm a little unclear why this is being implemented as a DAPM
> > operation
> > rather than having the driver fo
From: Chris Morgan
Add the Samsung AMS495QA01 panel as found on the Anbernic RG503. This
panel uses DSI to receive video signals, but 3-wire SPI to receive
command signals.
Changes since V3:
- Updated documentation to add spi-peripheral-props.yaml per updates
made for similar devices. Note t
From: Chris Morgan
Add documentation for the Samsung AMS495QA01 panel.
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
.../display/panel/samsung,ams495qa01.yaml | 57 +++
1 file changed, 57 insertions(+)
create mode 100644
Documentation/devicetree/bindings
From: Chris Morgan
Add Samsung AMS495QA01 panel to RG503.
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
.../dts/rockchip/rk3566-anbernic-rg503.dts| 61 +++
1 file changed, 61 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dt
From: Chris Morgan
Support Samsung AMS495QA01 panel as found on the Anbernic RG503. Note
This panel receives video signals via DSI, however it receives
commands via 3-wire SPI.
Signed-off-by: Chris Morgan
Signed-off-by: Maya Matuszczyk
---
drivers/gpu/drm/panel/Kconfig | 10 +
From: Rob Clark
Add a sequence # for more easily matching up cmd/resp, and the # of free
slots in the virtqueue to more easily see starvation issues.
Signed-off-by: Rob Clark
---
drivers/gpu/drm/virtio/virtgpu_drv.h | 3 +++
drivers/gpu/drm/virtio/virtgpu_trace.h | 20
Hi Tomi,
Thank you for the patch.
On Tue, Nov 29, 2022 at 03:41:38PM +0200, Tomi Valkeinen wrote:
> Add DSI support for r8a779g0. The main differences to r8a779a0 are in
> the PLL and PHTW setups.
>
> Signed-off-by: Tomi Valkeinen
> ---
> Changes to v2:
> - Use MHZ() in the tables, with floatin
Compared to the txt description this adds clocks and clock-names to
match reality.
Note that fsl,imx-lcdc was picked as the new name as this is the actual
hardware's name. There will be a new binding implementing the saner drm
concept that is supposed to supersede this legacy fb binding
Signed-of
On Fri, 25 Nov 2022 at 11:14, Tvrtko Ursulin
wrote:
>
>
> + Matt
>
> On 25/11/2022 10:21, Christian König wrote:
> > TTM is just wrapping core DMA functionality here, remove the mid-layer.
> > No functional change.
> >
> > Signed-off-by: Christian König
> > ---
> > drivers/gpu/drm/i915/gem/i915
Hi Jörg,
On Tue, Nov 29, 2022 at 03:52:45PM +0100, Jörg Quinten wrote:
> Hi Laurent,
>
> looks like linux/Documentation/userspace-api/media/v4l/subdev-formats.rst
> doesn't correlate at all to the arrangement and numbering in
> linux/include/uapi/linux/media-bus-format.h .
Looking at the RGB gro
On 11/29/22 20:43, Rob Clark wrote:
> From: Rob Clark
>
> Add a sequence # for more easily matching up cmd/resp, and the # of free
> slots in the virtqueue to more easily see starvation issues.
>
> Signed-off-by: Rob Clark
> ---
> drivers/gpu/drm/virtio/virtgpu_drv.h | 3 +++
> drivers/gpu/
On 11/24/2022 12:50 AM, Pekka Paalanen wrote:
On Wed, 23 Nov 2022 15:27:04 -0800
Jessica Zhang wrote:
On 11/9/2022 1:18 AM, Pekka Paalanen wrote:
On Tue, 8 Nov 2022 23:01:47 +0100
Sebastian Wick wrote:
On Tue, Nov 8, 2022 at 7:51 PM Simon Ser wrote:
cc'ing Pekka and wayland-devel
Hi,
This patchset updates the DRM drivers to use the new set of PM-related
macros introduced recently.
The point of these macros is to allow the PM functions to be
automatically dropped by the compiler when CONFIG_PM or CONFIG_SUSPEND
is disabled, without having to use #ifdef guards.
This has th
This macro can be used with simple drivers, which have their
"struct drm_device" registered as their "struct device"'s drvdata, and
only call drm_mode_config_pm_{suspend,resume}.
The macro will define a "struct dev_pm_ops" with the name passed as
argument. This object cannot be referenced directly
Use the new DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro to create a
"struct dev_pm_ops" that can be used by this driver, instead of using
custom PM callbacks with the same behaviour.
v2: Use the DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro instead of an
exported dev_pm_ops.
Signed-off-by: Pa
Use the new DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro to create a
"struct dev_pm_ops" that can be used by this driver, instead of using
custom PM callbacks with the same behaviour.
v2: Use the DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro instead of an
exported dev_pm_ops.
Signed-off-by: Pa
Use the new DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro to create a
"struct dev_pm_ops" that can be used by this driver, instead of using
custom PM callbacks with the same behaviour.
v2: Use the DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro instead of an
exported dev_pm_ops.
Signed-off-by: Pa
Use the new DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro to create a
"struct dev_pm_ops" that can be used by this driver, instead of using
custom PM callbacks with the same behaviour.
v2: Use the DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro instead of an
exported dev_pm_ops.
Signed-off-by: Pa
Use the new DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro to create a
"struct dev_pm_ops" that can be used by this driver, instead of using
custom PM callbacks with the same behaviour.
v2: Use the DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro instead of an
exported dev_pm_ops.
Signed-off-by: Pa
Use the DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() macros to handle
the .suspend/.resume callbacks.
These macros allow the suspend and resume functions to be automatically
dropped by the compiler when CONFIG_SUSPEND is disabled, without having
to use #ifdef guards.
This has the advantage of al
On 11/23/2022 2:31 PM, john.c.harri...@intel.com wrote:
From: John Harrison
The GuC firmware includes an extra version number to specify the
submission API level. So use that rather than the main firmware
version number for submission related checks.
Also, while it is guaranteed that GuC ve
Use the EXPORT_GPL_DEV_PM_OPS() and pm_ptr() macros to handle the PM
callbacks.
These macros allow the PM functions to be automatically dropped by the
compiler when CONFIG_PM is disabled, without having to use #ifdef
guards.
This has the advantage of always compiling these functions in,
independe
Use the DEFINE_RUNTIME_DEV_PM_OPS(), SYSTEM_SLEEP_PM_OPS(),
RUNTIME_PM_OPS() and pm_ptr() macros to handle the runtime and suspend
PM callbacks.
These macros allow the suspend and resume functions to be automatically
dropped by the compiler when CONFIG_PM is disabled, without having
to use #ifdef
Use the new DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro to create a
"struct dev_pm_ops" that can be used by this driver, instead of using
custom PM callbacks with the same behaviour.
v2: Use the DEFINE_DRM_MODE_CONFIG_HELPER_PM_OPS() macro instead of an
exported dev_pm_ops.
Signed-off-by: Pa
Use the DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() macros to handle
the .suspend/.resume callbacks.
These macros allow the suspend and resume functions to be automatically
dropped by the compiler when CONFIG_SUSPEND is disabled, without having
to use #ifdef guards.
This has the advantage of al
Use the DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr() macros to handle
the .suspend/.resume callbacks.
These macros allow the suspend and resume functions to be automatically
dropped by the compiler when CONFIG_SUSPEND is disabled, without having
to use #ifdef guards.
This has the advantage of al
Use the RUNTIME_PM_OPS() and pm_ptr() macros to handle the
.runtime_suspend/.runtime_resume callbacks.
These macros allow the suspend and resume functions to be automatically
dropped by the compiler when CONFIG_PM is disabled, without having
to use #ifdef guards.
This has the advantage of always
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