Am 21.10.22 um 05:43 schrieb Zack Rusin:
From: Zack Rusin
Instead of using vmwgfx specific framebuffer implementation use the drm
fb helpers. There's no change in functionality, the only difference
is a reduction in the amount of code inside the vmwgfx module.
drm fb helpers do not deal corr
Hi
Am 20.10.22 um 20:37 schrieb Zack Rusin:
On Thu, 2022-10-20 at 11:06 +0200, Thomas Zimmermann wrote:
Hi Zack
Am 20.10.22 um 05:41 schrieb Zack Rusin:
From: Zack Rusin
[...]
@@ -1670,6 +1640,10 @@ static int vmw_probe(struct pci_dev *pdev, const struct
pci_device_id *ent)
if (re
From: Tomasz Jankowski
This is the ioctl context part of score request + "do nothing" work queue
implementation. Work queue context actual part will be added by next patch.
signed-off-by: Tomasz Jankowski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Anisha Dattatraya Kulkarni
Signed-off-by
On 10/20/2022 8:00 PM, Greg Kroah-Hartman wrote:
> On Thu, Oct 20, 2022 at 06:11:49PM +0200, Maciej Kwapulinski wrote:
>> On 10/20/2022 4:32 PM, Greg Kroah-Hartman wrote:
>>> On Thu, Oct 20, 2022 at 03:35:16PM +0200, Kwapulinski, Maciej wrote:
Ta wiadomosc wraz z zalacznikami jest przeznaczo
On 10/20/2022 4:32 PM, Greg Kroah-Hartman wrote:
> On Thu, Oct 20, 2022 at 03:35:16PM +0200, Kwapulinski, Maciej wrote:
>> Ta wiadomosc wraz z zalacznikami jest przeznaczona dla okreslonego adresata
>> i moze zawierac informacje poufne. W razie przypadkowego otrzymania tej
>> wiadomosci, prosim
Hello. Thanks for the reply, Rodrigo
Will redo the patch and resubmit.
Cheers
From: Tomasz Jankowski
Get the hardware information from register MMIO_IBUFFS
Signed-off-by: Tomasz Jankowski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Jianxun Zhang
Signed-off-by: Jianxun Zhang
Co-developed-by: Maciej Kwapulinski
Signed-off-by: Maciej Kwapulinski
---
drivers/gpu/drm
Signed-off-by: Maciej Kwapulinski
Tested-by: Mikolaj Grzybowski
---
drivers/gpu/drm/gna/Kconfig | 1 +
drivers/gpu/drm/gna/gna_device.c | 65
drivers/gpu/drm/gna/gna_device.h | 21 +++
drivers/gpu/drm/gna/gna_hw.h | 17 +
drivers/gpu/drm
From: Tomasz Jankowski
Setup MMU in the driver with a new memory component.
Signed-off-by: Tomasz Jankowski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Jianxun Zhang
Signed-off-by: Jianxun Zhang
Co-developed-by: Maciej Kwapulinski
Signed-off-by: Maciej Kwapulinski
---
drivers/gpu/drm/g
From: Tomasz Jankowski
Although the patch adds GNA_WAIT ioctl, it's main purpose is to provide FIFO
work-queue logic, which offloads each score operation in sequence to GNA
accelerator. When it's done, process(es) WAITing for score to be finished are
woken up.
Signed-off-by: Tomasz Jankowski
Te
This file was split in commit 5d945cbcd4b16a29d6470a80dfb19738f9a4319f
("drm/amd/display: Create a file dedicated to planes") and the logic in
dm_plane_format_mod_supported() function got changed by a switch logic.
That change broke drm_plane modifiers setting on series 5000 APUs
(tested on OXP min
Implement power management in GNA driver
Signed-off-by: Maciej Kwapulinski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Tomasz Jankowski
Signed-off-by: Tomasz Jankowski
Co-developed-by: Jianxun Zhang
Signed-off-by: Jianxun Zhang
---
drivers/gpu/drm/gna/gna_device.c | 47 +
Add a new PCI driver for Intel(R) Gaussian & Neural Accelerator
with basic support like module loading and unloading. The full
function of the driver will be added by further changes.
Signed-off-by: Maciej Kwapulinski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Tomasz Jankowski
Signed-off-by
On 10/20/2022 4:09 PM, Matthew Wilcox wrote:
> On Thu, Oct 20, 2022 at 03:35:16PM +0200, Kwapulinski, Maciej wrote:
>> +++ b/drivers/gpu/drm/gna/Kconfig
>> @@ -0,0 +1,12 @@
>> +#
>> +# Intel(R) Gaussian & Neural Accelerator (Intel(R) GNA)
>> +#
>> +
>> +config DRM_GNA
>> +tristate "Intel(R) G
From: Tomasz Jankowski
Signed-off-by: Tomasz Jankowski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Jianxun Zhang
Signed-off-by: Jianxun Zhang
Co-developed-by: Maciej Kwapulinski
Signed-off-by: Maciej Kwapulinski
---
drivers/gpu/drm/gna/gna_device.c | 46
From: Tomasz Jankowski
As this is first ioctl in the series, the patch also adds common bits for
remaining ioctls
Signed-off-by: Tomasz Jankowski
Tested-by: Mikolaj Grzybowski
Co-developed-by: Jianxun Zhang
Signed-off-by: Jianxun Zhang
Co-developed-by: Maciej Kwapulinski
Signed-off-by: Maci
Dear kernel maintainers,
This submission is a kernel driver to support Intel(R) Gaussian & Neural
Accelerator (Intel(R) GNA). Intel(R) GNA is a PCI-based neural co-processor
available on multiple Intel platforms. AI developers and users can offload
continuous inference workloads to an Intel(R) GNA
drm_gem_shmem_object is base for memory objects provided by the patch
Signed-off-by: Maciej Kwapulinski
Tested-by: Mikolaj Grzybowski
---
drivers/gpu/drm/gna/Kconfig | 1 +
drivers/gpu/drm/gna/gna_device.c | 27 +++-
drivers/gpu/drm/gna/gna_device.h | 13 ++
drivers/gpu/drm/gn
On Wed, Oct 19, 2022 at 1:11 PM andriy.shevche...@linux.intel.com
wrote:
>
> On Wed, Oct 19, 2022 at 09:32:26AM +0200, Thomas Zimmermann wrote:
> > Am 18.10.22 um 17:52 schrieb Zack Rusin:
>
> > IIRC PSB hardware is only available in 32-bit systems.
>
> Dunno about deep details, but IIUC the Intel
On Thu, Oct 20, 2022 at 4:03 PM Javier Martinez Canillas
wrote:
>
> On 10/19/22 19:29, José Expósito wrote:
>
> [...]
>
> >> drivers/gpu/drm/tests/drm_format_helper_test.c | 2 +-
> >> 1 file changed, 1 insertion(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/tests/drm_format_helper_tes
On 20/10/2022 15:23, Robin Murphy wrote:
Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
bus") quite some time ago, the GART driver has effectively disabled
itself to avoid issues with the GPU driver expecting it to work in ways
that it doesn't. As of commit 57365a04c921 ("i
On Wed, Oct 19, 2022 at 7:36 PM Maíra Canal wrote:
>
> [cc Javier]
>
> Hi David,
>
> On 10/19/22 04:32, David Gow wrote:
> > The xrgb2101010 format conversion test (unlike for other formats) does
> > an endianness conversion on the results. However, it always converts
> > TEST_BUF_SIZE 32-bit inte
On Fri, 2022-10-14 at 17:16 +0200, Guillaume Ranquet wrote:
> Add basic support for the mediatek hdmi phy on MT8195 SoC
>
> Signed-off-by: Guillaume Ranquet
> ---
> drivers/phy/mediatek/Makefile | 1 +
> drivers/phy/mediatek/phy-mtk-hdmi-mt8195.c | 546
> ++
On Wed, Oct 19, 2022, at 19:34, Aaro Koskinen wrote:
> Hi,
>
> On Wed, Oct 19, 2022 at 05:03:36PM +0200, Arnd Bergmann wrote:
>> drivers/usb/phy/phy-isp1301-omap.c | 91 +-
>
> This driver and config option ISP1301_OMAP can be deleted altogether as
> there are no users a
Hi!
I found that some games (Cyberpunk 2077, Forza Horizon 4/5) hang at
start after commit dd80d9c8eecac8c516da5b240d01a35660ba6cb6.
dd80d9c8eecac8c516da5b240d01a35660ba6cb6 is the first bad commit
commit dd80d9c8eecac8c516da5b240d01a35660ba6cb6
Author: Christian König
Date: Thu Jul 14 10:23:38
On 20/10/2022 12:03, Christoph Hellwig wrote:
From: Robert Beckett
swiotlb_max_segment used to return either the maximum size that swiotlb
could bounce, or for Xen PV PAGE_SIZE even if swiotlb could bounce buffer
larger mappings. This made i915 on Xen PV work as it bypasses the
coherency asp
On 10/21/22 11:20, Greg Kroah-Hartman wrote:
> On Thu, Oct 20, 2022 at 07:53:25PM +0200, Maciej Kwapulinski wrote:
>> Add a new PCI driver for Intel(R) Gaussian & Neural Accelerator
>
> Please drop all of the (R) stuff in here, and in the Kconfig file and in
> the .c files. If your lawyers insist
On Fri, Oct 21, 2022 at 03:10:06PM +0700, Bagas Sanjaya wrote:
> On 10/21/22 11:20, Greg Kroah-Hartman wrote:
> > On Thu, Oct 20, 2022 at 07:53:25PM +0200, Maciej Kwapulinski wrote:
> >> Add a new PCI driver for Intel(R) Gaussian & Neural Accelerator
> >
> > Please drop all of the (R) stuff in her
Hi,
yes Bas already reported this issue, but I couldn't reproduce it. Need
to come up with a patch to narrow this down further.
Can I send you something to test?
Thanks for the help,
Christian.
Am 21.10.22 um 10:08 schrieb Mikhail Gavrilov:
Hi!
I found that some games (Cyberpunk 2077, Forza
From: Kees Cook
Implement a robust overflows_type() macro to test if a variable or
constant value would overflow another variable or type. This can be
used as a constant expression for static_assert() (which requires a
constant expression[1][2]) when used on constant values. This must be
construc
There are a couple of spelling mistakes in DRM_DEBUG messages. Fix them.
Signed-off-by: Colin Ian King
---
drivers/gpu/drm/vc4/vc4_bo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c
index 231add8b8e12..43d9b3a6
On 27/10/2021 01:48, Umesh Nerlige Ramappa wrote:
[snip]
+static void guc_timestamp_ping(struct work_struct *wrk)
+{
+ struct intel_guc *guc = container_of(wrk, typeof(*guc),
+timestamp.work.work);
+ struct intel_uc *uc = container_of(gu
On Thu, 20 Oct 2022, Ville Syrjälä wrote:
> On Sat, Sep 24, 2022 at 03:02:34PM +0200, Greg KH wrote:
>> On Sun, Sep 11, 2022 at 11:28:43PM -0600, Jim Cromie wrote:
>> > hi Greg, Dan, Jason, DRM-folk,
>> >
>> > heres follow-up to V6:
>> > rebased on driver-core/driver-core-next for -v6 applied b
Hi Maciej,
thanks for your patch!
Overall I really appreciate the attempt to use DRM, this looks so much
smoother than the previous iterations.
On Thu, Oct 20, 2022 at 7:57 PM Maciej Kwapulinski
wrote:
>
> From: Tomasz Jankowski
>
> Get the hardware information from register MMIO_IBUFFS
>
> Si
On Fri, 21 Oct 2022 at 06:27, Greg Kroah-Hartman
wrote:
>
> On Thu, Oct 20, 2022 at 07:53:34PM +0200, Maciej Kwapulinski wrote:
> > From: Tomasz Jankowski
> >
> > Signed-off-by: Tomasz Jankowski
> > Tested-by: Mikolaj Grzybowski
> > Co-developed-by: Jianxun Zhang
> > Signed-off-by: Jianxun Zha
Hi Maciej,
thanks for your patch!
On Thu, Oct 20, 2022 at 7:57 PM Maciej Kwapulinski
wrote:
> From: Tomasz Jankowski
>
> This is the ioctl context part of score request + "do nothing" work queue
> implementation. Work queue context actual part will be added by next patch.
>
> signed-off-by: To
On Thu, Oct 20, 2022 at 7:57 PM Maciej Kwapulinski
wrote:
> Implement power management in GNA driver
>
> Signed-off-by: Maciej Kwapulinski
> Tested-by: Mikolaj Grzybowski
> Co-developed-by: Tomasz Jankowski
> Signed-off-by: Tomasz Jankowski
> Co-developed-by: Jianxun Zhang
> Signed-off-by: J
Hi,
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjälä
> Sent: torstai 20. lokakuuta 2022 19.21
> To: Jani Nikula
> Cc: Sarvela, Tomi P ;
> intel-...@lists.freedesktop.org;
> dri-devel@lists.freedesktop.org; Vivi, Rodrigo
> Subject: Re: [Intel-gfx] Random submitter ch
On Thu, 2022-10-20 at 12:33 -0400, Nícolas F. R. A. Prado wrote:
> Hi,
>
> On Wed, Oct 19, 2022 at 10:52:14AM +0800, xinlei@mediatek.com
> wrote:
> > From: Xinlei Lee
> >
> > The difference between MT8186 and other ICs is that when modifying
> > the
> > output format, we need to modify the m
On Thu, 2022-10-20 at 12:40 -0400, Nícolas F. R. A. Prado wrote:
> On Wed, Oct 19, 2022 at 10:52:15AM +0800, xinlei@mediatek.com
> wrote:
> [..]
> > @@ -134,6 +137,7 @@ struct mtk_dpi_yc_limit {
> > * @yuv422_en_bit: Enable bit of yuv422.
> > * @csc_enable_bit: Enable bit of CSC.
> > * @p
On Fri, Oct 21, 2022 at 1:33 PM Christian König
wrote:
>
> Hi,
>
> yes Bas already reported this issue, but I couldn't reproduce it. Need
> to come up with a patch to narrow this down further.
>
> Can I send you something to test?
I would appreciate to test any patches and ideas.
--
Best Regard
Commit ae71ab585c81 ("drm/vc4: hdmi: Enforce the minimum rate at
runtime_resume") reintroduced the call to clk_set_min_rate in an attempt
to fix the boot without a monitor connected on the RaspberryPi3.
However, that introduced a regression breaking the display output
entirely (black screen but no
Commit ae71ab585c81 ("drm/vc4: hdmi: Enforce the minimum rate at
runtime_resume") reintroduced the call to clk_set_min_rate in an attempt
to fix the boot without a monitor connected on the RaspberryPi3.
However, that introduced a regression breaking the display output
entirely (black screen but no
Simplify couple of drivers by using the new devm_regulator_*get_enable*()
These patches were previously part of the series:
https://lore.kernel.org/lkml/cover.1660934107.git.mazziesacco...@gmail.com/
"Devm helpers for regulator get and enable". I did keep the patch series
versioning even though I
Simplify using the devm_regulator_get_enable_optional(). Also drop the
seemingly unused struct member 'hdmi_supply'.
Signed-off-by: Matti Vaittinen
---
v3 => v4:
- split meson part to own patch
RFCv1 => v2:
- Change also sii902x to use devm_regulator_bulk_get_enable()
Please note - this is onl
Simplify using devm_regulator_bulk_get_enable()
Signed-off-by: Matti Vaittinen
Reviewed-by: Robert Foss
---
v3 => v4:
- split to own patch.
- return directly the value returned by the dev_err_probe()
Please note - this is only compile-tested due to the lack of HW. Careful
review and testing is
Drop open-coded pattern: 'devm_regulator_get(), regulator_enable(),
add_action_or_reset(regulator_disable)' and use the
devm_regulator_get_enable().
Signed-off-by: Matti Vaittinen
Acked-by: Guenter Roeck
---
RFCv1 => v2:
- No changes
---
drivers/hwmon/lm90.c | 20 ++--
1 file c
Drop open-coded pattern: 'devm_regulator_get(), regulator_enable(),
add_action_or_reset(regulator_disable)' and use the
devm_regulator_get_enable() and drop the pointer to the regulator.
This simplifies code and makes it less tempting to add manual control
for the regulator which is also controlled
On 10/21/22 16:18, Matti Vaittinen wrote:
Simplify using devm_regulator_bulk_get_enable()
Signed-off-by: Matti Vaittinen
Reviewed-by: Robert Foss
Robert, I did slightly modify the return from probe when using the
dev_err_probe(). I still decided to keep your RBT - please let me know
if you
On 21/10/2022 15:18, Matti Vaittinen wrote:
Simplify using the devm_regulator_get_enable_optional(). Also drop the
seemingly unused struct member 'hdmi_supply'.
Signed-off-by: Matti Vaittinen
---
v3 => v4:
- split meson part to own patch
RFCv1 => v2:
- Change also sii902x to use devm_regulato
From: Martin Krastev
On 21.10.22 г. 6:44 ч., Zack Rusin wrote:
From: Zack Rusin
Fixes a warning about extra docs about a function argument that has been
removed a while back:
drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c:3888: warning: Excess function
parameter 'sync_file' description in 'vmw_exec
Hi,
On Thu, Oct 20, 2022 at 7:58 PM Sean Hong
wrote:
>
> Add support for the INX - N116BGE-EA2 (HW: C2) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Douglas Anderson
For these simple table entries, I don't
Hi,
On Thu, Oct 20, 2022 at 8:10 PM Sean Hong
wrote:
>
> Add support for the INX - N116BGE-EA2 (HW: C4) panel.
>
> Signed-off-by: Sean Hong
> ---
> drivers/gpu/drm/panel/panel-edp.c | 1 +
> 1 file changed, 1 insertion(+)
Reviewed-by: Douglas Anderson
NOTE: please send patches in a 2-part se
Hi Matti,
On Fri, Oct 21, 2022 at 04:18:01PM +0300, Matti Vaittinen wrote:
> Simplify using the devm_regulator_get_enable_optional(). Also drop the
> seemingly unused struct member 'hdmi_supply'.
>
> Signed-off-by: Matti Vaittinen
>
> ---
> v3 => v4:
> - split meson part to own patch
>
> RFCv1
Hi,
On Wed, Oct 19, 2022 at 11:22 AM Doug Anderson wrote:
>
> Hi,
>
> On Wed, Oct 19, 2022 at 11:18 AM Stephen Boyd wrote:
> >
> > Quoting Douglas Anderson (2022-10-17 12:18:51)
> > > Back in commit 826cff3f7ebb ("drm/bridge: parade-ps8640: Enable
> > > runtime power management") we removed a my
On 2022-10-20 18:10, Rafael Mendonca wrote:
> This is an extension of commit fd3bc691fc7b ("drm/amd/display: Remove
> duplicate code across dcn30 and dcn31"), which removed duplicate code for
> the function CalculateBytePerPixelAnd256BBlockSizes() across dcn30 and
> dcn31. At the time the aforem
On Fri, Oct 21, 2022 at 07:59:02PM +0800, xinlei.lee wrote:
> On Thu, 2022-10-20 at 12:33 -0400, Nícolas F. R. A. Prado wrote:
> > Hi,
> >
> > On Wed, Oct 19, 2022 at 10:52:14AM +0800, xinlei@mediatek.com
> > wrote:
> > > From: Xinlei Lee
> > >
> > > The difference between MT8186 and other I
Hi,
On 21/10/2022 17:02, Laurent Pinchart wrote:
Hi Matti,
On Fri, Oct 21, 2022 at 04:18:01PM +0300, Matti Vaittinen wrote:
Simplify using the devm_regulator_get_enable_optional(). Also drop the
seemingly unused struct member 'hdmi_supply'.
Signed-off-by: Matti Vaittinen
---
v3 => v4:
- spl
On Fri, Oct 21, 2022 at 08:18:25PM +0800, xinlei.lee wrote:
> On Thu, 2022-10-20 at 12:40 -0400, Nícolas F. R. A. Prado wrote:
> > On Wed, Oct 19, 2022 at 10:52:15AM +0800, xinlei@mediatek.com
> > wrote:
[..]
> > > @@ -448,8 +453,12 @@ static void mtk_dpi_dual_edge(struct mtk_dpi
> > > *dpi)
>
From: Arnd Bergmann
A number of board files were marked as 'unused' in 2022 and can
get removed in linux-6.2 at the beginning of 2023.
I wanted to group these two platforms with the PXA series, but
that one is already too big.
MMP is now DT-only, which allows removing most of the platform
specif
From: Arnd Bergmann
The Cerf, H3100, Badge4, Hackkit, LART, NanoEngine, PLEB, Shannon and
Simpad machines were all marked as unused as there are no known users
left. Remove all of these, along with references to them in defconfig
files and drivers.
Four machines remain now: Assabet, Collie (Zaur
Hi Gwan-gyeong,
On Fri, Oct 21, 2022 at 11:33:33AM +0300, Gwan-gyeong Mun wrote:
> From: Kees Cook
>
> Implement a robust overflows_type() macro to test if a variable or
> constant value would overflow another variable or type. This can be
> used as a constant expression for static_assert() (whi
Hi Johan
On 10/20/2022 11:27 PM, Johan Hovold wrote:
On Tue, Sep 20, 2022 at 11:06:30AM +0200, Johan Hovold wrote:
On Tue, Sep 13, 2022 at 10:53:10AM +0200, Johan Hovold wrote:
The MSM DRM driver is currently broken in multiple ways with respect to
probe deferral. Not only does the driver curr
On Wed, 19 Oct 2022 16:37:19 -0700, Ashutosh Dixit wrote:
>
> From: Badal Nilawar
>
> Update CAGF functions for MTL to get actual resolved frequency of 3D and
> SAMedia.
>
> v2: Update MTL_MIRROR_TARGET_WP1 position/formatting (MattR)
> Move MTL branches in cagf functions to top (MattR)
>
On Wed, Oct 19, 2022 at 04:37:17PM -0700, Ashutosh Dixit wrote:
> Instead of masks/shifts settle on REG_FIELD_GET as the standard way to
> extract reg fields. This allows future patches touching this code to also
> consistently use REG_FIELD_GET and friends.
>
> Suggested-by: Rodrigo Vivi
> Signe
On Wed, Oct 19, 2022 at 04:37:18PM -0700, Ashutosh Dixit wrote:
> From: Don Hiatt
>
> On GEN12+ use GEN12_RPSTAT register to get actual resolved GT
> freq. GEN12_RPSTAT does not require a forcewake and will return 0 freq if
> GT is in RC6.
>
> v2:
> - Fixed review comments(Ashutosh)
> - Adde
On Fri, Oct 21, 2022 at 09:02:03AM -0700, Dixit, Ashutosh wrote:
> On Wed, 19 Oct 2022 16:37:19 -0700, Ashutosh Dixit wrote:
> >
> > From: Badal Nilawar
> >
> > Update CAGF functions for MTL to get actual resolved frequency of 3D and
> > SAMedia.
> >
> > v2: Update MTL_MIRROR_TARGET_WP1 position/f
On Wed, Oct 19, 2022 at 04:37:20PM -0700, Ashutosh Dixit wrote:
> Previously RC6 residency functions directly accepted RC6 residency register
> MMIO offsets (there are four RC6 residency registers). This worked but
> required an assumption on the residency register layout so was not future
> proof.
Unfortunately, printk() doesn't currently support the printing of %f
entries. So, print statements that contain "%f" should be removed.
However, since DC is used on other OSes that can still benefit from the
additional debugging information, we should instead remove the
problematic print statements
On Wed, Oct 19, 2022 at 04:37:21PM -0700, Ashutosh Dixit wrote:
> From: Badal Nilawar
>
> Add support for C6 residency and C state type for MTL SAMedia. Also add
> mtl_drpc.
I believe this patch deserves a slip between the actual support and
the debugfs, but I'm late to the review, so feel free
Add support for wrapper settings for DSI bridge on
j721e. Also set the DPI input to DPI0
Signed-off-by: Rahul T R
---
drivers/gpu/drm/bridge/cadence/Kconfig| 10
drivers/gpu/drm/bridge/cadence/Makefile | 1 +
.../gpu/drm/bridge/cadence/cdns-dsi-core.c| 37 +-
Add compatible to support dsi bridge on j721e
Signed-off-by: Rahul T R
Reviewed-by: Rob Herring
---
.../bindings/display/bridge/cdns,dsi.yaml | 25 ++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,dsi.yam
Following series of patches adds supports for CDNS DSI
bridge on j721e.
v8:
- Rebased to 6.1-rc1
v7:
- Rebased to next-20220920
- Accumulated the Reviewed-by acks
v6:
- Dropped generic definations for properties like reg, resets etc..
- Fixed the defination for port@0 and port@1
- removed
Move the cadence dsi bridge under drm/bridge/cadence
directory, to prepare for adding j721e wrapper
support
Signed-off-by: Rahul T R
---
drivers/gpu/drm/bridge/Kconfig| 11 ---
drivers/gpu/drm/bridge/Makefile | 1 -
drivers/gpu/drm/bridge/ca
Convert cdns,dsi.txt binding to yaml format
Signed-off-by: Rahul T R
Reviewed-by: Rob Herring
---
.../bindings/display/bridge/cdns,dsi.txt | 112 -
.../bindings/display/bridge/cdns,dsi.yaml | 157 ++
2 files changed, 157 insertions(+), 112 deletions(-)
dele
Create a header file for cdns dsi and move
register offsets and structure to header,
to prepare for adding j721e wrapper support
Signed-off-by: Rahul T R
---
.../gpu/drm/bridge/cadence/cdns-dsi-core.c| 446 +
.../gpu/drm/bridge/cadence/cdns-dsi-core.h| 458 +++
On Fri, Oct 21, 2022 at 04:18:43PM +0300, Matti Vaittinen wrote:
> Drop open-coded pattern: 'devm_regulator_get(), regulator_enable(),
> add_action_or_reset(regulator_disable)' and use the
> devm_regulator_get_enable().
>
> Signed-off-by: Matti Vaittinen
> Acked-by: Guenter Roeck
Applied to hwm
On Fri, Oct 21, 2022 at 04:19:04PM +0300, Matti Vaittinen wrote:
> Drop open-coded pattern: 'devm_regulator_get(), regulator_enable(),
> add_action_or_reset(regulator_disable)' and use the
> devm_regulator_get_enable() and drop the pointer to the regulator.
> This simplifies code and makes it less
On 10/20/2022 4:36 PM, Dixit, Ashutosh wrote:
On Thu, 20 Oct 2022 13:16:00 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 11:33 AM, Dixit, Ashutosh wrote:
On Wed, 19 Oct 2022 17:29:44 -0700, Vinay Belgaumkar wrote:
Hi Vinay,
Waitboost (when SLPC is enabled) results in a H2G message. This can
On 2022-10-20 19:17, Dan Williams wrote:
Felix Kuehling wrote:
Am 2022-10-20 um 17:56 schrieb Dan Williams:
A 'struct dev_pagemap' (pgmap) represents a collection of ZONE_DEVICE
pages. The pgmap is a reference counted object that serves a similar
role as a 'struct request_queue'. Live referen
On Fri, 21 Oct 2022 11:24:42 -0700, Belgaumkar, Vinay wrote:
>
>
> On 10/20/2022 4:36 PM, Dixit, Ashutosh wrote:
> > On Thu, 20 Oct 2022 13:16:00 -0700, Belgaumkar, Vinay wrote:
> >> On 10/20/2022 11:33 AM, Dixit, Ashutosh wrote:
> >>> On Wed, 19 Oct 2022 17:29:44 -0700, Vinay Belgaumkar wrote:
> >
The rest of the code expects that master's device drvdata is the
struct msm_drm_private instance. Do not override the mdp5's drvdata.
Fixes: 6874f48bb8b0 ("drm/msm: make mdp5/dpu devices master components")
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
Abhinav, Rob, please pick
On 10/20/22 20:44, Zack Rusin wrote:
> From: Zack Rusin
>
> Fixes a warning about extra docs about a function argument that has been
> removed a while back:
> drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c:3888: warning: Excess function
> parameter 'sync_file' description in 'vmw_execbuf_copy_fence_user
If we fail to get a valid panel ID in drm_edid_get_panel_id() we'd
like to see the EDID that was read so we have a chance of
understanding what's wrong. There's already a function for that, so
let's call it in the error case.
NOTE: edid_block_read() has a retry loop in it, so actually we'll only
p
https://bugzilla.kernel.org/show_bug.cgi?id=216119
--- Comment #46 from Alex Deucher (alexdeuc...@gmail.com) ---
Please try with the prefer_shadow patch. It sounds like we may be on the right
track.
--
You may reply to this email to add a comment.
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Reviewed-by: Lyude Paul
Will push to drm-misc-next as well
On Thu, 2022-10-20 at 21:07 -0400, Zack Rusin wrote:
> From: Zack Rusin
>
> Trivial removal of an unused variable. Not sure how it snuck by me and
> build bots in the 7c99616e3fe7.
>
> Fixes: 7c99616e3fe7 ("drm: Remove drm_mode_config
From: Arnd Bergmann
The s3c24xx platform was marked as deprecated a while ago,
and for the s3c64xx platform, we marked all except one legacy
board file as unused.
This series removes all of those, leaving only s3c64xx support
for DT based boots as well as the cragg6410 board file.
About half of
For the nouveau bits:
Reviewed-by: Lyude Paul
On Thu, 2022-10-20 at 14:56 -0700, Dan Williams wrote:
> A 'struct dev_pagemap' (pgmap) represents a collection of ZONE_DEVICE
> pages. The pgmap is a reference counted object that serves a similar
> role as a 'struct request_queue'. Live references
From: Arnd Bergmann
The s3c24xx platform was removed, so the framebuffer driver is no longer
needed.
Signed-off-by: Arnd Bergmann
---
drivers/video/fbdev/Kconfig | 33 +-
drivers/video/fbdev/Makefile |1 -
drivers/video/fbdev/s3c2410fb-regs-lcd.h | 143 ---
driv
For the nouveau bits:
Reviewed-by: Lyude Paul
On Tue, 2022-10-18 at 22:43 -0400, Zack Rusin wrote:
> From: Zack Rusin
>
> v4: Fix issue spotted by the kernel test robot
>
> The fb_base in struct drm_mode_config has been unused for a long time.
> Some drivers set it and some don't leading to a
Reviewed-by: Lyude Paul
Will push in just a moment to drm-misc-next, thanks!
On Mon, 2022-10-17 at 08:07 +0800, Yang Li wrote:
> ./drivers/gpu/drm/nouveau/nouveau_dmem.c: nvif/if000c.h is included more
> than once.
>
> Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=2404
> Reported-by: Aba
Hi Doug
On 10/21/2022 1:07 PM, Douglas Anderson wrote:
If we fail to get a valid panel ID in drm_edid_get_panel_id() we'd
like to see the EDID that was read so we have a chance of
understanding what's wrong. There's already a function for that, so
let's call it in the error case.
NOTE: edid_blo
Hi Dmitry
A couple of comments below.
On 10/21/2022 12:26 PM, Dmitry Baryshkov wrote:
The rest of the code expects that master's device drvdata is the
struct msm_drm_private instance. Do not override the mdp5's drvdata.
Fixes: 6874f48bb8b0 ("drm/msm: make mdp5/dpu devices master components")
S
On 10/21/2022 11:40 AM, Dixit, Ashutosh wrote:
On Fri, 21 Oct 2022 11:24:42 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 4:36 PM, Dixit, Ashutosh wrote:
On Thu, 20 Oct 2022 13:16:00 -0700, Belgaumkar, Vinay wrote:
On 10/20/2022 11:33 AM, Dixit, Ashutosh wrote:
On Wed, 19 Oct 2022 17:29:44
The introduction of the media GT brings a few changes for GuC/HuC. The
main difference between the 2 GTs is that only the media one has the
HuC, while both have the GuC. Also, the fact that both GTs use the same
G-unit and GGTT means we now have parallel interrupt/communication
paths. Lastly, WOPCM
The FW binaries are independently loaded on each GT. On MTL, the memory
is shared so we could potentially re-use a single allocation, but on
discrete multi-gt platforms we are going to need independent copies,
so it is easier to do the same on MTL as well, given that the amount
of duplicated memory
On MTL the primary GT doesn't have any media capabilities, so no video
engines and no HuC. We must therefore skip the HuC fetch and load on
that specific case. Given that other multi-GT platforms might have HuC
on the primary GT, we can't just check for that and it is easier to
instead check for th
Our current FW loading process is the same for all FWs:
- Pin FW to GGTT at the start of the ggtt->uc_fw node
- Load the FW
- Unpin
This worked because we didn't have a case where 2 FWs would be loaded on
the same GGTT at the same time. On MTL, however, this can happen if both
GTs are reset at th
From: Aravind Iddamsetty
With MTL standalone media architecture the wopcm layout has changed with
separate partitioning in WOPCM for GCD/GT GuC and SA Media GuC. The size
of WOPCM is 4MB with lower 2MB for SA Media and upper 2MB for GCD/GT.
+=+===> ++ <== WOPCM TOP
The media GT shares the G-unit with the root GT, so a second set of
communication registers is required for the media GuC.
Signed-off-by: Daniele Ceraolo Spurio
Cc: John Harrison
Cc: Alan Previn
Reviewed-by: John Harrison
---
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 14 ++
dri
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