On 9/27/2022 11:20 AM, Badal Nilawar wrote:
From: Dale B Stimson
Use i915 HWMON to display/modify dGfx power PL1 limit and TDP setting.
v2:
- Fix review comments (Ashutosh)
- Do not restore power1_max upon module unload/load sequence
because on production systems modules are alwa
On 9/27/2022 11:20 AM, Badal Nilawar wrote:
From: Ashutosh Dixit
Expose power1_max_interval, that is the tau corresponding to PL1, as a
custom hwmon attribute. Some bit manipulation is needed because of the
format of PKG_PWR_LIM_1_TIME in
GT0_PACKAGE_RAPL_LIMIT register (1.x * power(2,y)).
In order to reduce chance of allocation failure while capturing a6xx
gpu state, use kvzalloc() instead of kcalloc() in state_kcalloc().
Indirectly, this patch helps to fix leaking memory allocated for
gmu_debug object.
Fixes: b859f9b009b (drm/msm/gpu: Snapshot GMU debug buffer)
Signed-off-by: Akh
In adreno_unbind, we should clean up gpu device's drvdata to avoid
accessing a stale pointer during system suspend. Also, check for NULL
ptr in both system suspend/resume callbacks.
Signed-off-by: Akhil P Oommen
---
Rebased on msm-next + some external fixes to boot sc7280 device.
drivers/gpu/dr
Hi Kees,
On Fri, Sep 23, 2022 at 10:35 PM Kees Cook wrote:
> The __malloc attribute should not be applied to "realloc" functions, as
> the returned pointer may alias the storage of the prior pointer. Instead
> of splitting __malloc from __alloc_size, which would be a huge amount of
> churn, just
On 9/27/2022 10:56 PM, Bjorn Andersson wrote:
On Fri, Aug 19, 2022 at 01:48:37AM +0530, Akhil P Oommen wrote:
Add a reset op compatible function to poll for gdsc collapse.
Signed-off-by: Akhil P Oommen
---
(no changes since v2)
Changes in v2:
- Minor update to function prototype
drivers/c
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Add i915_vma_instance_persistent() to create persistent vmas.
Persistent vmas will use i915_gtt_view to support partial binding.
vma_lookup is tied to segment of the object instead of section
of VA space. Hence, it do not support aliasing.
On 27/09/2022 17:26, Jason-JH.Lin wrote:
> For previous MediaTek SoCs, such as MT8173, there are 2 display HW
> pipelines binding to 1 mmsys with the same power domain, the same
> clock driver and the same mediatek-drm driver.
>
> For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding
This patch series fixes integer overflow or integer truncation issues in
page lookups, ttm place configuration and scatterlist creation, etc.
We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain integer
instead o
From: Kees Cook
Implement a robust overflows_type() macro to test if a variable or
constant value would overflow another variable or type. This can be
used as a constant expression for static_assert() (which requires a
constant expression[1][2]) when used on constant values. This must be
construc
From: Chris Wilson
There is an impedance mismatch between the scatterlist API using unsigned
int and our memory/page accounting in unsigned long. That is we may try
to create a scatterlist for a large object that overflows returning a
small table into which we try to fit very many pages. As the o
From: Kees Cook
When the check_[op]_overflow() helpers were introduced, all arguments were
required to be the same type to make the fallback macros simpler. However,
now that the fallback macros have been removed[1], it is fine to allow
mixed types, which makes using the helpers much more useful,
Add check_assign() macro which performs an assigning source value into
destination pointer along with an overflow check and
check_assign_user_ptr() macro which performs an assigning source value into
destination pointer type variable along with an overflow check. If an
explicit overflow check is re
From: Chris Wilson
We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain
integer instead of a more suitable long. Be pedantic and add integer
typechecking to the lookup so that we can be sure that we are safe.
A
There is an impedance mismatch between the first/last valid page
frame number of ttm place in unsigned and our memory/page accounting in
unsigned long.
As the object size is under the control of userspace, we have to be prudent
and catch the conversion errors.
To catch the implicit truncation as we
The __shmem_file_setup() function returns -EINVAL if size is greater than
MAX_LFS_FILESIZE. To handle the same error as other code that returns
-E2BIG when the size is too large, it add a code that returns -E2BIG when
the size is larger than the size that can be handled.
v4: If BITS_PER_LONG is 32
Il 27/09/22 17:27, Jason-JH.Lin ha scritto:
Add driver data of mt8195 vdosys0 to mediatek-drm and the sub driver.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
The ttm_bo_init_reserved() functions returns -ENOSPC if the size is too big
to add vma. The direct function that returns -ENOSPC is
drm_mm_insert_node_in_range().
To handle the same error as other code returning -E2BIG when the size is
too large, it converts return value to -E2BIG.
Signed-off-by:
From: Chris Wilson
Having addressed the issues surrounding incorrect types for local
variables and potential integer truncation in using the scatterlist API,
we have closed all the loop holes we had previously identified with
dangerously large object creation. As such, we can eliminate the warnin
Il 27/09/22 17:27, Jason-JH.Lin ha scritto:
1. Add mt8195 driver data with compatible "mediatek-mt8195-vdosys0".
2. Add mt8195 routing table settings of vdosys0.
Signed-off-by: Jason-JH.Lin
Reviewed-by: AngeloGioacchino Del Regno
Il 27/09/22 17:26, Jason-JH.Lin ha scritto:
For previous MediaTek SoCs, such as MT8173, there are 2 display HW
pipelines binding to 1 mmsys with the same power domain, the same
clock driver and the same mediatek-drm driver.
For MT8195, VDOSYS0 and VDOSYS1 are 2 display HW pipelines binding to
2
Hi Kees,
To check the intel-gfx ci results and test results from other mailing
lists, I have rebased this patch and included it in this series [1].
[1] https://patchwork.freedesktop.org/series/109169/
G.G
On 9/26/22 10:11 PM, Kees Cook wrote:
Implement a robust overflows_type() macro to tes
On 19.09.2022 15:32, Matt Roper wrote:
> Gen8 was the first time our hardware had multicast registers (or at
> least the first time the multicast nature was exposed and MMIO accesses
> could be steered). There are some registers that transitioned from
> singleton behavior to multicast during the g
On Wed, Sep 28, 2022 at 01:41:15AM +, yexingchen...@gmail.com wrote:
> From: ye xingchen
>
> Replace the open-code with sysfs_emit() to simplify the code.
>
> Signed-off-by: ye xingchen
> ---
> v1 -> v2
> Add the rest of this fixes for this pattern in the 'drivers/video/backlight'
> director
On Tue, Sep 27, 2022 at 07:53:54PM +0200, Dan Johansen wrote:
>
> Den 26.09.2022 kl. 12.30 skrev Michael Riesch:
> > Hi Sascha,
> >
> > On 9/26/22 10:04, Sascha Hauer wrote:
> > > This series adds support for 4k@30 to the rockchip HDMI controller. This
> > > has been tested on a rk3568 rock3a boa
Den 28.09.2022 kl. 10.37 skrev Sascha Hauer:
On Tue, Sep 27, 2022 at 07:53:54PM +0200, Dan Johansen wrote:
Den 26.09.2022 kl. 12.30 skrev Michael Riesch:
Hi Sascha,
On 9/26/22 10:04, Sascha Hauer wrote:
This series adds support for 4k@30 to the rockchip HDMI controller. This
has been tested
On Wed, 28 Sep 2022, Gwan-gyeong Mun wrote:
> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h
> b/drivers/gpu/drm/i915/i915_scatterlist.h
> index 9ddb3e743a3e..1d1802beb42b 100644
> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> @@ -220,4 +220
On Tue, 27 Sep 2022, Daniel Thompson wrote:
> On Tue, Sep 27, 2022 at 11:31:38AM +0800, Yang Yingliang wrote:
> > In the probe path, dev_err() can be replaced with dev_err_probe()
> > which will check if error code is -EPROBE_DEFER and prints the
> > error name. It also sets the defer probe reason
Hi,
On 2022/9/28 17:11, Lee Jones wrote:
On Tue, 27 Sep 2022, Daniel Thompson wrote:
On Tue, Sep 27, 2022 at 11:31:38AM +0800, Yang Yingliang wrote:
In the probe path, dev_err() can be replaced with dev_err_probe()
which will check if error code is -EPROBE_DEFER and prints the
error name. It
We have routines like drm_info/warn/err for logging. Use them instead
of dev_* variants to get drm-formatted log messages.
Signed-off-by: Khalid Masum
---
drivers/gpu/drm/tve200/tve200_display.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/tve2
Quoting Laurent Pinchart (2022-09-28 00:38:18)
> A couple of the register macro values are incorrectly indented. Fix
> them.
>
Reviewed-by: Kieran Bingham
> Signed-off-by: Laurent Pinchart
> ---
> drivers/gpu/drm/mxsfb/lcdif_regs.h | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
Quoting Laurent Pinchart (2022-09-28 01:58:09)
> A couple of the register macro values are incorrectly indented. Fix
> them.
>
Argh, there was already a v2 posted. Sometimes (more often than I like)
I really hate email...
Reviewed-by: Kieran Bingham
> Signed-off-by: Laurent Pinchart
> Review
Quoting Laurent Pinchart (2022-09-28 01:58:10)
> The BIT() macro is meant to represent a single bit. Don't use it for
> values of register fields that span multiple bits.
>
> Signed-off-by: Laurent Pinchart
> ---
> Changes since v1:
>
> - Use hex for field values
> ---
> drivers/gpu/drm/mxsfb/l
Document flags accepted by the page-flip and atomic IOCTLs.
v2 (Pekka):
- Mention DRM_EVENT_FLIP_COMPLETE in DRM_MODE_PAGE_FLIP_EVENT docs.
- Expand DRM_MODE_ATOMIC_NONBLOCK and DRM_MODE_ATOMIC_ALLOW_MODESET
description.
v3:
- Fix struct field ref syntax (Daniel)
- Clarify when artifacts are no
Quoting Laurent Pinchart (2022-09-28 01:58:11)
> Up to and including v1.3, HDMI supported limited quantization range only
> for YCbCr. HDMI v1.4 introduced selectable quantization ranges, but this
> features isn't supported in the dw-hdmi driver that is used in
> conjunction with the LCDIF in the i
On 19.09.2022 15:32, Matt Roper wrote:
> Starting in Xe_HP, several registers our driver works with have been
> converted from singleton registers into replicated registers with
> multicast behavior. Although the registers are still located at the
> same MMIO offsets as on previous platforms, let'
Quoting Laurent Pinchart (2022-09-28 01:58:12)
> From: Kieran Bingham
>
It looks like this has progressed a bit since it left my computer ;-)
> The LCDIF includes a color space converter that supports YUV input. Use
> it to support YUV planes, either through the converter if the output
> forma
On Fri, 09 Sep 2022, Hans de Goede wrote:
> Hi all,
>
> Here is v2 of my "drm/kms: control display brightness through drm_connector
> properties" RFC:
>
> Changes from version 1:
> - Drop bl_brightness_0_is_min_brightness from list of new connector
> properties.
> - Clearly define that 0 is alw
Hi Kieran,
On Wed, Sep 28, 2022 at 10:59:36AM +0100, Kieran Bingham wrote:
> Quoting Laurent Pinchart (2022-09-28 01:58:12)
> > From: Kieran Bingham
>
> It looks like this has progressed a bit since it left my computer ;-)
I wish the same would be universally true for all patches :-)
> > The L
On Wed, 28 Sep 2022 09:41:57 +
Simon Ser wrote:
> Document flags accepted by the page-flip and atomic IOCTLs.
>
> v2 (Pekka):
> - Mention DRM_EVENT_FLIP_COMPLETE in DRM_MODE_PAGE_FLIP_EVENT docs.
> - Expand DRM_MODE_ATOMIC_NONBLOCK and DRM_MODE_ATOMIC_ALLOW_MODESET
> description.
> v3:
> -
PowerPC's Open Firmware offers a simple display buffer for graphics
output. Add ofdrm, a DRM driver for the device. As with the existing
simpledrm driver, the graphics hardware is pre-initialized by the
firmware. The driver only provides blitting, no actual DRM modesetting
is possible.
Patch 1 add
Add a per-model device-function structure in preparation of adding
color-management support. Detection of the individual models has been
taken from fbdev's offb.
v3:
* define constants for PCI ids (Javier)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drive
Open Firmware provides basic display output via the 'display' node.
DT platform code already provides a device that represents the node's
framebuffer. Add a DRM driver for the device. The display mode and
color format is pre-initialized by the system's firmware. Runtime
modesetting via DRM is not p
All DRM formats assume little-endian byte order. On big-endian systems,
it is likely that the scanout buffer is in big endian as well. Update
the format accordingly and add endianess conversion to the format-helper
library. Also opt-in to allocated buffers in host format by default.
Suggested-by:
Add a dedicated CRTC state to ofdrm to later store information for
palette updates.
v3:
* rework CRTC state helpers (Javier)
Signed-off-by: Thomas Zimmermann
Reviewed-by: Javier Martinez Canillas
---
drivers/gpu/drm/tiny/ofdrm.c | 59 ++--
1 file changed
Support the CRTC's color-management property and implement each model's
palette support.
The OF hardware has different methods of setting the palette. The
respective code has been taken from fbdev's offb and refactored into
per-model device functions. The device functions integrate this
functional
On Wed, Sep 28, 2022 at 01:04:01PM +0300, Jani Nikula wrote:
> On Fri, 09 Sep 2022, Hans de Goede wrote:
> > Hi all,
> >
> > Here is v2 of my "drm/kms: control display brightness through drm_connector
> > properties" RFC:
> >
> > Changes from version 1:
> > - Drop bl_brightness_0_is_min_brightnes
As an integrated GPU, MTL does not have local memory and
HAS_LMEM() returns false. However the platform's stolen memory
is presented via BAR2 (i.e., the BAR we traditionally consider
to be the LMEM BAR) and should be managed by the driver the same
way that local memory is on dgpu platforms (which
On 9/27/2022 5:39 PM, Matthew Auld wrote:
It turns out that on production DG2/ATS HW we should have support for
PS64. This feature allows to provide a 64K TLB hint at the PTE level,
which is a lot more flexible than the current method of enabling 64K GTT
pages for the entire page-table, since t
On Tue, Sep 27, 2022 at 03:32:35PM -0700, Dmitry Torokhov wrote:
> Properties describing GPIOs should be named as "-gpios" or
> "-gpio", and that is what gpiod API expects, however the
> driver uses non-standard "gpios-reset" name. Let's adjust this, and also
> note that the reset line is active lo
Quoting Laurent Pinchart (2022-09-28 11:05:33)
> Hi Kieran,
>
> On Wed, Sep 28, 2022 at 10:59:36AM +0100, Kieran Bingham wrote:
> > Quoting Laurent Pinchart (2022-09-28 01:58:12)
> > > From: Kieran Bingham
> >
> > It looks like this has progressed a bit since it left my computer ;-)
>
> I wish
> -Original Message-
> From: Intel-gfx On Behalf Of Aravind
> Iddamsetty
> Sent: Wednesday, September 28, 2022 4:36 PM
> To: intel-...@lists.freedesktop.org
> Cc: De Marchi, Lucas ; dri-
> de...@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v4] drm/i915/mtl: enable local stolen me
Hello,
On Wed, Sep 28, 2022 at 12:50:10PM +0200, Thomas Zimmermann wrote:
> All DRM formats assume little-endian byte order. On big-endian systems,
> it is likely that the scanout buffer is in big endian as well. Update
> the format accordingly and add endianess conversion to the format-helper
> l
Hi Kieran,
On Wed, Sep 28, 2022 at 12:05:03PM +0100, Kieran Bingham wrote:
> Quoting Laurent Pinchart (2022-09-28 11:05:33)
> > On Wed, Sep 28, 2022 at 10:59:36AM +0100, Kieran Bingham wrote:
> > > Quoting Laurent Pinchart (2022-09-28 01:58:12)
> > > > From: Kieran Bingham
> > >
> > > It looks l
On Wed, Sep 28, 2022 at 01:57:18PM +0300, Ville Syrjälä wrote:
> On Wed, Sep 28, 2022 at 01:04:01PM +0300, Jani Nikula wrote:
> > On Fri, 09 Sep 2022, Hans de Goede wrote:
> > > Hi all,
> > >
> > > Here is v2 of my "drm/kms: control display brightness through
> > > drm_connector properties" RFC:
On Thu, 15 Sep 2022, Khaled Almahallawy wrote:
> The sequence for Source DP PHY CTS automation is [2][1]:
> 1- Emulate successful Link Training(LT)
> 2- Short HPD and change link rates and number of lanes by LT.
> (This is same flow for Link Layer CTS)
> 3- Short HPD and change PHY test pattern an
Hi
Am 28.09.22 um 13:12 schrieb Michal Suchánek:
Hello,
On Wed, Sep 28, 2022 at 12:50:10PM +0200, Thomas Zimmermann wrote:
All DRM formats assume little-endian byte order. On big-endian systems,
it is likely that the scanout buffer is in big endian as well. Update
the format accordingly and ad
Lyude Paul writes:
> On Mon, 2022-09-26 at 16:03 +1000, Alistair Popple wrote:
>> nouveau_dmem_fault_copy_one() is used during handling of CPU faults via
>> the migrate_to_ram() callback and is used to copy data from GPU to CPU
>> memory. It is currently specific to fault handling, however a fu
On Mon, 19 Sep 2022, Ashutosh Dixit wrote:
> Register GT0_PERF_LIMIT_REASONS (0x1381a8) is available only for
> Gen11+. Therefore ensure perf_limit_reasons sysfs/debugfs files are created
> only for Gen11+. Otherwise on Gen < 5 accessing these files results in the
> following oops:
>
> <1> [88.829
This series aims to fix a number of page reference counting issues in
drivers dealing with device private ZONE_DEVICE pages. These result in
use-after-free type bugs, either from accessing a struct page which no
longer exists because it has been removed or accessing fields within the
struct page wh
ZONE_DEVICE pages have a struct dev_pagemap which is allocated by a
driver. When the struct page is first allocated by the kernel in
memremap_pages() a reference is taken on the associated pagemap to
ensure it is not freed prior to the pages being freed.
Prior to 27674ef6c73f ("mm: remove the extr
When the CPU tries to access a device private page the migrate_to_ram()
callback associated with the pgmap for the page is called. However no
reference is taken on the faulting page. Therefore a concurrent
migration of the device private page can free the page and possibly the
underlying pgmap. Thi
Since 27674ef6c73f ("mm: remove the extra ZONE_DEVICE struct page
refcount") device private pages have no longer had an extra reference
count when the page is in use. However before handing them back to the
owning device driver we add an extra reference count such that free
pages have a reference c
migrate_device_coherent_page() reuses the existing migrate_vma family of
functions to migrate a specific page without providing a valid mapping
or vma. This looks a bit odd because it means we are calling
migrate_vma_*() without setting a valid vma, however it was considered
acceptable at the time
Device drivers can use the migrate_vma family of functions to migrate
existing private anonymous mappings to device private pages. These pages
are backed by memory on the device with drivers being responsible for
copying data to and from device memory.
Device private pages are freed via the pgmap-
nouveau_dmem_fault_copy_one() is used during handling of CPU faults via
the migrate_to_ram() callback and is used to copy data from GPU to CPU
memory. It is currently specific to fault handling, however a future
patch implementing eviction of data during teardown needs similar
functionality.
Refac
When the module is unloaded or a GPU is unbound from the module it is
possible for device private pages to still be mapped in currently
running processes. This can lead to a hangs and RCU stall warnings when
unbinding the device as memunmap_pages() will wait in an uninterruptible
state until all de
Signed-off-by: Alistair Popple
Cc: Jason Gunthorpe
Cc: Ralph Campbell
Cc: John Hubbard
Cc: Alex Sierra
Cc: Felix Kuehling
---
lib/test_hmm.c | 120 +-
lib/test_hmm_uapi.h| 1 +-
tools/testing/selftests/vm/hmm-tests.c | 49
On Wed, 28 Sep 2022 04:40, Chunfeng Yun wrote:
>On Tue, 2022-09-27 at 06:23 -0700, Guillaume Ranquet wrote:
>> On Tue, 20 Sep 2022 09:46, Chunfeng Yun
>> wrote:
>> > On Mon, 2022-09-19 at 18:56 +0200, Guillaume Ranquet wrote:
>> > > Add basic support for the mediatek hdmi phy on MT8195 SoC
>> > >
On Tue, Sep 27, 2022 at 11:42:53AM -0700, Abhinav Kumar wrote:
> On 9/27/2022 12:14 AM, Johan Hovold wrote:
> > On Mon, Sep 26, 2022 at 11:17:20AM -0700, Abhinav Kumar wrote:
> >> On 9/13/2022 1:53 AM, Johan Hovold wrote:
> >>> Drop the overly defensive modeset sanity checks of function parameters
On Fri, Sep 16, 2022 at 05:15:04PM +0200, Uwe Kleine-König wrote:
[...]
> diff --git a/drivers/pwm/pwm-crc.c b/drivers/pwm/pwm-crc.c
> index 7b357d1cf642..811e6f424927 100644
> --- a/drivers/pwm/pwm-crc.c
> +++ b/drivers/pwm/pwm-crc.c
> @@ -121,8 +121,8 @@ static int crc_pwm_apply(struct pwm_chip *
On Fri, Sep 16, 2022 at 05:15:05PM +0200, Uwe Kleine-König wrote:
> Record and report an error code for the events. This allows to report
> about failed calls without ambiguity and so gives a more complete
> picture.
>
> Signed-off-by: Uwe Kleine-König
> ---
> drivers/pwm/core.c | 18 +++
On Fri, Sep 16, 2022 at 05:15:06PM +0200, Uwe Kleine-König wrote:
> This suppresses diagnosis for PWM_DEBUG routines and makes sure that
> pwm->state isn't modified in pwm_device_request() if .get_state() fails.
>
> Signed-off-by: Uwe Kleine-König
> ---
> drivers/pwm/core.c | 12 +++-
>
Il 27/09/22 15:34, Guillaume Ranquet ha scritto:
On Tue, 20 Sep 2022 14:22, AngeloGioacchino Del Regno
wrote:
Il 19/09/22 18:56, Guillaume Ranquet ha scritto:
Add the DPI1 hdmi path support in mtk dpi driver
Signed-off-by: Guillaume Ranquet
diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
b
On Thu, 22 Sept 2022 at 14:43, Philippe Schenker wrote:
>
> From: Philippe Schenker
>
> This patch-set fixes the lt8912b driver that currently does not take
> care whether or not the attached display has postiive or negative syncs
> and or reports on EDID if it needs HDMI mode or DVI.
>
> This se
Hi Niranjana,
On Tue, Sep 27, 2022 at 11:19:06PM -0700, Niranjana Vishwanathapura wrote:
> Add i915_vma_instance_persistent() to create persistent vmas.
> Persistent vmas will use i915_gtt_view to support partial binding.
>
> vma_lookup is tied to segment of the object instead of section
> of VA
On Wed, 28 Sep 2022 22:01:22 +1000 Alistair Popple wrote:
> @@ -1401,22 +1494,7 @@ static int dmirror_device_init(struct dmirror_device
> *mdevice, int id)
>
> static void dmirror_device_remove(struct dmirror_device *mdevice)
> {
> - unsigned int i;
> -
> - if (mdevice->devmem_chunks
This patch adds missing MODULE_DEVICE_TABLE definition
which generates correct modalias for automatic loading
of this driver when it is built as an external module.
Signed-off-by: Zeng Heng
---
drivers/video/fbdev/vga16fb.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/fbdev/
On 9/28/2022 5:24 AM, Johan Hovold wrote:
On Tue, Sep 27, 2022 at 11:42:53AM -0700, Abhinav Kumar wrote:
On 9/27/2022 12:14 AM, Johan Hovold wrote:
On Mon, Sep 26, 2022 at 11:17:20AM -0700, Abhinav Kumar wrote:
On 9/13/2022 1:53 AM, Johan Hovold wrote:
Drop the overly defensive modeset san
On Tue, Sep 27, 2022 at 10:17:32AM +0800, Yang Yingliang wrote:
> Hi
>
> On 2022/9/26 23:32, Daniel Thompson wrote:
> > On Mon, Sep 26, 2022 at 10:24:47PM +0800, Yang Yingliang wrote:
> > > In the probe path, dev_err() can be replaced with dev_err_probe()
> > > which will check if error code is -EP
From: Matt Roper
The part of the media and blitter engine contexts that we care about for
setting up an initial state on MTL are nearly similar to DG2 (and PVC).
The difference being PRT_BB_STATE being replaced with NOP.
For render/compute engines, the part of the context images are nearly
the s
On Wed, Sep 28, 2022 at 08:33:52AM -0700, Abhinav Kumar wrote:
> On 9/28/2022 5:24 AM, Johan Hovold wrote:
> > On Tue, Sep 27, 2022 at 11:42:53AM -0700, Abhinav Kumar wrote:
> >> Discussed with Rob on IRC, we will apply everything except the last two
> >> patches of this series in the -fixes and t
On 9/28/22 09:26, Geert Uytterhoeven wrote:
Hi Kees,
On Fri, Sep 23, 2022 at 10:35 PM Kees Cook wrote:
The __malloc attribute should not be applied to "realloc" functions, as
the returned pointer may alias the storage of the prior pointer. Instead
of splitting __malloc from __alloc_size, which
On Wed, Sep 28, 2022 at 08:38:39AM +0100, Tvrtko Ursulin wrote:
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Add i915_vma_instance_persistent() to create persistent vmas.
Persistent vmas will use i915_gtt_view to support partial binding.
vma_lookup is tied to segment of the object ins
On Wed, Sep 28, 2022 at 04:44:08PM +0200, Andi Shyti wrote:
Hi Niranjana,
On Tue, Sep 27, 2022 at 11:19:06PM -0700, Niranjana Vishwanathapura wrote:
Add i915_vma_instance_persistent() to create persistent vmas.
Persistent vmas will use i915_gtt_view to support partial binding.
vma_lookup is ti
On Wed, Sep 28, 2022 at 1:15 AM Gwan-gyeong Mun
wrote:
>
> + if (check_assign(obj->base.size >> PAGE_SHIFT, &npages))
> + return -E2BIG;
I have to say, I find that new "check_assign()" macro use to be disgusting.
It's one thing to check for overflows.
It's another thing enti
On Wed, Sep 28, 2022 at 09:26:15AM +0200, Geert Uytterhoeven wrote:
> Hi Kees,
>
> On Fri, Sep 23, 2022 at 10:35 PM Kees Cook wrote:
> > The __malloc attribute should not be applied to "realloc" functions, as
> > the returned pointer may alias the storage of the prior pointer. Instead
> > of spli
Hi,
On Tue, Sep 27, 2022 at 11:51 PM Sean Hong
wrote:
>
> On Tue, Sep 27, 2022 at 11:27 PM Doug Anderson wrote:
> >
> > Hi,
> >
> > On Mon, Sep 26, 2022 at 11:35 PM Sean Hong
> > wrote:
> > >
> > > Add support for the BOE - NT116WHM-N4C (HW: V8.1) panel.
> > >
> > > Signed-off-by: Sean Hong
>
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Make i915_gem_vm_lookup() function non-static as it will be
used by the vm_bind feature.
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Andi Shyti
Acked-by: Matthew Auld
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 11 +
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Add function __i915_sw_fence_await_reservation() for
asynchronous wait on a dma-resv object with specified
dma_resv_usage. This is required for async vma unbind
with vm_bind.
Signed-off-by: Niranjana Vishwanathapura
---
drivers/gpu/drm/i91
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Expose i915_gem_object_max_page_size() function non-static
which will be used by the vm_bind feature.
Signed-off-by: Niranjana Vishwanathapura
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 19 ++---
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Add uapi and implement support for bind and unbind of an
object at the specified GPU virtual addresses.
The vm_bind mode is not supported in legacy execbuf2 ioctl.
It will be supported only in the newer execbuf3 ioctl.
Signed-off-by: Niranja
On 28/09/2022 07:19, Niranjana Vishwanathapura wrote:
Each VM creates a root_obj and shares it with all of its private objects
to use it as dma_resv object. This has a performance advantage as it
requires a single dma_resv object update for all private BOs vs list of
dma_resv objects update for s
Add ti,am625-dss compatible string.
The DSS IP on TI's AM625 SoC is an update from the DSS on TI's AM65X
SoC. The former has an additional OLDI TX to enable a 2K resolution on
OLDI displays or enable 2 duplicated displays with a smaller resolution.
Signed-off-by: Aradhya Bhatia
Reviewed-by: Rahul
The newer version of DSS (AM625-DSS) has 2 OLDI TXes at its disposal.
These can be configured to support the following modes:
1. OLDI_SINGLE_LINK_SINGLE_MODE
Single Output over OLDI 0.
+--++-+ +---+
| || | | |
| CRTC +--->+ ENCODER +
Add 3rd "port" property for am625-dss.
This port represents the output from the 2nd OLDI TX (OLDI TX 1) latched
onto the first video port (VP0) from the DSS controller on AM625 SOC.
Signed-off-by: Aradhya Bhatia
---
.../bindings/display/ti/ti,am65x-dss.yaml | 18 +-
1 file c
The AM625 DSS IP contains 2 OLDI TXes which can work to enable 2
duplicated displays of smaller resolutions or enable a single Dual Link
display with a higher resolution (1920x1200).
Configure the necessary register to enable and disable the OLDI TXes
with necessary modes configurations.
Signed-o
On Wed, Sep 28, 2022 at 10:09:04AM -0700, Linus Torvalds wrote:
> Kees, you need to reign in the craziness in overflow.h.
Understood. I've been trying to help the drm folks walk a line between
having a bunch of custom macros hidden away in the drm includes and
building up generalized versions that
On Tue, Sep 27, 2022 at 05:22:41PM -0700, Ceraolo Spurio, Daniele wrote:
>
>
> On 9/27/2022 5:10 PM, Matt Roper wrote:
> > On Thu, Sep 22, 2022 at 03:11:17PM -0700, Daniele Ceraolo Spurio wrote:
> > > The render and media GuCs share the same interrupt enable register, so
> > > we can no longer di
Register GT0_PERF_LIMIT_REASONS (0x1381a8) is available only for
Gen11+. Therefore ensure perf_limit_reasons sysfs files are created only
for Gen11+. Otherwise on Gen < 5 accessing these files results in the
following oops:
<1> [88.829420] BUG: unable to handle page fault for address: c9bb
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