This patch fix cocci warning:
drivers/gpu/drm/amd/display/dc/core/dc.c:3335:2-4: WARNING:
possible condition with no effect (if == else).
Signed-off-by: Bernard Zhao
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 9 ++---
1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/drivers/
On 8/23/22 14:05, Tomasz Figa wrote:
CAUTION: Email originated externally, do not click links or open attachments
unless you recognize the sender and know the content is safe.
On Sat, Aug 20, 2022 at 12:44 AM Hsia-Jun Li wrote:
On 8/19/22 23:28, Nicolas Dufresne wrote:
CAUTION: Email
This patch trf to fis cocci warning:
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
2349:8-34: duplicated argument to && or ||
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
3680:8-55: duplicated argument to && or ||
Signed-off-by: Bernard Zhao
---
drivers/gpu/d
This patch trf to fis cocci warning:
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
2349:8-34: duplicated argument to && or ||
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
3680:8-55: duplicated argument to && or ||
Signed-off-by: Bernard Zhao
---
.../gpu/drm/a
From: Qu Huang
The mmVM_L2_CNTL3 register is not assigned an initial value
Signed-off-by: Qu Huang
---
drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v1_0.c
index 1da2ec6920
"Michael Kelley (LINUX)" writes:
> From: Vitaly Kuznetsov Sent: Thursday, August 18, 2022
> 7:25 AM
>>
>> There are already two places in kernel with PCI_VENDOR_ID_MICROSOFT/
>> PCI_DEVICE_ID_HYPERV_VIDEO and there's a need to use these from core
>> Vmbus code. Move the defines to a common hea
On 8/22/22 22:15, Nicolas Dufresne wrote:
CAUTION: Email originated externally, do not click links or open attachments
unless you recognize the sender and know the content is safe.
Le samedi 20 août 2022 à 08:10 +0800, Hsia-Jun Li a écrit :
On 8/20/22 03:17, Nicolas Dufresne wrote:
CAUTI
On Mon, 22 Aug 2022, Imre Deak wrote:
> On Fri, Jul 22, 2022 at 02:51:40PM +0200, Andrzej Hajda wrote:
>> i915->hotplug.dig_port_work can be queued from intel_hpd_irq_handler
>> called by IRQ handler or by intel_hpd_trigger_irq called from dp_mst.
>> Since dp_mst is suspended after irq handler uni
On Mon, Aug 22, 2022 at 10:33:40AM -0700, Doug Anderson wrote:
> Hi,
>
> On Mon, Aug 22, 2022 at 6:35 AM Johan Hovold wrote:
> >
> > On Fri, Jul 22, 2022 at 11:48:40AM +0200, Johan Hovold wrote:
> > > On Mon, Jul 11, 2022 at 09:52:02AM +0200, Johan Hovold wrote:
> > > > Add an eDP panel entry for
Hi Andrew,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on linus/master v6.0-rc2 next-20220823]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to
From: Marek Vasut
[ Upstream commit 2bba782002c5dab6ca8d608b778b386fb912adff ]
The drm_of_lvds_get_data_mapping() returns either negative value on
error or MEDIA_BUS_FMT_* otherwise. The check for 'ret' would also
catch the positive case of MEDIA_BUS_FMT_* and lead to probe failure
every time 'd
On 22/08/2022 12:19, zheng-yan.chen wrote:
> Modify gamma compatible for mt8195.
>
> Signed-off-by: zheng-yan.chen
>
> ---
> arch/arm64/boot/dts/mediatek/mt8195.dtsi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi
> b/arch/
On Tue, Aug 23, 2022 at 10:41:22AM +0300, Jani Nikula wrote:
> On Mon, 22 Aug 2022, Imre Deak wrote:
> > On Fri, Jul 22, 2022 at 02:51:40PM +0200, Andrzej Hajda wrote:
> >> i915->hotplug.dig_port_work can be queued from intel_hpd_irq_handler
> >> called by IRQ handler or by intel_hpd_trigger_irq c
Am 22.08.22 um 19:26 schrieb Dmitry Osipenko:
On 8/16/22 22:55, Dmitry Osipenko wrote:
On 8/16/22 15:03, Christian König wrote:
Am 16.08.22 um 13:44 schrieb Dmitry Osipenko:
[SNIP]
The other complication I noticed is that we don't seem to keep around
the fd after importing to a GEM handle. A
On Fri, 19 Aug 2022, John Harrison wrote:
> On 8/19/2022 03:45, Jani Nikula wrote:
>> On Wed, 27 Jul 2022, john.c.harri...@intel.com wrote:
>>> From: John Harrison
>>>
>>> It is useful to be able to match GuC events to kernel events when
>>> looking at the GuC log. That requires being able to con
Hi Bas,
I've just pushed an updated drm-exec branch to fdo which should now
include the bo_list bug fix.
Can you please test that with Forza? I'm still fighting getting a new
kernel on my Steamdeck.
Thanks,
Christian.
Am 22.08.22 um 01:08 schrieb Bas Nieuwenhuizen:
On Thu, Aug 18, 2022 at
It moves overflows_type utility macro into overflow header from i915_utils
header. The overflows_type can be used to catch the truncaion (overflow)
between different data types. And it adds check_assign() macro which
performs an assigning source value into destination ptr along with an
overflow che
This patch series fixes integer overflow or integer truncation issues in
page lookups, ttm place configuration and scatterlist creation, etc.
We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain integer
instead o
From: Chris Wilson
There is an impedance mismatch between the scatterlist API using unsigned
int and our memory/page accounting in unsigned long. That is we may try
to create a scatterlist for a large object that overflows returning a
small table into which we try to fit very many pages. As the o
From: Chris Wilson
We need to check that we avoid integer overflows when looking up a page,
and so fix all the instances where we have mistakenly used a plain
integer instead of a more suitable long. Be pedantic and add integer
typechecking to the lookup so that we can be sure that we are safe.
A
There is an impedance mismatch between the first/last valid page
frame number of ttm place in unsigned and our memory/page accounting in
unsigned long.
As the object size is under the control of userspace, we have to be prudent
and catch the conversion errors.
To catch the implicit truncation as we
The ttm_bo_init_reserved() functions returns -ENOSPC if the size is too big
to add vma. The direct function that returns -ENOSPC is
drm_mm_insert_node_in_range().
To handle the same error as other code returning -E2BIG when the size is
too large, it converts return value to -E2BIG.
Signed-off-by:
The __shmem_file_setup() function returns -EINVAL if size is greater than
MAX_LFS_FILESIZE. To handle the same error as other code that returns
-E2BIG when the size is too large, it add a code that returns -E2BIG when
the size is larger than the size that can be handled.
v4: If BITS_PER_LONG is 32
It adds exact_type and exactly_pgoff_t macro to catch type mis-match while
compiling. The existing typecheck() macro outputs build warnings, but the
newly added exact_type() macro uses the BUILD_BUG_ON() macro to generate
a build break when the types are different and can be used to detect
explicit
On 19/08/2022 08:10, Nancy.Lin wrote:
Add mmsys for support 64 reset bits. It is a preparation for MT8195
vdosys1 HW reset. MT8195 vdosys1 has more than 32 reset bits.
1. Add the number of reset bits in mmsys private data
2. move the whole "reset register code section" behind the
"get mmsys->
On 22/08/2022 20:58, Dmitry Baryshkov wrote:
> On 06/07/2022 18:52, Krzysztof Kozlowski wrote:
>> On 06/07/2022 16:52, Dmitry Baryshkov wrote:
>>> Make display/msm/gmu.yaml describe all existing GMU variants rather than
>>> just the 630.2 (SDM845) version of it.
>>>
>>> Signed-off-by: Dmitry Barysh
Hi Krzysztof,
Thank you for the patch.
On Tue, Aug 23, 2022 at 01:10:31PM +0300, Krzysztof Kozlowski wrote:
> reg-io-width is a standard property, so no need for defining its type
> with $ref.
>
> Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Laurent Pinchart
> ---
> .../devicetree/bindin
On 2022-08-23 03:51, Alyssa Rosenzweig wrote:
-static size_t get_pgsize(u64 addr, size_t size)
+static size_t get_pgsize(u64 addr, size_t size, size_t *count)
{
- if (addr & (SZ_2M - 1) || size < SZ_2M)
- return SZ_4K;
+ size_t blk_offset = -addr % SZ_2M;
addr is uns
On 22/08/2022 17:45, Laurent Pinchart wrote:
Hi Tomi,
Thank you for the patch.
On Mon, Aug 22, 2022 at 05:34:01PM +0300, Tomi Valkeinen wrote:
From: Tomi Valkeinen
rcar_mipi_dsi_startup() writes correct values to VCLKSET, but as it uses
or-operation to add the new values to the current value
From: Tomi Valkeinen
rcar_mipi_dsi_startup() writes correct values to VCLKSET, but as it uses
or-operation to add the new values to the current value in the register,
it should first make sure the fields are cleared.
Do this by using rcar_mipi_dsi_write() to write the VCLKSET register
with a var
On 22/08/2022 22:04, Dmitry Baryshkov wrote:
>>> required:
>>> - compatible
>>> - reg
>>> @@ -177,7 +204,19 @@ patternProperties:
>>> # TODO: add reference once the mdp5 is converted
>>>
>>> "^display-controller@(0|[1-9a-f][0-9a-f]*)$":
>>> -$ref: dpu-sdm845.yaml
>>> +
On Tue, Aug 23, 2022 at 01:52:38PM +0300, Tomi Valkeinen wrote:
> On 22/08/2022 17:45, Laurent Pinchart wrote:
> > Hi Tomi,
> >
> > Thank you for the patch.
> >
> > On Mon, Aug 22, 2022 at 05:34:01PM +0300, Tomi Valkeinen wrote:
> >> From: Tomi Valkeinen
> >>
> >> rcar_mipi_dsi_startup() writes
On Tue, Aug 23, 2022 at 02:04:21PM +0300, Tomi Valkeinen wrote:
> On 22/08/2022 17:34, Tomi Valkeinen wrote:
>
> > +struct drm_atomic_state;
> > +struct drm_bridge;
> > +
> > +#if IS_ENABLED(CONFIG_DRM_RCAR_MIPI_DSI)
> > +void rcar_mipi_dsi_pclk_enable(struct drm_bridge *bridge,
> > +
On Fri, 19 Aug 2022, Daniele Ceraolo Spurio
wrote:
> From: Vitaly Lubart
>
> The discrete graphics card with GSC firmware
> using command streamer API hence it requires to enhance
> pxp module with the new gsc_command() handler.
>
> The handler is implemented via mei_pxp_gsc_command() which is
>
On Fri, 19 Aug 2022, Daniele Ceraolo Spurio
wrote:
> diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_huc.h
> b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.h
> new file mode 100644
> index ..6cf2d00548c0
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_huc.h
> @@ -0,0 +1,15 @@
>
On Fri, 19 Aug 2022, Daniele Ceraolo Spurio
wrote:
> Given that HuC load is delayed on DG2, this patch adds support for a fence
> that can be used to wait for load completion. No waiters are added in this
> patch (they're coming up in the next one), to keep the focus of the
> patch on the trackin
Currently damage clips handling is broken for planes when using big
framebuffer + offset in case kms driver adjusts drm_plane_state.src
coords. This is because damage clips are using coords relative to
original coords from user-space.
This patchset is fixing this by using original
coords from user
drm_plane_state->src is modified when offset is calculated:
before calculation:
src.x1 = 8192, src.y1 = 8192
after calculation (pitch = 65536, cpp = 4, alignment = 262144)
src.x1 = 8192, src.y1 = 0, offset = 0x2000
Damage clips are relative to original coodrdinates provided by
user-space. To
drm_plane_state->src might be modified by the driver. This is done
e.g. in i915 driver when there is bigger framebuffer than the plane
and there is some offset within framebuffer. I915 driver calculates
separate offset and adjusts src rect coords to be relative to this
offset. Damage clips are stil
Use existing drm_atomic_helper_damage_merged from generic drm code
instead of implementing own loop to iterate over damage_clips.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 17 +
1 file changed, 5 insertions(+), 12 deletions(-)
diff --git a/driv
Hi Bernard
On 8/23/22 04:14, Bernard Zhao wrote:
This patch trf to fis cocci warning:
I believe that there are a couple of typos on this description. Maybe
you could fixed to s/trf/try and s/fis/fix.
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_32.c:
2349:8-34: duplicated argu
On 23/08/2022 13:30, Nancy.Lin wrote:
Hi Matthias,
Thanks for the review.
On Tue, 2022-08-23 at 12:20 +0200, Matthias Brugger wrote:
On 19/08/2022 08:10, Nancy.Lin wrote:
Add mmsys for support 64 reset bits. It is a preparation for MT8195
vdosys1 HW reset. MT8195 vdosys1 has more than 32
Am 22.08.22 um 22:09 schrieb Andrey Grodzovsky:
Poblem: Given many entities competing for same rq on
same scheduler an uncceptabliy long wait time for some
jobs waiting stuck in rq before being picked up are
observed (seen using GPUVis).
The issue is due to Round Robin policy used by schedule
On 23/08/2022 15:21, Jilin Yuan wrote:
> Delete the redundant word 'next'.
>
Use scripts/get_maintainers.pl to CC all maintainers and relevant
mailing lists.
Best regards,
Krzysztof
On 23.08.2022 12:17, Gwan-gyeong Mun wrote:
It moves overflows_type utility macro into overflow header from i915_utils
header. The overflows_type can be used to catch the truncaion (overflow)
between different data types. And it adds check_assign() macro which
performs an assigning source value i
On 22/08/2022 06:32, nathan.lu wrote:
> From: Nathan Lu
>
> modify VDOSYS0 device tree Documentations for MT8188.
(...)
> diff --git
> a/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
> b/Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
> index 0882
On 2022-08-23 13:21, Jilin Yuan wrote:
Delete the redundant word 'next'.
From the context, I'm not sure it is redundant - as far as I can tell
this comment seems to be describing a sequence of 3 commands, where
"current" is the first, "next" is the second, and "next next" implies
the third
Le mardi 23 août 2022 à 15:40 +0800, Hsia-Jun Li a écrit :
> > In current state, If your driver can support it, userland does not strictly
> > need
> > to re-allocate if the resolution is changed to smaller. In most SVC
> > scenarios,
> > the largest resolution is known in advance, so pre-allocatio
Le mardi 23 août 2022 à 15:03 +0800, Hsia-Jun Li a écrit :
>
> On 8/23/22 14:05, Tomasz Figa wrote:
> > CAUTION: Email originated externally, do not click links or open
> > attachments unless you recognize the sender and know the content is safe.
> >
> >
> > On Sat, Aug 20, 2022 at 12:44 AM Hsi
From: Vitaly Kuznetsov Sent: Thursday, August 18, 2022
7:25 AM
>
> vmbus_reserve_fb() tries reserving framebuffer region iff
> screen_info.lfb_base is set. Gen2 VMs seem to have it set by EFI fb
> but on Gen1 VM it is observed to be zero.
FWIW, in a Gen1 VM, whether screen_info.lfb_base is set
Although there is usually not such a limitation (and when there is it is
often only because the driver forgot to change the super small default),
it is still correct here to break scatterlist element into chunks of
dma_max_mapping_size().
This might cause some issues for users with misbehaving dri
Hi,
On Mon, Aug 22, 2022 at 11:23 PM Yongqin Liu wrote:
>
> Hi, Douglas
>
> Just an update on the fix you pointed out previously here:
> > > [1]
> > > https://lore.kernel.org/r/20220809142738.1.I91625242f137c707bb345c51c80c5ecee02eeff3@changeid
>
> With it I could boot the hikey960 build to the
In order to ensure only documented properties are present, node schemas
must have unevaluatedProperties or additionalProperties set to false
(typically).
Signed-off-by: Rob Herring
---
Documentation/devicetree/bindings/display/arm,komeda.yaml| 1 +
Documentation/devicetree/bindings/displ
DT bindings using the graph binding must have references to the graph
binding schema. These are missing from the adi,adv7511 and adi,adv7533
bindings, so add them.
Signed-off-by: Rob Herring
---
.../bindings/display/bridge/adi,adv7511.yaml | 14 ++
.../bindings/display/bridge/a
On 2022-08-23 08:15, Christian König wrote:
Am 22.08.22 um 22:09 schrieb Andrey Grodzovsky:
Poblem: Given many entities competing for same rq on
same scheduler an uncceptabliy long wait time for some
jobs waiting stuck in rq before being picked up are
observed (seen using GPUVis).
The issue
Hi,
On Tue, Jul 19, 2022 at 10:42 PM Steev Klimaszewski wrote:
>
> Add an eDP panel entry for IVO M133NW4J-R3.
>
> Due to lack of documentation, use the delay_200_500_e50 timings for now.
Doesn't actually match the commit, which uses "delay_200_500_p2e100".
Fixing while applying.
> Signed-off-
From: Rob Clark
Using map_pages/unmap_pages cuts down on the # of pgtable walks needed
in the process of finding where to insert/remove an entry. The end
result is ~5-10x faster than mapping a single page at a time.
v2: Rename iommu_pgsize(), drop obsolete comments, fix error handling
in ms
On Tue, Aug 23, 2022 at 3:01 AM Christian König
wrote:
>
> Am 22.08.22 um 19:26 schrieb Dmitry Osipenko:
> > On 8/16/22 22:55, Dmitry Osipenko wrote:
> >> On 8/16/22 15:03, Christian König wrote:
> >>> Am 16.08.22 um 13:44 schrieb Dmitry Osipenko:
> [SNIP]
> > The other complication I not
Inlined:
On 2022-08-22 16:09, Andrey Grodzovsky wrote:
> Poblem: Given many entities competing for same rq on
^Problem
> same scheduler an uncceptabliy long wait time for some
^unacceptably
> jobs waiting stuck in rq before being picked up are
> observed (seen using GPUVis).
> The issue is due
On Fri, 19 Aug 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> EDID 1.4 introduced some extra flags in the range
> descriptor to support min/max h/vfreq >= 255. Consult them
> to correctly parse the vfreq limits.
>
> Cc: sta...@vger.kernel.org
> Closes: https://gitlab.freedesktop.org/drm/int
Would anyone have any issues if I merged this today? The whole series is
acked, but I'm not sure if we would like to wait for R-b's?
On Wed, 2022-08-17 at 15:38 -0400, Lyude Paul wrote:
> For quite a while we've been carrying around a lot of legacy modesetting
> code in the MST helpers that has b
On 6/16/2022 12:59 AM, Dmitry Baryshkov wrote:
Use devm_pm_runtime_enable() to enable runtime PM. This way its effect
will be reverted on device unbind/destruction.
Fixes: 6ed9ed484d04 ("drm/msm/hdmi: Set up runtime PM for HDMI")
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
On 6/16/2022 12:59 AM, Dmitry Baryshkov wrote:
All MSM HDMI devices use "core_physical" and "qfprom_physical" names for
register areas. Drop them from the platform config.
Signed-off-by: Dmitry Baryshkov
Reviewed-by: Abhinav Kumar
---
drivers/gpu/drm/msm/hdmi/hdmi.c | 9 +++--
driv
Hi Stephen
On 8/22/2022 7:43 PM, Stephen Boyd wrote:
Build robots complain
smatch warnings:
drivers/gpu/drm/msm/dp/dp_link.c:969 dp_link_process_link_status_update()
warn: inconsistent indenting
Fix it.
Cc: Kuogee Hsieh
Fixes: ea530388e64b ("drm/msm/dp: skip checking LINK_STATUS_UPDATED
On 2022-08-23 12:58, Luben Tuikov wrote:
Inlined:
On 2022-08-22 16:09, Andrey Grodzovsky wrote:
Poblem: Given many entities competing for same rq on
^Problem
same scheduler an uncceptabliy long wait time for some
^unacceptably
jobs waiting stuck in rq before being picked up are
observed
Hi Obed,
Oded Gabbay writes:
[...]
> I want to update that I'm currently in discussions with Dave to figure
> out what's the best way to move forward. We are writing it down to do
> a proper comparison between the two paths (new accel subsystem or
> using drm). I guess it will take a week or so
Hi, Douglas
On Tue, 23 Aug 2022 at 22:50, Doug Anderson wrote:
>
> Hi,
>
> On Mon, Aug 22, 2022 at 11:23 PM Yongqin Liu wrote:
> >
> > Hi, Douglas
> >
> > Just an update on the fix you pointed out previously here:
> > > > [1]
> > > > https://lore.kernel.org/r/20220809142738.1.I91625242f137c707b
On 2022-08-23 14:13, Andrey Grodzovsky wrote:
>
> On 2022-08-23 12:58, Luben Tuikov wrote:
>> Inlined:
>>
>> On 2022-08-22 16:09, Andrey Grodzovsky wrote:
>>> Poblem: Given many entities competing for same rq on
>> ^Problem
>>
>>> same scheduler an uncceptabliy long wait time for some
>> ^unacc
Jadard JD9365DA-H3 is WUXGA MIPI DSI panel and it support TFT
dot matrix LCD with 800RGBx1280 dots at maximum.
Add support for it.
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Jagan Teki
---
MAINTAINERS | 1 +
drivers/gpu/drm/panel/Kconfig
On Fri, 19 Aug 2022 22:16:48 +0300, Matti Vaittinen wrote:
> Use devm helpers for regulator get and enable
>
> NOTE: The series depends on commit
> ee94aff2628b ("Devm helpers for regulator get and enable")
> which currently sits in Mark's regulator/for-next
>
> A few* drivers seem to pattern dem
On 2022-08-23 14:30, Luben Tuikov wrote:
On 2022-08-23 14:13, Andrey Grodzovsky wrote:
On 2022-08-23 12:58, Luben Tuikov wrote:
Inlined:
On 2022-08-22 16:09, Andrey Grodzovsky wrote:
Poblem: Given many entities competing for same rq on
^Problem
same scheduler an uncceptabliy long wait ti
Hi Tomi,
I love your patch! Perhaps something to improve:
[auto build test WARNING on pinchartl-media/drm/du/next]
[also build test WARNING on linus/master v6.0-rc2 next-20220823]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use
Hi Tomi,
I love your patch! Yet something to improve:
[auto build test ERROR on pinchartl-media/drm/du/next]
[also build test ERROR on linus/master v6.0-rc2 next-20220823]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '-
On Tue, Aug 23, 2022 at 02:18:37PM +0800, xinlei@mediatek.com wrote:
> From: Xinlei Lee
>
> Dpi output needs to adjust the output format to dual edge for MT8186.
> Because MT8186 HW has been modified at that time, SW needs to cooperate.
> And the register (MMSYS) reserved for dpi will be used
On Tue, Aug 23, 2022 at 02:38:22PM +0800, xinlei@mediatek.com wrote:
> From: Xinlei Lee
>
> Add mmsys function to manipulate dpi output format configuration for MT8186.
>
> Co-developed-by: Jitao Shi
> Signed-off-by: Jitao Shi
> Signed-off-by: Xinlei Lee
Reviewed-by: Nícolas F. R. A. Pra
Although register tuning settings are generally implemented via the
workaround infrastructure, it turns out that the DRAW_WATERMARK register
is not properly saved/restored by hardware around power events (i.e.,
RC6 entry) so updates to the value cannot be applied in the usual
manner. New workaroun
On Tue, Aug 23, 2022 at 9:24 PM Kevin Hilman wrote:
>
> Hi Obed,
>
> Oded Gabbay writes:
>
> [...]
>
> > I want to update that I'm currently in discussions with Dave to figure
> > out what's the best way to move forward. We are writing it down to do
> > a proper comparison between the two paths (
64 DRM device nodes is not enough for everyone.
Upgrade it to ~341K (which definitely is more than enough).
Additionally - one minor tweak around minor IDR locking.
v1 -> v2:
Don't touch DRM_MINOR_CONTROL and its range (Simon Ser)
Michał Winiarski (2):
drm: Expand max DRM device number to full
Having a limit of 64 DRM devices is not good enough for modern world
where we have multi-GPU servers, SR-IOV virtual functions and virtual
devices used for testing.
Let's utilize full minor range for DRM devices.
To avoid regressing the existing userspace, we're still maintaining the
numbering sche
Operating on drm minor is not done in IRQ context, which means that we
could safely downgrade to regular non-irq spinlock.
But we can also go further and drop the idr_preload tricks by just using
a mutex.
Signed-off-by: Michał Winiarski
---
drivers/gpu/drm/drm_drv.c | 31
Actually, talked with airlied and they suggested at this point I should just
go ahead and push. So, pushed! Have fun getting nice DSC support everyone :)
On Tue, 2022-08-23 at 13:26 -0400, Lyude Paul wrote:
> Would anyone have any issues if I merged this today? The whole series is
> acked, but I'm
Quoting Abhinav Kumar (2022-08-23 10:47:02)
> link->request.test_lane_count;
> - link->dp_link.link_params.rate = link->request.test_link_rate;
> + link->dp_link.link_params.rate =
> + drm_dp_bw_code_to_link_rate(link->request.test_link_rate);
>
> return 0;
>
> Si
Build robots complain
smatch warnings:
drivers/gpu/drm/msm/dp/dp_link.c:969 dp_link_process_link_status_update()
warn: inconsistent indenting
Fix it along with a trailing space from the same commit.
Cc: Kuogee Hsieh
Fixes: ea530388e64b ("drm/msm/dp: skip checking LINK_STATUS_UPDATED bit")
Re
Quoting Dmitry Baryshkov (2022-08-05 04:56:30)
> diff --git a/drivers/gpu/drm/msm/msm_io_utils.c
> b/drivers/gpu/drm/msm/msm_io_utils.c
> index 7b504617833a..d02cd29ce829 100644
> --- a/drivers/gpu/drm/msm/msm_io_utils.c
> +++ b/drivers/gpu/drm/msm/msm_io_utils.c
> @@ -124,3 +126,23 @@ void msm_hr
On 8/23/2022 4:41 PM, Krzysztof Kozlowski wrote:
On 19/08/2022 19:40, Akhil P Oommen wrote:
Documentation/devicetree/bindings/display/msm/gpu.yaml | 7 +++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml
b/Documentation/devicetree/bind
On 8/23/2022 10:07 PM, Rob Clark wrote:
From: Rob Clark
Using map_pages/unmap_pages cuts down on the # of pgtable walks needed
in the process of finding where to insert/remove an entry. The end
result is ~5-10x faster than mapping a single page at a time.
v2: Rename iommu_pgsize(), drop obsol
On 2022-08-23 14:57, Andrey Grodzovsky wrote:
> On 2022-08-23 14:30, Luben Tuikov wrote:
>
>>
>> On 2022-08-23 14:13, Andrey Grodzovsky wrote:
>>> On 2022-08-23 12:58, Luben Tuikov wrote:
Inlined:
On 2022-08-22 16:09, Andrey Grodzovsky wrote:
> Poblem: Given many entities com
On 8/23/2022 2:23 PM, Stephen Boyd wrote:
Build robots complain
smatch warnings:
drivers/gpu/drm/msm/dp/dp_link.c:969 dp_link_process_link_status_update()
warn: inconsistent indenting
Fix it along with a trailing space from the same commit.
Cc: Kuogee Hsieh
Fixes: ea530388e64b ("drm/m
On 22.08.2022 19:27, Imre Deak wrote:
On Fri, Jul 22, 2022 at 02:51:42PM +0200, Andrzej Hajda wrote:
HPD events during driver removal can be generated by hardware and
software frameworks - drm_dp_mst, the former we can avoid by disabling
interrupts, the latter can be triggered by any drm_dp_m
On 8/22/2022 10:44 AM, Dmitry Baryshkov wrote:
It makes no sense to have the HPD worker in the MSM DSI driver anymore.
It is only queued from the dsi_host_attach/detach() callbacks, where
it plays no useful role. Either way the panel or next bridge will be
present and will report it's status d
On Tue, Aug 23, 2022 at 2:37 PM Akhil P Oommen wrote:
>
> On 8/23/2022 10:07 PM, Rob Clark wrote:
> > From: Rob Clark
> >
> > Using map_pages/unmap_pages cuts down on the # of pgtable walks needed
> > in the process of finding where to insert/remove an entry. The end
> > result is ~5-10x faster
On 8/22/2022 11:33 AM, Dmitry Baryshkov wrote:
On 22/08/2022 20:32, Abhinav Kumar wrote:
On 8/22/2022 9:49 AM, Dmitry Baryshkov wrote:
On 22/08/2022 19:38, Abhinav Kumar wrote:
Hi Dmitry
On 8/22/2022 9:18 AM, Dmitry Baryshkov wrote:
On 17/08/2022 21:01, Kuogee Hsieh wrote:
DRM commit_t
On 8/22/2022 10:22 AM, Dmitry Baryshkov wrote:
Follow up the merge of address fields and drop the variable that became
unused after the commit 9403f9a42c88 ("drm/msm/dpu: merge base_off with
blk_off in struct dpu_hw_blk_reg_map").
Fixes: 9403f9a42c88 ("drm/msm/dpu: merge base_off with blk_off
Sorry missed one response,
On 8/23/2022 3:07 PM, Abhinav Kumar wrote:
On 8/22/2022 11:33 AM, Dmitry Baryshkov wrote:
On 22/08/2022 20:32, Abhinav Kumar wrote:
On 8/22/2022 9:49 AM, Dmitry Baryshkov wrote:
On 22/08/2022 19:38, Abhinav Kumar wrote:
Hi Dmitry
On 8/22/2022 9:18 AM, Dmitry B
On Tue, Aug 23, 2022 at 12:16 PM Christian König
wrote:
>
> Hi Bas,
>
> I've just pushed an updated drm-exec branch to fdo which should now
> include the bo_list bug fix.
Still getting the same thing:
[ 103.598784] [ cut here ]
[ 103.598787] WARNING: CPU: 2 PID: 2505 at
On Wed, 24 Aug 2022 at 01:07, Abhinav Kumar wrote:
> On 8/22/2022 11:33 AM, Dmitry Baryshkov wrote:
> > On 22/08/2022 20:32, Abhinav Kumar wrote:
> >>
> >>
> >> On 8/22/2022 9:49 AM, Dmitry Baryshkov wrote:
> >>> On 22/08/2022 19:38, Abhinav Kumar wrote:
> Hi Dmitry
>
> On 8/22/2022
On 8/23/2022 3:41 PM, Dmitry Baryshkov wrote:
On Wed, 24 Aug 2022 at 01:07, Abhinav Kumar wrote:
On 8/22/2022 11:33 AM, Dmitry Baryshkov wrote:
On 22/08/2022 20:32, Abhinav Kumar wrote:
On 8/22/2022 9:49 AM, Dmitry Baryshkov wrote:
On 22/08/2022 19:38, Abhinav Kumar wrote:
Hi Dmitry
O
On 6/16/2022 12:59 AM, Dmitry Baryshkov wrote:
Rather than having all resource allocation happen in the _bind function
(resulting in possible EPROBE_DEFER returns and component bind/unbind
cycles) allocate and check all resources in _probe function. While we
are at it, use platform_get_irq() t
On Sun, Aug 21, 2022 at 07:22:30PM -0300, Isabella Basso wrote:
> Hi Michał,
>
> While I totally understand your point, we have talked about this in our GSoC
> meetings with mentors, and have found a few reasons as to why a KUnit runner
> integrated to IGT might be really useful.
>
> > Am 22/07/
On 7/4/2022 9:11 AM, Dmitry Baryshkov wrote:
On MSM8996 the HDMI PHY provides the PLL clock to the MMCC. As we are
preparing to convert the MSM8996 to use DT clocks properties (rather
than global clock names), register the OF clock provider.
While we are at it, also change the driver to use c
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